Commit Graph

5741 Commits

Author SHA1 Message Date
Pierre-Eric Pelloux-Prayer ac9ab028ce radeonsi/test: don't require a folder name
Generate a temp one if the user didn't supply one.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899>
2021-09-21 08:37:57 +00:00
Pierre-Eric Pelloux-Prayer 9db70eb577 radeonsi/sqtt: add si_se_is_disabled
Based on radv_se_is_disabled.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899>
2021-09-21 08:37:57 +00:00
Pierre-Eric Pelloux-Prayer a25a6abbd7 radeonsi/sqtt: export wave size and scratch size
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899>
2021-09-21 08:37:57 +00:00
Pierre-Eric Pelloux-Prayer a574d0541a radeonsi/test: update expected results
These tests were fixed in piglit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899>
2021-09-21 08:37:57 +00:00
Pierre-Eric Pelloux-Prayer 97663bac2e radeonsi/test: fix typo in the test script
glcts results were copied over deqp results.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12899>
2021-09-21 08:37:57 +00:00
Qiang Yu 6f9f350622 radeonsi: fix ps SI_PARAM_LINE_STIPPLE_TEX arg
This arg size should be 1 instead of 3. It does not affect functionality
because we does not enable it in SPI_PS_INPUT_ADDR. But it does affect
the VGPR number that LLVM produce when LLVM still count with all PS
function arguments.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12922>
2021-09-19 01:24:21 +00:00
Rhys Perry a1af902531 nir/algebraic: distribute fmul(fadd(a, b), c) when b and c are constants
This allows for more MAD/FMA instructions to be created.

fossil-db (Sienna Cichlid):
Totals from 50134 (33.46% of 149839) affected shaders:
VGPRs: 2436536 -> 2436000 (-0.02%); split: -0.05%, +0.03%
SpillSGPRs: 13136 -> 13135 (-0.01%); split: -0.02%, +0.02%
CodeSize: 206621424 -> 206278292 (-0.17%); split: -0.23%, +0.07%
MaxWaves: 1116804 -> 1117448 (+0.06%); split: +0.07%, -0.01%
Instrs: 38977460 -> 38862886 (-0.29%); split: -0.33%, +0.04%
Latency: 832425389 -> 827432260 (-0.60%); split: -0.63%, +0.03%
InvThroughput: 184193457 -> 183563350 (-0.34%); split: -0.37%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7458>
2021-09-17 17:28:26 +00:00
Marek Olšák 7b4427b199 radeonsi: enable NGG passthrough when LDS is used, document the real constraints
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 70c975fd13 radeonsi: fix incorrect comments about VGT_SHADER_STAGES_EN
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 0b5c1537aa radeonsi: don't set edgeflags for TES and blit VS
they are disabled (TES) or have no effect (blit VS)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák b330c7cb2a radeonsi: use a trick to extract and pack edgeflags using fewer instructions
This removes 4 instructions from the prim export packing.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 2d8dfb9111 radeonsi: convert gfx10_emit_ge_pc_alloc to radeon_opt_set_uconfig_reg
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák edb5fa4d59 radeonsi: eliminate redundant SPI_SHADER_PGM_RSRC3/4_GS register writes
They don't change much.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 3df035d08c radeonsi: put si_pm4_state at the beginning of si_shader
instead of allocating it separately. This removes pointer indirections.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 73c82570cb radeonsi: move setting one GS shader key field out of si_shader_selector_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 99c5e03986 radeonsi: move setting most TCS shader key fields out of si_shader_selector_key
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák fb04378e76 radeonsi: set prefer_mono outside of si_shader_selector_key
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 5824ab569e radeonsi: precompute more spi_map code
This replaces vs_output_param_offset by vs_output_ps_input_cntl,
which is easier to use.

For geometry shaders, vs_output_ps_input_cntl is stored in the GS si_shader
structure, not gs_copy_shader. This requires that gs_copy_shader compilation
is finished before the GS main shader part, so that GS can initialize
vs_output_ps_input_cntl using the compiled GS copy shader.

output_semantic_to_slot becomes unused, so it's removed.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák dba914de85 radeonsi: unroll loops in si_emit_spi_map using 33 C++ template instantiations
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 3264372539 radeonsi: inline si_get_ps_input_cntl because it has only one use
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 5f090891e9 radeonsi: simplify si_emit_spi_map for back-face colors
Just precompute what we need in si_shader_info.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 57f9452b46 radeonsi: precompute num_interp for si_emit_spi_map
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 46802f7b60 radeonsi: interleave si_shader_info::input_* in memory for faster emit_spi_map
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 11d1309d82 radeonsi: restructure si_get_ps_input_cntl for future refactoring
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák b59bb9c07a radeonsi: force flat for PrimID early in si_nir_scan_shader
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 5cdbbcc2ab radeonsi: eliminate a not-found conditional for PrimID in si_get_ps_input_cntl
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 3ea3621b8d radeonsi: determine num_vbos_in_user_sgprs from template arguments in draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák a65f99b2d1 radeonsi: deduplicate si_compiler_ctx_state initialization
to remove it from si_update_shaders

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 7a20110ad3 radeonsi: precompute si_vgt_stages_key for NGG in si_shader
to remove this overhead from si_update_shaders

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 5a131566b1 radeonsi: move flat shading VRS enablement out of si_update_shaders
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák eed149aa7c radeonsi: move DB_SHADER_CONTROL update for PS out of si_update_shaders
It only depends on the pixel shader CSO and alpha test.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 70220a1896 radeonsi: check flatshade and sprite_coord_enable for spi_map in bind_rs_state
it doesn't need to be in si_update_shaders

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 2dfe01db01 radeonsi: optimize scratch buffer size updates using C++ template arguments
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 98d07e1928 radeonsi: make si_update_shaders a C++ template in si_state_draw.cpp
This reduces driver overhead.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák dff6dc0316 radeonsi: unset SI_PREFETCH_* only when we unbind pm4 shader states
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 76fe6a0242 radeonsi: move PS inputs_read computation out of si_get_vs_key_outputs
to reduce overhead of si_update_shaders

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 35a42377cd radeonsi: move si_shader_io_get_unique_index calls out of si_get_vs_key_outputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 6d1ab77a8f radeonsi: rewrite inlinable uniform states for shader keys in si_context
directly update the shader keys in si_context

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák aed93eb991 radeonsi: update the VS shader key in set & bind functions and remove memsets
This decreases overhead of si_update_shaders and overall driver overhead.

The VS shader key portion related to VS inputs is updated in set & bind
functions. Other fields related to outputs are still updated
in si_shader_selector_key.

Now that all modified fields are set to 0 when not needed, and remove
the memsets.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 74a0c9bd51 radeonsi: clean up and clear VS shader key fields related to outputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák dbdde903bb radeonsi: update most of the PS shader key in set & bind functions
This decreases overhead of si_update_shaders and overall driver overhead.

There is only one function that depends on the rasterized primitive type,
and thus it can't be moved to set & bind functions.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 7e3c03bc6a radeonsi: ignore blitter when computing the PS shader key
it doesn't have any effect

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 00d1d947ea radeonsi: divide si_update_ps_shader_key into many separate functions
they will be used in bind functions etc.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 59072ee484 radeonsi: don't memset part in si_update_ps_shader_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 60580c04c0 radeonsi: don't memset mono and opt in si_update_ps_shader_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 46bda71a54 radeonsi: move PS shader key code into a separate function
There is reordering and new comments.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák a912c80439 radeonsi: sink memsets and disable uniform inlining in si_shader_selector_key
to facilitate refactoring. Uniform inlining will be re-enabled later.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 0b1fd84950 radeonsi: handle NO_OPT_VARIANT in si_shader_select_with_key
so as not to change the keys in si_context

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 03b5a94258 radeonsi: add const to the key parameter in si_shader_select_with_key
The keys will match the current state, so we shouldn't change them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Marek Olšák 9df5ebe5bf radeonsi: fix DCC image stores with image descriptors in user SGPRs
The bug workaround was not applied there.

Fixes: 34a2c75310 - radeonsi: enable DCC stores on gfx10.3 APUs for better performance

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12809>
2021-09-13 22:23:27 +00:00
Marek Olšák a5ea2ef93e radeonsi: copy a few nir_shader_compiler_options from RADV
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12809>
2021-09-13 22:23:27 +00:00
Marek Olšák 3d1ca01e41 radeonsi: fix DCC image stores with display DCC
Fixes: 34a2c75310 - radeonsi: enable DCC stores on gfx10.3 APUs for better performance

Tested-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12809>
2021-09-13 22:23:27 +00:00
Marek Olšák eddb65ffb0 radeonsi: don't use NGG passthrough if culling is possible for better perf
Switching NGG passthrough on/off decreases performance because it causes
context rolls.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 0e64252912 radeonsi: add AMD_DEBUG=ib to print IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 2817ca1aef radeonsi: don't emit PA_SU_POLY_OFFSET_CLAMP if it has no effect
this is more efficient even

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 1d4e47e1db radeonsi: remove a few fields from si_state_rasterizer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 1f8be99621 radeonsi: enable shader-based prim culling with polygon mode
Polygon mode should have no effect on culling, so keep it enabled.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 64a06f8167 radeonsi: skip setting some PGM_HI registers by switching to 32-bit addresses
Other registers benefit from consecutive register offsets for the smallest
command buffer size.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák a2a7610e1f radeonsi: strengthen the VGT_FLUSH condition in begin_new_gfx_cs
Cc: mesa-stable

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 8d7846cfed radeonsi: reduce the frequency of switching GS fast launch on/off
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 576f8394db radeonsi: remove the primitive discard compute shader
It doesn't always work, it's only useful on gfx9 and older, and it's too
complicated.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4011

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:03 +00:00
Marek Olšák 9e994560ff radeonsi: correct index_bias_varies usage
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:02 +00:00
Marek Olšák f734152b62 radeonsi: don't update shaders if only the vertex element count changes
Only check if the relevant fields changed.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:02 +00:00
Marek Olšák 58f0ca8685 radeonsi: accurately check if instance divisors need a VS update
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:02 +00:00
Marek Olšák ece92ecc35 radeonsi: ignore the vertex element count in si_shader_selector_key_vs
It's always at least num_inputs, so just use num_inputs.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:02 +00:00
Marek Olšák 0186c788b6 radeonsi: don't set prefer_mono for fetched instance divisors
It's not necessary because the overhead is very low and the comment isn't
true anymore. (the divisions are fast now)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12812>
2021-09-10 23:32:02 +00:00
Qiang Yu d33eeb2634 radeonsi: enable nir option pack_varying_options
flat interpolation type is not enabled because we need to set
    SPI_PS_INPUT_CNTL_x.FLAT_SHADE=1
which is per vec4.

16 bit varying also need to set
    SPI_PS_INPUT_CNTL_x.FP16_INTERP_MODE
but varying packing only support 32 bit, so we don't need to
worry about this for now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12537>
2021-09-09 06:00:58 +00:00
Marek Olšák 3fb229e010 ac,radeonsi: load VS inputs at the call site of nir_intrinsic_load_input
to match ACO

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák bce7c7f3fc ac/llvm: implement nir_intrinsic_elect
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák 1e178f7a37 ac: make ac_shader_abi::inputs an array instead of a pointer
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák 6df5f268db ac: remove needless parameters from ac_shader_abi::emit_outputs
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák a33602b1f9 ac/llvm: remove load_tess_coord callback
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Emma Anholt 17332ceb0f mesa/st: Add an optional GLSL link fail msg to finalize_nir.
GLES2 drivers are allowed to reject some GLSL constructs, like dynamic
loop bounds (which neither i915g nor vc4 can fully support), but gallium
hasn't had any way to trigger a link failure.  Add a return msg to the
finalize_nir hook, which is called at the end of GLSL linking, and use
that.  This means that some other callers of finalize need to do something
with the msg, and we (for now) just throw it away.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>
2021-09-06 18:09:25 +00:00
Marek Olšák ef190b9e15 radeonsi: clean up typecasts in compute_copy_image
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák 34a2c75310 radeonsi: enable DCC stores on gfx10.3 APUs for better performance
There is just one hw bug that we need to handle.

NO_DCC_FB was unused.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák c88a546550 radeonsi: track displayable_dcc_dirty for non-compute shaders
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák 8c845d4cb4 radeonsi: rename DCC_WRITE -> ALLOW_DCC_STORE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák 550f859c53 radeonsi: handle pipe_aligned in compute_expand_fmask
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák 0c39597734 radeonsi: add missing make_CB_shader_coherent for DCC stores into copy_image
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák cb845c53f4 radeonsi: enable DCC stores for clear_render_target on gfx10
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák b648d6fbf8 radeonsi: disable DCC stores on Navi12-14 for displayable DCC to fix corruption
This is a hardware limitation.

Fixes: 1d64a1045e "radeonsi: enable dcc image stores on gfx10+"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
2021-09-01 07:51:30 +00:00
Marek Olšák e05ad2680c radeonsi: set gfx10 registers better in si_emit_initial_compute_regs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák deacef5d43 radeonsi: fix a memory leak in si_get_shader_binary_size
Fixes: bf8a1ca902 "radeonsi: use the new run-time linker for shaders"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5272

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák 6cb2f07e90 radeonsi: add si_print_current_ib function for debugging
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák f28552b804 radeonsi: don't use SQ_NON_EVENT before GE_PC_ALLOC for better perf on Navi1x
SQ_NON_EVENT was originally meant to fix a perf issue on Navi1x, but using
the event actually makes the perf worse.

This improves perf for viewperf/snx.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák 9fb77745f5 radeonsi: inline si_need_gfx_cs_space
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák 48632778b9 radeonsi: simplify si_need_gfx_cs_space
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák 85742b28ef radeonsi: inline remaining big functions in draw_vbo for better snx perf
This makes compilation slower, but the perf improvement is ~4%
with pipe_vertex_state.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák b15c413947 radeonsi: simplify memory usage checking by merging vram and gtt counters
no change in behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák b92e109ac6 radeonsi: correctly use cs instead of gfx_cs in build pm4 helpers
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:58 +00:00
Marek Olšák b29741906d radeonsi: use memcmp and radeon_emit_array in radeon_opt_set_context_regn
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák 0aed2d0cd3 radeonsi: stop using AC_EXP_PARAM_UNDEFINED because it's not useful
Just use AC_EXP_PARAM_DEFAULT_VAL_0000 to keep things simple.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák 2027831aaa radeonsi: inline si_get_alpha_test_func
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák c005b2cd4b radeonsi: move as_ls/es/ngg setting out of si_shader_selector_key
Do it when we bind shaders.

The advantages are:
- no need to memset the fields when any shader variant state is changed
  (e.g. culling on/off)
- no need to recompute the fields every time that happens

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák 5a8a716168 radeonsi: move si_vgt_stages_key determination into si_update_vgt_shader_config
This simplifies si_update_shaders. It also makes it more obvious that
si_update_shaders could become a C++ template one day.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák ec37db756e radeonsi: remove stages_key parameter from si_shader_selector_key
no change in behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák 08310f85ae radeonsi: remove instancing support from the prim discard compute shader
It's not important for workstation apps on Vega.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Marek Olšák 9ec707ca37 radeonsi: remove unused depth_clamp_any
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
2021-09-01 00:42:57 +00:00
Dave Airlie 3235b695b2 u_blitter: add support for sample0 only resolves.
This adds support for sample0 only resolves to support lavapipe

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12504>
2021-08-31 23:26:45 +00:00
Timur Kristóf 346eb08a3d radeonsi: Change GS vertex offset arguments to use gs_vtx_offset array.
This makes RadeonSI behave like RADV, and hence makes it possible to
use the NIR based ESGS I/O lowering and NGG lowering.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12511>
2021-08-26 05:20:15 +00:00
Marek Olšák 625f00d37c gallium: change pipe_draw_info::mode to uint8_t on MSVC to make it 1 byte large
needed by u_threaded_context

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12480>
2021-08-24 10:43:44 -04:00
Marek Olšák aad7a1d79a radeonsi: remove vertices_per_patch parameter from draw-related functions
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12351>
2021-08-21 00:08:11 +00:00
Marek Olšák 10a46226b1 gallium: remove vertices_per_patch, add pipe_context::set_patch_vertices
We would like draw-only display lists to have immutable draw info and
this is the only GL non-draw state in pipe_draw_info (not counting
view_mask).

It also allows removing some code from draw_vbo for tessellation.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12351>
2021-08-21 00:08:11 +00:00
Marek Olšák bb89cf4bf3 gallium: add take_ownership into set_sampler_views to skip reference counting
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12334>
2021-08-20 15:04:20 +00:00
Marek Olšák 6fc38d3b07 radeonsi: allow arbitrary swizzle modes for displayable DCC
by adding retile shader variants

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12430>
2021-08-20 14:28:36 +00:00
Filip Gawin e6d996f8ff radeonsi: improve rounding of zmin
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12389>
2021-08-17 01:09:51 +00:00
Rhys Perry 795f3b7318 ci: update trace hashes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8056>
2021-08-16 17:19:45 +00:00
Ian Romanick 5f2dbd45f2 gallium: Remove "optimize" parameter from pipe_screen::finalize_nir
As part of adding support for inline uniforms in Iris, I was going to
add a finalize_nir hook.  I went looking to see how other drivers use
the "optimize" parameter, and I discovered that *nobody* uses it at all.

v2: Fix typo in commit message.  Noticed by Mike.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12317>
2021-08-13 15:45:29 -07:00
Pierre-Eric Pelloux-Prayer 777de86eb1 radeonsi/test: add Sienna Cichlid expected results
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12306>
2021-08-12 11:47:36 +02:00
Pierre-Eric Pelloux-Prayer a92367209f radeonsi/test: prettier output
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12306>
2021-08-12 11:47:36 +02:00
Pierre-Eric Pelloux-Prayer 66709f1a40 radeonsi/test: allow to pass a filename as a test filter value
This allows this pattern:

   $ radeonsi-run-tests.py /tmp/foo
   ... reports that some piglit tests regressed ...
   $ radeonsi-run-tests.py -t /tmp/foo/new_baseline/sienna_cichlid-piglit-quick-fail.csv
   ... this only runs the test that regressed ...

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12306>
2021-08-12 11:47:36 +02:00
Pierre-Eric Pelloux-Prayer 55a40acd61 radeonsi/test: format radeonsi-run-test.py with black
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12306>
2021-08-12 11:47:36 +02:00
Pierre-Eric Pelloux-Prayer ac321c6fcf radeonsi/test: fix test script args handling
Fixes: 20055a307d ("radeonsi: add -t option to the test script")
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12306>
2021-08-12 11:47:36 +02:00
Marek Olšák 59fe704c45 gallium: simplify VRAM uploads by adding PIPE_RESOURCE_FLAG_DONT_MAP_DIRECTLY
When this flag is set, u_threaded_context will try not to map it directly
for better buffer placement. It's set by drivers when visible VRAM is too
small.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12257>
2021-08-09 11:58:48 +00:00
Marek Olšák da538eb368 radeonsi: improve viewperf snx performance by forcing staging for VRAM buffers
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12257>
2021-08-09 11:58:48 +00:00
Pierre-Eric Pelloux-Prayer 9fe8ae3fcd radeonsi: don't create an infinite number of variants
If a shader has code like this:

   uniform float timestamp;
   ...
   if (timestamp > 0.0)
      do_something()

And timestamp is modified each frame, we'll end up generating a new
variant per frame.

This commit introduces a hard limit on the number of variants we generate
for a single shader.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5121
Fixes: b7501184b9 ("radeonsi: implement inlinable uniforms")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12138>
2021-08-09 10:26:54 +00:00
Pierre-Eric Pelloux-Prayer 20055a307d radeonsi: add -t option to the test script
This allows to easily run a subset of the tests without having
to figure out which test suite(s) they belong to.

dEQP cannot use this option because currently "deqp-runner suite"
don't have it.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12215>
2021-08-09 10:11:58 +00:00
Pierre-Eric Pelloux-Prayer 4a69667cdd radeonsi: fix test script's output
This line was dropped in the last refactoring. We need
to clearly state to the user if the new results are
different to the expected ones.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12215>
2021-08-09 10:11:58 +00:00
Tomeu Vizoso 19670129c5 ci: Update canvas_text trace
The previous one had all rendering and setup in a single frame, so
repeatedly replaying it for performance tracking was reaching OOM due to
the repeated creation of resources that weren't being released.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12195>
2021-08-05 05:44:57 +00:00
Emma Anholt 08d6361591 ci: Update piglit to 4545a28cd8fea03fbab0e5f90bfbd812c32f3be1
Brings in duplicate subtest fixes, gpu_shader4 tests, and more.  This
shuffles the radeonsi fractional test run, so we get to catch up with more
failing subtests.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12110>
2021-08-03 18:32:01 +00:00
Timothy Arceri a9ed4538ab nir: add indirect loop unrolling to compiler options
This is where it should be rather than having to pass it into the
optimisation pass every time.

It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064>
2021-08-03 10:54:50 +00:00
Rob Clark 6edf0d8e90 driconfig: Add support for device specific config
Add support for driconf overrides on a per-device level, for cases
where we don't want to override behavior for all devices supported
by a particular driver.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
2021-08-02 16:37:24 -07:00
Emma Anholt b080aa9466 gallium/driconf: Allow the driver to parse the driconf options.
This will give the driver a chance to set a device name separate from the
driver name, using info probed during screen creation.  All drivers
querying driconf in screen creation now have to call parsing on their own,
but other drivers get fallback parsing after screen creation.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
2021-08-02 16:35:07 -07:00
Pierre-Eric Pelloux-Prayer 1ff53359cb radeonsi: add expected tests results for Navi10 GPU
These results will not be enforced by CI, but they'll be helpful to test
a changeset against a baseline.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9561>
2021-08-02 17:27:15 +02:00
Pierre-Eric Pelloux-Prayer 1c8f23cf93 radeonsi: add a script to run piglit/glcts/deqp tests
To make it easy to run deqp-runner/piglit-runner.

It's heavily based on Marek' script from:
  https://github.com/marekolsak/marek-build/blob/master/run-piglit.sh

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9561>
2021-08-02 17:27:15 +02:00
Pierre-Eric Pelloux-Prayer 3914bd457b amd/registers: fix fields conflict detection
The existing code handled the case where the new definition of the
same field was larger than the old one.
This commit adds a check to handle the reverse case: the new def
is smaller than the old one (= so writing using the merged macro
would affect the next fields).

The affected fields are:
* LGKM_CNT (in SQ_WAVE_IB_STS)
* DONUT_SPLIT (in VGT_TESS_DISTRIBUTION)
* HEAD_QUEUE (in GDS_GWS_RESOURCE)

DONUT_SPLIT is the only one used by radeonsi/radv.

Fixes: e6184b0892 ("amd/registers: scripts for processing register descriptions in JSON")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12063>
2021-07-30 08:50:38 +00:00
Pierre-Eric Pelloux-Prayer bdcefb8ec4 radeonsi: preserve derivatives after discards for ARB shaders
Contrary to the GLSL spec, the ARB fp spec doesn't explicitely
states that derivatives are undefined after discards.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5018
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11972>
2021-07-28 08:49:30 +00:00
Thong Thai 8236320a0b radeonsi: enable H.264 temporal encoding support for VCN
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
2021-07-26 15:05:48 -04:00
Jason Ekstrand e83fe65cd8 radv,radeonsi: Do cube size divide-by-6 lowering in NIR
No point in carrying all this code around twice each in two back-ends.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12005>
2021-07-22 14:22:35 -05:00
Daniel Stone d8bfad70dc Revert "CI: Disable LAVA devices"
This reverts commit 1f4ff4ed2e6fbefb5026d8300a80049ccf4912a5.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12016>
2021-07-22 08:42:40 +01:00
Daniel Stone 7b8bb81e82 CI: Disable LAVA devices
We've had a physical machine death, and the restore/transfer is achingly
slow at the moment. Some of the devices are still fine, but
conservatively just kill the lot until it's all recovered.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11997>
2021-07-21 17:26:43 +01:00
Mike Blumenkrantz 01414d435c radeonsi: use new tc util for setting bytes_mapped_limit
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>
2021-07-20 13:49:01 +00:00
Olivier Fourdan 5bfd1a7e19 radeonsi: Check aux_context on si_destroy_screen()
The function radeonsi_screen_create_impl() tries to create the
aux_context but doesn't actually check for the returned value from
si_create_context().

Then, on si_destroy_screen() the aux_context is used without actually
checking whether it's a thing or not.

As a result, if for any reason si_create_context() failed, we shall
crash in si_destroy_screen() with a NULL pointer dereference trying to
access ((struct si_context *)sscreen->aux_context)->log.

Simply check for aux_context not being NULL to avoid that crash.

Cc: mesa-stable
Signed-off-by: Olivier Fourdan <ofourdan@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11948>
2021-07-20 09:15:47 +00:00
Marek Olšák 1abc480b5a radeonsi: document a missing synchronization for bindless textures
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11900>
2021-07-16 23:08:00 +00:00
Yogesh mohan marimuthu 7f9b3a7098 radeonsi: set scratch_state dirty only if ctx->scratch_buffer allocated
if ctx->scratch_buffer is NULL, then no need to update SPI_TMPRING_SIZE
size register.

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11900>
2021-07-16 23:08:00 +00:00
Yogesh mohan marimuthu be9ca62247 radeonsi: remove redundant setting scratch_state atom dirty
Whenever scratch buffer is allocated, current spi_tmpring_size and
previous spi_tmpring_size cannot be same and hence scratch_state will be
set dirty as part of "if (spi_tmpring_size != sctx->spi_tmpring_size)".
Removing redundant dirty bit sat while allocating scratch buffer.

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11900>
2021-07-16 23:08:00 +00:00
Marek Olšák 86ff5b7ddb radeonsi: don't expose no-attachment MSAA 16x on all 1 RB chips due to issues
Cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11900>
2021-07-16 23:08:00 +00:00
Emma Anholt 446bf13e48 ci: Make sure that we build the piglit dmabuf tests.
Force the option rather than relying on autodetection -- ARM runners were
apparently finding the necessary deps, but the x86 rootfs (radeonsi, iris)
and x86_test-gl container (i915g) were not.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11834>
2021-07-13 16:31:06 +00:00
Samuel Pitoiset 29f264f258 ac,radv: implement the cs_regalloc_hang HW bug workaround
Might fix spurious failures on GFX6 and some GFX7 chips.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11675>
2021-07-09 13:37:37 +00:00
Marek Olšák 6ede24cf31 util/idalloc: fold the size call into init
It's required, otherwise idalloc would fail.

v2: renamed util_idalloc_(mt_)init param initial_num_ids  (Pierre-Eric)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11493>
2021-07-09 10:05:46 +00:00
Jason Ekstrand d4b482d378 android: Drop the Android.mk build system
Android.mk files haven't really been supported by Mesa devs for a long
time.  Most of us have been willing to update Makefile.sources if we
remember and sometimes we try to blind code some Android.mk for a new
generator.  However, the reality is that it breaks regularly and ends up
being maintained by the Android community.  To address this problem
another approach was implemented in !10183 utilizing the maintained
meson build system.  The old Android.mk files are no longer required.

This commit was created with the following commands:

    git rm **/Android.mk
    git rm **/Android.*.mk
    git rm **/Makefile.sources
    git rm CleanSpec.mk

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4487
Acked-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9728>
2021-07-08 14:44:02 -05:00
Marek Olšák c5478f9067 radeonsi: enable uniform inlining by default
I think there is no reason to keep this disabled because it improves
viewperf and it might improve other things.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Marek Olšák b2397c394d ac,radeonsi: move late alloc computation into common code and shader states
This also fixes a rare deadlock when a scratch buffer is used.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Marek Olšák 30604e65cb radeonsi: move an incorrectly placed comment about late alloc
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Marek Olšák 66f254b4e6 radeonsi,radv: fix a late alloc deadlock with <= 6 CUs per SA
We should always prevent 1 CU from executing VS and GS waves
to prevent a deadlock.

Fixes: c377f45c18 "radeonsi/gfx10: rewrite late alloc computation"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Marek Olšák 9aa53d7ac4 radeonsi: rewrite a confusing comment in si_upload_and_prefetch_VB_descriptors
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Marek Olšák 6546f28cc8 radeonsi: drop smoothing quality to 4xAA for better performance
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Connor Abbott e4e79de2a4 nir/subgroups: Support > 1 ballot components
Qualcomm has a mode with a subgroup size of 128, so just emitting larger
integer operations and then lowering them later isn't an option. This
makes the pass able to handle the lowering itself, so that we don't have
to go down to 64-thread wavefronts when ballots are used.

(The GLSL and legacy SPIR-V extensions only support a maximum of 64
threads, but I guess we'll cross that bridge when we come to it...)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>
2021-07-08 16:02:41 +00:00
Connor Abbott 90819b9b0e nir/subgroups: Replace lower_vote_eq_to_ballot with lower_vote_eq
Lower it to a vote instead of a ballot. This was only used for AMD, and
in that case they're pretty much the same. However Qualcomm has a vote
builtin, which we want to use instead of ballots.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752>
2021-07-08 16:02:41 +00:00
Daniel Stone 0c09498fe9 Revert "CI: Disable LAVA devices for maintenance"
This actually came back a few hours ago.

This reverts commit b07dc014c44849af59f98afa3a1703c9d9d3cf27.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11669>
2021-07-01 06:59:07 +00:00
Daniel Stone e4f762ac34 CI: Disable LAVA devices for maintenance
LAVA will be unavailable for probably most of the day today due to
scheduled maintenance; doing some spring cleaning to upgrade to a new
version, clean out the database, etc.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11649>
2021-06-30 06:53:45 +00:00
Pierre-Eric Pelloux-Prayer 822f377736 radeonsi/gfx7: always sync pfp/me
Workaround for https://gitlab.freedesktop.org/mesa/mesa/-/issues/4764

Fixes: c5326164 ("radeonsi: add SI_CONTEXT_PFP_SYNC_ME to skip syncing PFP for image operations")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
2021-06-29 23:38:21 +02:00
Pierre-Eric Pelloux-Prayer b72c7c6c56 radeonsi: fix fb_too_small condition
fb->num_layers can be 0 so use util_num_layers(tex) instead.

Fixes: f7c58559f5 ("radeonsi: refine fast clears for small buffers, always use them for large HTILE")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4764
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
2021-06-29 23:38:21 +02:00
Marek Olšák 24292cc003 radeonsi: move the accepting code into the bbox cull branch in prim discard CS
This reduces the number of jumps. No change in behavior.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11510>
2021-06-28 13:23:14 +00:00
Marek Olšák b141e50282 radeonsi: add optimal multi draws and draw-level splitting for prim discard CS
This is a partial rewrite of some parts of the code.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11510>
2021-06-28 13:23:14 +00:00
Marek Olšák 81365c86f9 radeonsi: fix issues with draw-level splitting for the prim discard CS
- move the unreachable statement up by inlining u_decomposed_prims_for_vertices
- the last draw was not submitted after splitting
- move "count" to the non-multi draw path

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11510>
2021-06-28 13:23:14 +00:00
Marek Olšák 9fa0d2cf35 radeonsi: change how the prim discard CS is enabled and splitting limits
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11510>
2021-06-28 13:23:14 +00:00
Marek Olšák 06da711350 radeonsi: remove the GDS variants of compute-based primitive discard
The GDS ordered append variant is unstable due to kernel and firmware bugs.
The unordered GDS variant isn't faster than the memory-based variant.

Only the memory-based variant is kept.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11510>
2021-06-28 13:23:14 +00:00
Marek Olšák 888b7ba338 radeonsi: optimize set_inlinable_constants when they don't change
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11509>
2021-06-23 22:37:34 -04:00
Marek Olšák ff42fd1fdf radeonsi: don't use NGG culling on 1 RB chips
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11509>
2021-06-23 22:37:31 -04:00
Marek Olšák f7afcc3d11 radeonsi: remove incorrect comment about hangs in gfx10_ngg_gs_emit_epilogue
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11509>
2021-06-23 22:37:29 -04:00
Marek Olšák 593f3b3a5a radeonsi: if shader culling culls all vertices, cull the primitive exports too
This was overlooked. It benefits triangle strips the most due to
GS fast launch.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11509>
2021-06-23 22:37:27 -04:00
Marek Olšák defc7c92d9 radeonsi: document why VBO descriptors in user SGPRs are beneficial
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11509>
2021-06-23 22:37:23 -04:00
Pierre-Eric Pelloux-Prayer 52547cfbd0 radeonsi: disable ngg culling on llvm < 12
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4874
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11362>
2021-06-23 08:42:46 +00:00
Samuel Pitoiset 3d8d6ebcb0 ac/perfcounters: rename num_multi to num_spm_counters
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
2021-06-22 06:38:54 +00:00
Samuel Pitoiset da94772510 ac/perfcounters,radeonsi: rework performance counters layout
Instead of having different layouts which might complicate things when
some registers are missing, hardcode the SELECT and SELECT1 registers
into separate arrays.

The SELECT registers are "legacy" counters, while the SELECT1 registers
are SPM counters.

This is more verbose and emit more UCONFIG registers, but emitting the
SELECT registers is now much simpler and it seems less error prone.
This will also help emitting the SPM configuration.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
2021-06-22 06:38:54 +00:00
Samuel Pitoiset 66a34be6ac ac/perfcounters: remove ac_pc_block_base::num_prelude
This seems unnecessary if the first select register is correctly set.
This CB filter was always disabled anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
2021-06-22 06:38:54 +00:00
Marek Olšák 6a2e3d2736 radeonsi: cleanup some primitive discard CS TODOs regarding instancing, etc.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák 4b5eb336e1 radeonsi: skip buffer_atomic_add(ptr, n) when n=0 in the prim discard CS
This improves performance of the shader nicely.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák df4de12af4 radeonsi: drop support for triangle fans from the prim discard CS
because it doesn't implement triangle fan splitting, so it's incomplete

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák 4fa58c04e4 radeonsi: drop gfx7 support from the prim discard CS to simplify code
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák fc95ba6c86 radeonsi: remove the Z culling option from the primitive discard CS
Not useful.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák a448074d05 radeonsi: don't compile TES and GS draw_vbo variants for the prim discard CS
This also fixes the incorrect emit_draw_packets template argument.
The condition should be inverted.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák b35b5926c9 radeonsi: try to keep all VS input loads together for better perf
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák 901f4aa5d6 radeonsi: remove incorrect comment about PA
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák ce4f4a8d13 radeonsi: set more precise max_waves in NGG code
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák 1e9cc86511 radeonsi: merge 2 conditional blocks with same condition into 1 in culling code
The block only loads input VGPRs from LDS, and the next block uses them.
The entering condition is the same, even though the second block is
the next shader part beginning with the prolog.

Simply move the VGPR loads into the prolog.

This decreases the shader code size by 12 bytes.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák 786678a017 radeonsi: restructure si_get_vs_vgpr_comp_cnt for readability
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11102>
2021-06-21 19:03:29 +00:00
Marek Olšák 9c3225cb53 radeonsi: move the accepting code into the bbox cull branch in NGG cull code
This reduces the number of jumps. No change in behavior.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 12d2df15f1 ac/llvm: add a callback to ac_cull_triangle to generate code in inner-most block
This will reduce jumps in culling code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 1805572694 radeonsi: fix multi draws for the prim discard CS
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 848dbe9ff7 radeonsi: fix incorrect counting of compute_num_verts_rejected
Both cases should subtract to undo what is done in the conditional.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 3cde2f96f9 radeonsi: use ac_build_bit_count instead of opencoding it
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Marek Olšák 70b5a5cbbf radeonsi: fix compile failures with SI_PRIM_DISCARD_DEBUG enabled
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
Pierre-Eric Pelloux-Prayer 66dbd16f38 radeonsi: skip instance_count==0 draws on <= GFX9
This changes seems to prevent a hang, at least on Renoir chips.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4866
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11356>
2021-06-18 09:18:47 +02:00
Pierre-Eric Pelloux-Prayer edb77ec3c7 radeonsi: delay sample_pos_buffer creation until first use
And use pipe_buffer_create_with_data instead of doing it
manually.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11296>
2021-06-17 09:10:29 +02:00
Marek Olšák 97a5753812 radeonsi: remove -Wstrict-overflow=0 since it doesn't seem to be needed
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Marek Olšák 72a395b6de radeonsi: remove the chip_class dimension from the draw_vbo array
We don't use/initialize draw_vbo callbacks for other generations anymore.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Marek Olšák 1e4d91355f radeonsi: compile si_state_draw.cpp for each gfx generation separately
It makes compilating faster.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Marek Olšák 24895f020a radeonsi: move a few functions from si_state_draw.cpp into si_gfx_cs.c
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11384>
2021-06-16 21:29:13 +00:00
Mike Blumenkrantz a3a6611e96 util/queue: add a global data pointer for the queue object
this better enables object-specific (e.g., context) queues where the owner
of the queue will always be needed and various pointers will be passed in
for tasks

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11312>
2021-06-16 15:10:09 -04:00
Marek Olšák d305a8fc5f radeonsi: set desc[3] of all buffer descriptors at context creation
instead of at bind time. When we unbind, we shouldn't memset the last
element.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák 42801731b8 radeonsi: remove no-op unref in si_set_constant_buffer
buffer is already NULL here

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák a29ff4c67e radeonsi: restructure si_set_sampler_views for faster unbinding trailing slots
si_set_sampler_view updates only one slot. This rewrites it to update
multiple slots.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák 10cf7b3031 radeonsi: don't clear register fields in si_set_mutable_tex_desc_fields
They are always initialized to 0.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák 810e84387b radeonsi: use the restrict keyword to set sampler view descriptors faster
All places must set restrict for the same pointer.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Marek Olšák 53853d0b27 radeonsi: check is_buffer once instead of 4 times in si_set_sampler_view_desc
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11340>
2021-06-16 17:14:49 +00:00
Ian Romanick 5971f29c8f radeonsi: Use util_cpu_caps to detect number of CPUs
The next patch will change the way the number of CPUs is detected, and
this change prevents some code duplication.

v2: Add missing #include.  Noticed by Pierre-Eric... not sure how I
missed it. :(

Reviewed-by: Adam Jackson <ajax@redhat.com> [v1]
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11228>
2021-06-15 20:01:52 +00:00
Daniel Stone a8c1155209 ci/bare-metal: Set CPU and GPU governors to max, disable GPU runtime PM
Give us a bit more predictable performance by making sure we always run
at full tilt.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Daniel Stone 0d6dd44818 ci: Unify {BM,LAVA}_START_XORG environment
Why were they ever different ... ?

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Daniel Stone 0fcb53e8f4 ci/lava: Use HWCI_KERNEL_MODULES to load modules
One fewer difference to bare-metal.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Martin Peres <martin.peres@mupuf.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11337>
2021-06-15 14:02:44 +02:00
Pierre-Eric Pelloux-Prayer b78a38bd02 radeonsi: use si_nir_is_output_const_if_tex_is_const
When a blending mode producing "color = src * dst" is used and we
can determine that dst is 1, then the draw call can dropped completely.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 11:18:02 +02:00
Pierre-Eric Pelloux-Prayer 83250036be radeonsi/nir: add si_nir_is_output_const_if_tex_is_const
Determine if a given shader write the same constant value to its output
if a specific input texture is replaced by constant load.

It's done by checking if the store_output intrinsics only depends on
constant and a texture. If it's true, the given texture is replaced by
a constant load in cloned shader and this clone is optimized.

Then the output is checked (= is it constant or not).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 11:18:02 +02:00
Pierre-Eric Pelloux-Prayer 9675de4c18 radeonsi: use si_install_draw_wrapper for tmz handling
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 10:19:07 +02:00
Pierre-Eric Pelloux-Prayer b2bd9c5ccd radeonsi: add si_install_draw_wrapper
This allows to implement custom draw_vbo code-path without
touching si_draw_vbo.

As an example, skipped all draw calls with an odd new_draws
could be done like this:

   void mywrapper(...) {
   	   if (new_draws % 2)
   	      return;
   	   return sctx->real_draw_vbo(...);
   }

   if (some_condition_is_met)
      si_install_draw_wrapper(sctx, mywrapper);

Instead of having to add the "if ()" condition inside si_draw_vbo.

Note that a single wrapper may be installed so care must be taken
to not override an existing wrapper.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 10:19:04 +02:00
Pierre-Eric Pelloux-Prayer ff8a930cf7 radeonsi: add _once suffix to depth_cleared_level_mask
And add a new variable to disambiguate between "has been cleared once" and
"is cleared".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10979>
2021-06-15 10:19:02 +02:00
Mike Blumenkrantz 74abd5df0e aux/tc: pass rebind count and rebind bitmask with replace_buffer_storage func
tc already calculates all the rebinding that needs to be done on a given
context, so (some of) this info can be passed on to drivers to enable
optimizations

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11245>
2021-06-14 20:42:47 +00:00
Emma Anholt 323abf2fb2 ci/piglit: Skip glx_arb_sync_control@timing.* on all systems.
The test involves timestamping to figure out how long a swap actually
takes, but if anything ends up rescheduling the process you can end up
spuriously failing.  I could easily reproduce flakiness by just running a
loop accessing the filesystem in parallel with a loop running the test.
So, it's certainly not usable on a CI system with other piglit tests
running in parallel, and we don't want to run it if it's going to just
produce flake noise.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11333>
2021-06-14 12:09:19 -07:00
Emma Anholt e594b18d6a ci/piglit: Move the WGL skip to a common skips file.
This will also give us a central place to handle known CI issues for
piglit.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11333>
2021-06-14 12:09:19 -07:00
Emma Anholt 9cc1f08919 ci/deqp: Skip flush_finish on all CI jobs.
They're too slow to run in CI even on non-tiled renderers, they don't
block conformance (unless you crash), and provide unreliable warning
results unless you isolate them from other activity on the system.

This means that the following jobs now skip these tests:

- deqp-iris-*
- deqp-llvmpipe (you know, the one mentioned in the comment!)
- deqp-virgl-gl
- deqp-zink-lvp

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11333>
2021-06-14 12:09:19 -07:00
Emma Anholt e8ca9b99cb ci/deqp: Drop stress/perf skips lists.
The mustpass doesn't have any tests matching these, so no need to
skip. These tests only show up if you run without using a mustpass list.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11333>
2021-06-14 12:09:19 -07:00
Daniel Stone d0e5203855 ci/lava: Use per-job rootfs overlay for environment
Trying to get arbitrary strings suitably quoted for shell, embedded in a
YAML file, processed by Python templating, is like seven bad ideas all
embedded into one big can of bees.

Reuse the same script we use for bare-metal to generate the environment,
tar that up into a per-job overlay which is added to the
inter-pipeline-reusable rootfs built by the container jobs and the
intra-pipeline-reusable overlay built by the build jobs.

@anholt wrote a chunk of this - replacing the $ENV_VARS GitLab CI
variable with a Python loop across the POSIX job environment - in
!11192, but this still had YAML quoting nightmares, and was more
needless duplication between LAVA and bare-metal.

The diff is large and annoying, but is mostly a sed job to get
ENV_VARS="FOO=bar BAZ=quux" into FOO: bar\nBAZ: quux.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Co-authored-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
2021-06-11 12:13:00 +00:00
Emma Anholt 71c59aa413 ci/piglit: Skip WGL on all the Linux runs.
We don't build the tests, since we don't have WGL.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11283>
2021-06-10 23:45:36 +00:00
Emma Anholt 53826932db ci: Update piglit and deqp/piglit-runner.
This brings in some major new features in the runner:

- piglit tests now include subtest reporting
- "-t" support for quick include-filtering of tests.
- piglit tests that crash after their result report are considered crashes.
- throws a nice error if you try to annotate the same failure twice
  (e.g. lvp's dEQP-VK.glsl.builtin.precision.pow.highp.vec2,Fail)

Since the runner catches piglit test bugs where the same subtest is run
twice, we also uprev piglit to pull in the fixes for those.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11283>
2021-06-10 23:45:36 +00:00
Tomeu Vizoso e210ed60be ci/lava: Don't overwrite PIGLIT_REPLAY_EXTRA_ARGS
Other Piglit jobs will want different values for this env var.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11293>
2021-06-10 21:05:48 +00:00
Daniel Stone 890f96c0e6 ci: Add Piglit gl-1.0-blend-func to everyone's skips
I've seen this timing out on Zink, v3d, radeonsi, and Panfrost
periodically, but more and more lately. Try to minimise the damage by
just universally skipping it until someone comes up with a better idea.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11267>
2021-06-09 19:46:30 +00:00
Daniel Stone 056719fb3d ci/radeonsi: Skip flaky glx-swap-copy test
This seems to be failing a bunch lately, so let's just skip it for now.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11265>
2021-06-09 17:41:49 +00:00
Caio Marcelo de Oliveira Filho 8af6766062 nir: Move workgroup_size and workgroup_variable_size into common shader_info
Move it out the "cs" sub-struct, since these will be used for other
shader stages in the future.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11225>
2021-06-08 09:23:55 -07:00
Leo Liu 43c04ab2b4 radeonsi: separate video hw info based on HW engine individually
This removes previous "has_hw_decode" and "uvd_enc_supported" and
makes information more accuate for cases where HW decode, HW encode,
and HW JPEG decode might partially available.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11201>
2021-06-08 09:32:48 -04:00
Leo Liu 8ddba3b5ea radeonsi: add PIPE_FORMAT_P010 for HEVC Main10 profile to encode param
The format can be queried through the encode entrypoint

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11201>
2021-06-08 09:32:48 -04:00
Rhys Perry 1cbcfb8b38 nir, nir/algebraic: add byte/word insertion instructions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:42 +00:00
Caio Marcelo de Oliveira Filho c8a7bd0dc8 nir: Rename WORK_GROUP (and similar) to WORKGROUP
Be consistent with other usages in Vulkan and SPIR-V, and the recently
added workgroup_size field.

Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho a71a780598 nir: Rename nir_intrinsic_load_local_group_size to nir_intrinsic_load_workgroup_size
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho 43a6a2151b compiler: Rename SYSTEM_VALUE_LOCAL_GROUP_SIZE to SYSTEM_VALUE_WORKGROUP_SIZE
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho 430d2206da compiler: Rename local_size to workgroup_size
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Pierre-Eric Pelloux-Prayer cd9be8741f radeonsi: dirty msaa_config on rs->multisample_enable change
si_emit_msaa_config uses si_get_num_coverage_samples, and
si_get_num_coverage_samples depends on old_rs->multisample_enable.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4613
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11182>
2021-06-07 09:21:45 +02:00
Samuel Pitoiset aff92f50c6 ac: add ac_thread_trace::data
Instead of passing two different structs to ac_dump_rgp_capture().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11156>
2021-06-03 15:39:34 +00:00
Samuel Pitoiset ea3f72c9d9 ac: rename ac_dump_thread_trace() to ac_dump_rgp_capture()
RGP captures can contain both SQTT and SPM data. While we are at it,
move it to ac_rgp.h and adjust a message.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11156>
2021-06-03 15:39:34 +00:00
Pierre-Eric Pelloux-Prayer 8baa77c813 radeonsi: fix encryption check for buffers
The writable bit means read-write, not just write.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Fixes: 8873ea0e25 ("radeonsi: determine secure flag must be set for gfx IB")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11107>
2021-06-03 08:33:52 +00:00
Pierre-Eric Pelloux-Prayer b377da9122 radeonsi: allow write-only mapping of encrypted textures
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11107>
2021-06-03 08:33:52 +00:00
Samuel Pitoiset 380ac28891 ac: import performance counters from RadeonSI
Performance counters will be used by RADV for VK_KHR_performance_query
and also for adding SPM support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11140>
2021-06-03 07:15:21 +00:00
Tomeu Vizoso 67af3b6bba ci/lava: Switch LAVA jobs to x86 runners
So we don't need to provision aarch64 servers, which are these days
rarer than x8_64.

In the switch to the new runner tags, switch to one which contains the
device type, so we can dimension the runner jobs taking into account the
number of DUTs available.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11108>
2021-06-02 08:14:51 +02:00
Alyssa Rosenzweig a86deb1e72 si: Use Rn_UINT instead of In_UINT for index buffers
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10990>
2021-06-01 23:40:47 +00:00
Mike Blumenkrantz bbbcf14311 radeonsi: clamp clear_buffer values using new util helper
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10822>
2021-05-27 00:23:04 +00:00
Tomeu Vizoso a15cf1ecab radeonsi/ci: Add new Piglit failures
These appeared after the execution order of tests changed after a Piglit
upgrade.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7987>
2021-05-26 18:20:19 +00:00
Marek Olšák 7844bdadac radeonsi: remove DFSM after we discovered how bad it is
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 56a450e984 radeonsi: disable DFSM on gfx9 by default because it decreases performance a lot
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 2fad90dc4a radeonsi: implement threaded context callbacks for resource busy checking
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 9ba17ec21a radeonsi: generate buffer_id_unique for u_threaded_context
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 9dc7fff448 radeonsi: allow changing the NGG subgroup size to 256 but don't change it yet
Currently, 128 seems to have the best performance.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 13acbaecd8 radeonsi: rewrite the prefix sum computation for shader culling
Instead of storing the vertex mask per wave into LDS and then computing
the prefix sum, store 8-bit bitcounts (vertex counts) of the vertex masks
into LDS. This allows us to compute the sum using v_sad_u8, which computes
a sum of 4 i8vec4 components in one instruction.

Each i8vec4 of vertex counts is loaded in parallel threads (one dword
per thread) instead of all being loaded in thread 0, and readlane copies
them to SGPRs instead of readfirstlane.

LDS is no longer initialized before culling. Instead, the counts for
inactive waves are masked with AND later.

Incorrect old comments are also fixed.

This change removes 80 bytes from the code size, and it allows increasing
the workgroup size from 128 to 256. (which is the main motivation for this)

Now changing the workgroup size with wave64 has no effect on the code size.
Switching to wave32 with 8 waves even generates slightly smaller code than
wave64 with 4 waves.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 27c9e77c6a radeonsi: add missing threaded_resource_deinit calls in fail paths
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 64b75cc12e radeonsi: add a gfx10 hw bug workaround with the barrier before gs_alloc_req
Fixes: 8845a23698 - amd: add NAVI10 PCI IDs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 712f74f590 radeonsi: remove 8 bytes from si_resource, turn other 4 bytes into padding
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 5af124c92c radeonsi: change si_resource::alignment to alignment_log2 for better packing
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 0c8d65a39a radeonsi: improve generated culling code by adding optimization barriers
This removes a lot of instructions and 16 bytes from the code size.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 980a70573f radeonsi: re-enable fast launch with indexed tri strips because it doesn't hang
I don't know which change fixed this, but I can't reproduce the hang anymore.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák a0fcd37731 radeonsi: remove a twice duplicated workaround for VERT_GRP_SIZE
This enables better lane occupancy.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák c8e8979d6b radeonsi: fix the fast launch vert/prim thread counts if they are trimmed
This fixes the case when the counts were out of sync because one of them
was decreased.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák f6e19fd831 radeonsi: don't use GS fast launch with small instances
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák e33e525e16 radeonsi: don't disable L2 caching for staging textures
Uncached access can be slow if the box is not aligned nicely.
Also, caching in L2 might enable bigger PCIe bursts.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 36e07198a7 radeonsi: always use the L2 LRU cache policy for faster clears and copies
Waves and CP DMA can finish sooner if L2 doesn't do any evictions, which
is hard to predict.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 805c785314 radeonsi: fix a coherency issue when VS memory stores are not visible in PS
If a shader has no param exports (no varyings), the pixel shader can start
after the VS position is written before the vertex shader finishes.
The fix is to wait for the memory stores before the position export.

The code needs to be restructured. First prepare param exports to get
nr_param_exports, then emit position exports with the wait, and then
emit param exports.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák d8fefb1322 radeonsi: add a gfx10 bug workaround for NOT_EOP
Fixes: cc24ec8c07 - radeonsi: set NOT_EOP for back-to-back draws on gfx10+

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 7effb291e6 radeonsi: handle PIPE_CAP_MAX_VERTEX_BUFFERS
no change in behavior because the value is the same as the default

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák c7e731c737 radeonsi: remove unused SI_IMAGE_ACCESS_AS_BUFFER
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 57e182c75b ac/llvm: allow ac_build_optimization_barrier with SGPRs, pointers, and metadata
sgpr=true prevents moving the value to a VGPR.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 94a1f45e15 ac/llvm: set target features per function instead of per target machine
This is a cleanup that allows the removal of the wave32 target machine and
the wave32 pass manager.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák ade5d9c2a7 amd/registers: regenerate json files without 32-bit register fields
Only a few of those were used in drivers.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
2021-05-25 16:15:44 +00:00
Marek Olšák 80f0726e4c amd: add Beige Goby support
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>
2021-05-24 17:41:34 +00:00
Aaron Liu c54bb135aa amd: add Yellow Carp support
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>
2021-05-24 17:41:34 +00:00
Marek Olšák 0e8100bf58 radeonsi: simplify the NGG culling vertex count heuristic
This removes another chip-specific switch.
It enables a lower threshold on Navi1x, which should be fine.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>
2021-05-24 17:41:34 +00:00
Mike Blumenkrantz f1ba85995c radeonsi: explicitly return support for all index buffer formats
this should not change current behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10914>
2021-05-24 12:44:06 +00:00
Tomeu Vizoso 324dd35d7c ci/lava: Add caching proxies for trace downloads
To avoid having to download the same traces again and again in each job,
use the caching proxy configured in the Collabora lab.

We can currently hardcode it like this because we don't test the same
driver in more than one lab, but when that changes we will need a more
flexible approach.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10949>
2021-05-24 11:35:41 +02:00
Samuel Pitoiset 726cb2d6f6 ac: ac_gpu_info::has_vgt_flush_ngg_legacy_bug
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10911>
2021-05-21 19:46:56 +00:00
Marek Olšák 2670efa1f7 gallium: remove empty structure u_resource_vtbl
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
2021-05-21 17:38:04 +00:00
Marek Olšák 38171635af gallium: remove u_resource_vtbl::transfer_(un)map
This removes the call indirection.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
2021-05-21 17:38:04 +00:00
Marek Olšák eb74f97769 gallium: split transfer_(un)map into buffer_(un)map and texture_(un)map
The u_resource_vtbl indirection is going to be removed.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
2021-05-21 17:38:04 +00:00
Marek Olšák 9effc49569 gallium: remove u_resource_vtbl::resource_destroy
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
2021-05-21 17:38:04 +00:00
Marek Olšák b04044b350 radeonsi: stop using u_resource_vtbl::resource_destroy
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
2021-05-21 17:38:04 +00:00
Marek Olšák 89eaf59092 gallium: remove transfer_flush_region from u_resource_vtbl
It's only used by buffers and only zink uses it privately for textures too.
This is part of removing u_resource_vtbl.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
2021-05-21 17:38:04 +00:00
Marek Olšák 078e129d54 gallium: remove resource_get_handle from u_resource_vtbl
This is the initial step towards removing u_resource_vtbl.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10659>
2021-05-21 17:38:04 +00:00
Andres Gomez 088c7c61cf ci: Uprev piglit to 9d87cc3d79e ("framework/replay: send backend's subprocess stderr to sys.stderr")
This pulls in a fix for replayer to make the backends send their
stderr to sys.stderr always.

v2:
  - Updated piglit results for llvmpipe, softpipe, zink and
    radeonsi-stoney.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> [v1]
Reviewed-by: Martin Peres <martin.peres@mupuf.org> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10854>
2021-05-20 01:13:17 +00:00
Pierre-Eric Pelloux-Prayer 17861aff96 radeonsi: enable glsl_correct_derivatives_after_discard by default
Enabling this option by default allows the nir_opt_move_discards_to_top
to be used more often.

This is only done for LLVM13+ since doing this on LLVM11 hurts a lot of
shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10522>
2021-05-19 18:04:44 +00:00
Pierre-Eric Pelloux-Prayer 7640479028 radeonsi/nir: enable nir_opt_move_discards_to_top pass
Since it affects discards and demotes, this commit also moves the
usage of nir_lower_discard_or_demote ealier.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10522>
2021-05-19 18:04:44 +00:00
Tomeu Vizoso 2a46fcaf02 Revert "CI: Disable all Panfrost/AMD/Iris automatic jobs"
This reverts commit e1d74c9cfd.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10838>
2021-05-17 13:46:45 +00:00
Marek Olšák ec77a2d43a gallium/u_threaded: add callbacks and documentation for resource busy checking
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10662>
2021-05-17 10:37:24 +00:00
Connor Abbott a40714abf7 nir/lower_phis_to_scalar: Add "lower_all" option
We don't want to have to deal with vector phis in freedreno, because
vectors are always split/unsplit around vectorized instructions anyways,
and the stated reason for not scalarising them (it hurting coalescing)
won't apply to us because we won't be using nir_from_ssa. Add this
option so that we don't have to do the equivalent thing while
translating from NIR.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10809>
2021-05-17 09:59:45 +00:00
Daniel Stone e1d74c9cfd CI: Disable all Panfrost/AMD/Iris automatic jobs
The power in Cambridge is unstable; disable these jobs until it's back
clear.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10797>
2021-05-14 04:18:17 +00:00
Erik Faye-Lund e8640fef90 ci: Uprev piglit to 3351e8952 ("max-texture-size: report merged results")
This pulls in a fix for the max-texture-size test using piglit-runner,
among other things.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10749>
2021-05-12 15:47:35 +00:00
Emma Anholt 7520ac54dd ci: Switch to apitraces for glmark2
This brings in upstream mediump fixes, and should also replay faster than
.rdc files.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10295>
2021-05-11 20:07:29 +00:00
Tomeu Vizoso 8b04b77118 ci: Remove the need for an empty Piglit results file
Just create such an empty file if there isn't already.

So drivers that are expected to pass all tests don't need to commit an
empty results file.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10295>
2021-05-11 20:07:29 +00:00
Tomeu Vizoso 43dd023bd1 Revert "CI: Disable Panfrost and radeonsi"
Lab is up and running again.

This reverts commit de1a20f4be.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10663>
2021-05-06 10:32:35 +02:00
Daniel Stone de1a20f4be CI: Disable Panfrost and radeonsi
The Cambridge office is having connection difficulty; disable the jobs
until it comes back.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10658>
2021-05-05 22:10:16 +01:00
Marek Olšák 967757a208 gallium+(u_threaded,r300,r600,radeonsi): move transfer offset into pipe_transfer
Let's use the 4 bytes of unused padding usefully in pipe_transfer.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10527>
2021-05-01 17:38:42 +00:00
Mike Blumenkrantz dae3113c3d gallium: split drawid out of pipe_draw_info and as a separate draw_vbo param
the only case in which this is nonzero is if a multidraw gets split by the frontend,
i.e., mesa core, and in all other cases it can be ignored. the value can also be ignored
for all indirect draws, though it seems many (most?) gallium drivers are not aware of this

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10166>
2021-04-30 03:59:19 +00:00
Mike Blumenkrantz 4566383ae4 gallium: move pipe_draw_info::index_bias to pipe_draw_start_count_bias
this moves index_bias into the multidraw struct, enabling draws where the value
changes to be merged; the draw_info struct member is renamed and moved to the end
of the struct for tc use

u_vbuf still has some checks to split draws if index_bias changes, maybe
this can be removed at some point?

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10166>
2021-04-30 03:59:19 +00:00
Mike Blumenkrantz 4fe6c85526 gallium: rename pipe_draw_start_count -> pipe_draw_start_count_bias
and add an index_bias member

no functional changes yet, just the rename and unused struct member

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10166>
2021-04-30 03:59:19 +00:00
Ian Romanick 3572e24e74 ci: Uprev piglit to b3a9fa345 ("framework/replay: Quote resource names before signing")
The PIGLIT_BUILD_CL_TESTS related changes were shamelessly stolen from
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6441/diffs?commit_id=5742be00e6b493b5289ed8120eb06f10d341ea3a.

v2: Remove glslang-tools from arm_build.sh.  Suggested by Michel.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10492>
2021-04-28 21:11:34 +00:00
Marek Olšák 804e292440 radeonsi: remove the separate DCC optimization for Stoney
This removes some complexity from the driver.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10343>
2021-04-26 22:53:30 +00:00
Marek Olšák 1f8fa96412 radeonsi: make the gfx9 DCC MSAA clear shader depend on the number of samples
because different DCC equations are used.

Fixes: 3120113ee7 - radeonsi: implement DCC MSAA 4x/8x fast clear using DCC equations on gfx9

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10343>
2021-04-26 22:53:30 +00:00
Mauro Rossi e213bfd330 android: gallium/radeonsi: add nir include path
Since generated nir headers are included, it makes sense to include nir path

Fixes the following building error:

FAILED: out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_radeonsi_intermediates/si_shader_nir.o
...
In file included from external/mesa/src/gallium/drivers/radeonsi/si_shader_nir.c:26:
external/mesa/src/amd/common/ac_nir.h:29:10: fatal error: 'nir.h' file not found
         ^~~~~~~
1 error generated.

Cc: 21.0 21.1 <mesa-stable@lists.freedesktop.org>
Fixes: 1c702a8239 ("ac: move ac_lower_indirect_derefs() outside of the LLVM dir")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10443>
2021-04-26 23:14:52 +02:00
Eric Anholt f9d57207a3 ci/radeonsi: Mark a glx_arb_sync_control/timing flake.
I've seen this one happen at least twice today. Log shows something like:

    Wallclock time between MSCs 16982.888889us does not match
    glXGetMscRateOML 16668.071966us

or

    Wallclock time between MSCs 16500.333333us does not match
    glXGetMscRateOML 16668.071966us

Incidentally, both runs I've looked into had one run too fast and one run
too slow.

Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10414>
2021-04-23 12:11:54 -07:00
Samuel Pitoiset 1c702a8239 ac: move ac_lower_indirect_derefs() outside of the LLVM dir
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10403>
2021-04-23 11:52:01 +02:00
Simon Ser 4a6b87ceab radeonsi: implement pipe_context.create_video_buffer_with_modifiers
Just pass down the modifier list to vl_video_buffer_create_as_resource,
filtering out DCC modifiers because we don't support these for now.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10237>
2021-04-22 15:57:29 +00:00
Marek Olšák fcb5ba5816 Revert "ci/radeonsi: Add expected failures due to #4674 having slipped in"
This reverts commit 106da39b19.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10342>
2021-04-21 16:16:20 +00:00
Rhys Perry 9fb1f9303b Revert "radeonsi: set TRUNC_COORD=0 for Total War: WARHAMMER to fix it"
This reverts commit cd12fcff96.

The terrain looks fine now that TRUNC_COORD=0 for textureGather().

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10036>
2021-04-20 17:42:21 +00:00
Tomeu Vizoso 106da39b19 ci/radeonsi: Add expected failures due to #4674 having slipped in
https://gitlab.freedesktop.org/mesa/mesa/-/issues/4674

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10139>
2021-04-20 07:26:51 +00:00
Tomeu Vizoso 79c65217a1 ci: Test RadeonSI with piglit's quick_gl
And do some job refactoring to share more lines between job definitions.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10139>
2021-04-20 07:26:51 +00:00
Tomeu Vizoso a056362d92 ci: Reenable radeonsi jobs, and extend coverage
Now that we have more devices to test on.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10139>
2021-04-20 07:26:51 +00:00