radeonsi: refine fast clears for small buffers, always use them for large HTILE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
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@ -538,6 +538,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
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struct si_clear_info info[8 * 2 + 1]; /* MRTs * (CMASK + DCC) + ZS */
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unsigned num_clears = 0;
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unsigned clear_types = 0;
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bool fb_too_small = fb->width * fb->height * fb->layers <= 512 * 512;
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/* This function is broken in BE, so just disable this path for now */
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#if UTIL_ARCH_BIG_ENDIAN
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@ -591,8 +592,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
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*
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* This helps on both dGPUs and APUs, even small APUs like Mullins.
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*/
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bool too_small = tex->buffer.b.b.nr_samples <= 1 &&
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tex->buffer.b.b.width0 * tex->buffer.b.b.height0 <= 512 * 512;
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bool too_small = tex->buffer.b.b.nr_samples <= 1 && fb_too_small;
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bool eliminate_needed = false;
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bool fmask_decompress_needed = false;
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@ -843,12 +843,13 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
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zstex->surface.meta_offset, zstex->surface.meta_size, clear_value);
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clear_types |= SI_CLEAR_TYPE_HTILE;
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}
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} else if (num_clears) {
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} else if (num_clears || !fb_too_small) {
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/* This is where the HTILE buffer clear is done.
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*
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* If there is no clear scheduled, we should use the draw-based clear that is without
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* waits. If there is some other clear scheduled, we will have to wait anyway, so add
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* the HTILE buffer clear to the batch here.
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* If there is no clear scheduled and the framebuffer size is too small, we should use
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* the draw-based clear that is without waits. If there is some other clear scheduled,
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* we will have to wait anyway, so add the HTILE buffer clear to the batch here.
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* If the framebuffer size is large enough, use this codepath too.
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*/
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uint64_t htile_offset = zstex->surface.meta_offset;
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unsigned htile_size = 0;
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