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radeonsi: document why VBO descriptors in user SGPRs are beneficial 

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11509>
This commit is contained in:
Marek Olšák 2021-06-16 19:30:52 -04:00
parent f99f7c06e7
commit defc7c92d9
1 changed files with 5 additions and 1 deletions
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6
src/gallium/drivers/radeonsi/si_pipe.c
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@ -1164,8 +1164,12 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
unsigned prim_discard_vertex_count_threshold, tmp;
si_initialize_prim_discard_tunables(sscreen, false, &prim_discard_vertex_count_threshold, &tmp);
/* Compute-shader-based culling doesn't support VBOs in user SGPRs. */
if (prim_discard_vertex_count_threshold == UINT_MAX)
if (prim_discard_vertex_count_threshold == UINT_MAX) {
/* This decreases CPU overhead if all descriptors are in user SGPRs because we don't
* have to allocate and count references for the upload buffer.
*/
sscreen->num_vbos_in_user_sgprs = sscreen->info.chip_class >= GFX9 ? 5 : 1;
}
/* Determine tessellation ring info. */
bool double_offchip_buffers = sscreen->info.chip_class >= GFX7 &&