radeonsi: restructure si_get_ps_input_cntl for future refactoring
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
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@ -3530,20 +3530,6 @@ static unsigned si_get_ps_input_cntl(struct si_context *sctx, struct si_shader *
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struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
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unsigned offset, ps_input_cntl = 0;
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if (interpolate == INTERP_MODE_FLAT ||
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(interpolate == INTERP_MODE_COLOR && rs->flatshade))
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ps_input_cntl |= S_028644_FLAT_SHADE(1);
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if (semantic == VARYING_SLOT_PNTC ||
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(semantic >= VARYING_SLOT_TEX0 && semantic <= VARYING_SLOT_TEX7 &&
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rs->sprite_coord_enable & (1 << (semantic - VARYING_SLOT_TEX0)))) {
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ps_input_cntl |= S_028644_PT_SPRITE_TEX(1);
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if (fp16_lo_hi_mask & 0x1) {
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ps_input_cntl |= S_028644_FP16_INTERP_MODE(1) |
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S_028644_ATTR0_VALID(1);
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}
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}
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int vs_slot = vsinfo->output_semantic_to_slot[semantic];
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if (vs_slot >= 0) {
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offset = vs->info.vs_output_param_offset[vs_slot];
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@ -3551,16 +3537,23 @@ static unsigned si_get_ps_input_cntl(struct si_context *sctx, struct si_shader *
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if (offset <= AC_EXP_PARAM_OFFSET_31) {
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/* The input is loaded from parameter memory. */
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ps_input_cntl |= S_028644_OFFSET(offset);
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} else if (!G_028644_PT_SPRITE_TEX(ps_input_cntl)) {
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if (interpolate == INTERP_MODE_FLAT ||
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(interpolate == INTERP_MODE_COLOR && rs->flatshade)) {
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ps_input_cntl |= S_028644_FLAT_SHADE(1);
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}
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} else {
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/* The input is a DEFAULT_VAL constant. */
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assert(offset >= AC_EXP_PARAM_DEFAULT_VAL_0000 &&
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offset <= AC_EXP_PARAM_DEFAULT_VAL_1111);
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offset -= AC_EXP_PARAM_DEFAULT_VAL_0000;
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ps_input_cntl = S_028644_OFFSET(0x20) | S_028644_DEFAULT_VAL(offset);
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/* Overwrite the whole value. OFFSET=0x20 means that DEFAULT_VAL is used. */
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ps_input_cntl = S_028644_OFFSET(0x20) |
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S_028644_DEFAULT_VAL(offset);
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}
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if (fp16_lo_hi_mask && !G_028644_PT_SPRITE_TEX(ps_input_cntl)) {
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if (fp16_lo_hi_mask) {
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assert(offset <= AC_EXP_PARAM_OFFSET_31 || offset == AC_EXP_PARAM_DEFAULT_VAL_0000);
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ps_input_cntl |= S_028644_FP16_INTERP_MODE(1) |
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@ -3570,14 +3563,21 @@ static unsigned si_get_ps_input_cntl(struct si_context *sctx, struct si_shader *
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S_028644_ATTR1_VALID(!!(fp16_lo_hi_mask & 0x2));
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}
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} else {
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if (!G_028644_PT_SPRITE_TEX(ps_input_cntl)) {
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/* No corresponding output found, load defaults into input.
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* Don't set any other bits.
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* (FLAT_SHADE=1 completely changes behavior) */
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ps_input_cntl = S_028644_OFFSET(0x20);
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/* D3D 9 behaviour. GL is undefined */
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if (semantic == VARYING_SLOT_COL0)
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ps_input_cntl |= S_028644_DEFAULT_VAL(3);
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/* No corresponding output found, load defaults into input. */
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ps_input_cntl = S_028644_OFFSET(0x20) |
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/* D3D 9 behaviour for COLOR0. GL is undefined */
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S_028644_DEFAULT_VAL(semantic == VARYING_SLOT_COL1 ? 3 : 0);
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}
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if (semantic == VARYING_SLOT_PNTC ||
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(semantic >= VARYING_SLOT_TEX0 && semantic <= VARYING_SLOT_TEX7 &&
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rs->sprite_coord_enable & (1 << (semantic - VARYING_SLOT_TEX0)))) {
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/* Overwrite the whole value for sprite coordinates. */
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ps_input_cntl = S_028644_OFFSET(0) |
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S_028644_PT_SPRITE_TEX(1);
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if (fp16_lo_hi_mask & 0x1) {
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ps_input_cntl |= S_028644_FP16_INTERP_MODE(1) |
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S_028644_ATTR0_VALID(1);
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}
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}
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