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radeonsi: disable DCC stores on Navi12-14 for displayable DCC to fix corruption 

This is a hardware limitation.

Fixes: 1d64a1045e "radeonsi: enable dcc image stores on gfx10+"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>
This commit is contained in:
Marek Olšák 2021-08-24 11:29:31 -04:00 committed by Marge Bot
parent 0b2b2a4783
commit b648d6fbf8
1 changed files with 4 additions and 1 deletions
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5
src/gallium/drivers/radeonsi/si_descriptors.c
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@ -360,7 +360,10 @@ void si_set_mutable_tex_desc_fields(struct si_screen *sscreen, struct si_texture
state[6] |= S_00A018_META_PIPE_ALIGNED(meta.pipe_aligned) |
S_00A018_META_DATA_ADDRESS_LO(meta_va >> 8) |
S_00A018_WRITE_COMPRESS_ENABLE((access & SI_IMAGE_ACCESS_DCC_WRITE) != 0);
/* DCC image stores require INDEPENDENT_128B_BLOCKS, which is not set
* with displayable DCC on Navi12-14 due to DCN limitations. */
S_00A018_WRITE_COMPRESS_ENABLE(tex->surface.u.gfx9.color.dcc.independent_128B_blocks &&
access & SI_IMAGE_ACCESS_DCC_WRITE);
}
state[7] = meta_va >> 16;