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ac/perfcounters: remove ac_pc_block_base::num_prelude 

This seems unnecessary if the first select register is correctly set.
This CB filter was always disabled anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
This commit is contained in:
Samuel Pitoiset 2021-06-04 08:55:17 +02:00 committed by Marge Bot
parent 100fc3020a
commit 66a34be6ac
3 changed files with 5 additions and 17 deletions
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3
src/amd/common/ac_perfcounter.c
View File

@ -33,10 +33,9 @@ static struct ac_pc_block_base cik_CB = {
.num_counters = 4,
.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS,
.select0 = R_037000_CB_PERFCOUNTER_FILTER,
.select0 = R_037004_CB_PERFCOUNTER0_SELECT,
.counter0_lo = R_035018_CB_PERFCOUNTER0_LO,
.num_multi = 1,
.num_prelude = 1,
.layout = AC_PC_MULTI_ALTERNATE,
};

1
src/amd/common/ac_perfcounter.h
View File

@ -118,7 +118,6 @@ struct ac_pc_block_base {
unsigned *select;
unsigned *counters;
unsigned num_multi;
unsigned num_prelude;
unsigned layout;
};

18
src/gallium/drivers/radeonsi/si_perfcounter.c
View File

@ -103,7 +103,6 @@ static void si_pc_emit_select(struct si_context *sctx, struct ac_pc_block *block
struct radeon_cmdbuf *cs = &sctx->gfx_cs;
unsigned idx;
unsigned layout_multi = regs->layout & AC_PC_MULTI_MASK;
unsigned dw;
assert(count <= regs->num_counters);
@ -114,13 +113,11 @@ static void si_pc_emit_select(struct si_context *sctx, struct ac_pc_block *block
if (layout_multi == AC_PC_MULTI_BLOCK) {
assert(!(regs->layout & AC_PC_REG_REVERSE));
unsigned reg_count = count;
dw = count + regs->num_prelude;
if (count >= regs->num_multi)
dw += regs->num_multi;
radeon_set_uconfig_reg_seq(cs, regs->select0, dw, false);
for (idx = 0; idx < regs->num_prelude; ++idx)
radeon_emit(cs, 0);
reg_count += regs->num_multi;
radeon_set_uconfig_reg_seq(cs, regs->select0, reg_count, false);
for (idx = 0; idx < MIN2(count, regs->num_multi); ++idx)
radeon_emit(cs, selectors[idx] | regs->select_or);
@ -141,9 +138,7 @@ static void si_pc_emit_select(struct si_context *sctx, struct ac_pc_block *block
assert(!(regs->layout & AC_PC_REG_REVERSE));
radeon_set_uconfig_reg_seq(cs, regs->select0, count + regs->num_prelude, false);
for (idx = 0; idx < regs->num_prelude; ++idx)
radeon_emit(cs, 0);
radeon_set_uconfig_reg_seq(cs, regs->select0, count, false);
for (idx = 0; idx < count; ++idx)
radeon_emit(cs, selectors[idx] | regs->select_or);
@ -164,13 +159,10 @@ static void si_pc_emit_select(struct si_context *sctx, struct ac_pc_block *block
unsigned reg_base = regs->select0;
unsigned reg_count = count + MIN2(count, regs->num_multi);
reg_count += regs->num_prelude;
if (!(regs->layout & AC_PC_REG_REVERSE)) {
radeon_set_uconfig_reg_seq(cs, reg_base, reg_count, false);
for (idx = 0; idx < regs->num_prelude; ++idx)
radeon_emit(cs, 0);
for (idx = 0; idx < count; ++idx) {
radeon_emit(cs, selectors[idx] | regs->select_or);
if (idx < regs->num_multi)
@ -185,8 +177,6 @@ static void si_pc_emit_select(struct si_context *sctx, struct ac_pc_block *block
radeon_emit(cs, 0);
radeon_emit(cs, selectors[idx - 1] | regs->select_or);
}
for (idx = 0; idx < regs->num_prelude; ++idx)
radeon_emit(cs, 0);
}
}
radeon_end();