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4664 Commits

Author SHA1 Message Date
Marek Olšák 8c9b9aac7d gallium: change comments to remove 'state tracker' 
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>
 2020-05-13 13:47:27 -04:00
Marek Olšák d6287a94b6 gallium: rename 'state tracker' to 'frontend' 
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>
 2020-05-13 13:46:53 -04:00
Pierre-Eric Pelloux-Prayer c668bdf05c radeonsi: do not use cmask with encrypted texture 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
 2020-05-11 10:26:05 +02:00
Pierre-Eric Pelloux-Prayer 8873ea0e25 radeonsi: determine secure flag must be set for gfx IB 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
 2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer 2c2ab36f53 radeonsi: add support for PIPE_RESOURCE_FLAG_ENCRYPTED 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
 2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer 5c58cbe84d radeonsi/sdma: implement tmz support 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
 2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer 5d96c26b67 radeonsi: force using staging texture when uploading to secure texture 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
 2020-05-11 10:25:53 +02:00
Pierre-Eric Pelloux-Prayer 2853ed1a24 radeonsi: allocate framebuffer texture as secure when using tmz 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
 2020-05-11 10:25:53 +02:00
Qiang Yu 727a0a53fd radeonsi: remove emacs style config file 
As radeonsi has synced the code style with main mesa,
remove the orginal radeonsi spec emacs config file and
use the top level dir .dir-locals.el

Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4961>
 2020-05-09 00:57:26 +00:00
Blaž Tomažič 808eb20186 radeonsi: Fix omitted flush when moving suballocated texture 
Fixes: 5e805cc74b "radeonsi: flush the context after resource_copy_region for buffer exports"

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4925>
 2020-05-07 17:00:08 -04:00
Marek Olšák 441eaef6a9 amd: unify code for overriding offset and stride for imported buffers 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
 2020-05-07 20:13:41 +00:00
Marek Olšák c164ea86e1 ac/surface,radeonsi: move the set/get_umd_metadata code into ac_surface.c 
The indentation is on purpose. The whole file will be reindented to this
code style some other time.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
 2020-05-07 20:13:41 +00:00
Marek Olšák 7691de0dce ac/surface,radeonsi: move the set/get_bo_metadata code to ac_surface.c 
The indentation is on purpose. The whole file will be reindented to this
code style some other time.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
 2020-05-07 20:13:41 +00:00
Marek Olšák 56e37374dd amd: assume HTILE is always rb/pipe_aligned, remove ac_surface.u.gfx9.htile 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
 2020-05-07 20:13:41 +00:00
Marek Olšák cf61f635ff amd: assume CMASK is always rb/pipe_aligned, remove ac_surface.u.gfx9.cmask 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863>
 2020-05-07 20:13:41 +00:00
Marek Olšák 29da521280 radeonsi: fix compilation of monolithic PS 
This was totally broken. Monolithic PS is only used if FBFETCH or
interpolateAtSample are used.

When the PS prolog was built, it overwrote ctx->main_fn.

Discovered by @eefano.

Fixes: 8832a88434 "radeonsi: move PS LLVM code into si_shader_llvm_ps.c"
Closes: #2814

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4918>
 2020-05-06 17:02:23 +00:00
Marek Olšák 0d83e7f4b9 radeonsi: enable TC-compatible HTILE on demand for best Z/S performance 
I haven't measured this, but it can only help.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
 2020-05-05 16:27:29 +00:00
Marek Olšák 39571d384e radeonsi: allow tc_compatible_htile to be mutable 
Move the relevant code from si_init_depth_surface to
si_emit_framebuffer_state, so that it can be changed after a pipe_surface
is initialized.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
 2020-05-05 16:27:29 +00:00
Marek Olšák 04085bedc2 radeonsi/gfx9: always use IMG_DATA_FORMAT_S8_32 for 8-bit stencil 
I wanna remove dependency on tc_compatible_htile from non-dynamic states.
This should be the same as 8_UINT if HTILE is disabled.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
 2020-05-05 16:27:29 +00:00
Marek Olšák 266fec1307 radeonsi: don't wait for idle at the end of gfx IBs 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4894>
 2020-05-05 11:52:21 -04:00
Pierre-Eric Pelloux-Prayer ae4379d81e ac/nir: export some undef as zero 
NIR already optimizes undef usage.
If undef reaches llvm, it's probably because of a broken shader.

In this situation, rather than letting llvm use the undef values
to do more optimization and probably produce incorrect results,
we replace undef values by 0.

"undef" values that are directly used in exports are kept as undef,
because this allows llvm to optimize them away.

This is only enabled for radeonsi.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2689
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
 2020-05-05 12:26:26 +02:00
Pierre-Eric Pelloux-Prayer 0ee1a724bf gallium: add a new cap PIPE_CAP_GLSL_ZERO_INIT 
Allows driver to select a zero init mode between the 3 possible values.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
 2020-05-05 12:26:02 +02:00
Pierre-Eric Pelloux-Prayer 547e81655a radeonsi: don't print gs_copy_shader stats for shaderdb 
Fixes: dbc86fa3de ("radeonsi: dump shader stats when hitting the live cache")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607>
 2020-05-05 12:26:02 +02:00
Pierre-Eric Pelloux-Prayer 64662dd5ba radeonsi: add workaround for issue 2647 
For unknown reasons pixel shaders in KSP game get executed with
infinite interpolation coefficients and this causes an infinite
loop in the shader.

This commit adds a hacky workaround that kills pixel shaders if
invalid interp coeffs are detected and enables it for KSP.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2174
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2647
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4700>
 2020-05-05 09:41:14 +00:00
Marek Olšák f1a40a26a9 Revert "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set" 
This reverts commit f6d87ec8a9.

It breaks RADV.

Fixes: f6d87ec8a9 "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4864>
 2020-05-02 20:12:38 +00:00
Marek Olšák bdd2f284d9 radeonsi: revert an accidental change in si_clear_buffer 
The change was in: 7b0b085c94

Fixes: 7b0b085c94 ("radeonsi: drop the negation from fmask_is_not_identity")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 5afec9bc9f radeonsi: fix si_compute_clear_render_target with render condition enabled 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 19db1a540c radeonsi: add a workaround to fix KHR-GL45.texture_view.view_classes on gfx9 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák d6acdbd935 radeonsi: implement and use compute-based DCC decompression on gfx9-10 
DCC_DECOMPRESS doesn't work. Instead of trying to figure out why,
use a compute blit where the load is compressed and the store is
uncompressed.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák d3da73954a radeonsi: add SI_IMAGE_ACCESS_DCC_OFF to ignore DCC for shader images 
A shader-based DCC decompress pass will use this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 93d5c86081 radeonsi: bind shader images after DCC is disabled for image stores 
This prevents an infinite recursion with a compute-based DCC decompression
when it restores shader images.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 44d27fd6fb radeonsi: clean up and deduplicate code around internal compute dispatches 
In addition to the cleanup, there are these changes in behavior:
- clear_render_target waits for idle after the dispatch and then flushes
  L0-L1 caches (this was missing)
- sL0 is no longer invalidated before the dispatch, because src resources
  don't use it
- sL0 is no longer invalidated after the dispatch if dst is an image

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák e58dcc47c3 radeonsi: unify and align down the max SSBO/TBO/UBO buffer binding size 
Rounding down the size fixes:
    KHR-GL45.enhanced_layouts.ssb_member_invalid_offset_alignment

Fixes: 03e2adc990

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Mike Blumenkrantz 1c8bcad81a gallium: add pipe cap for scissored clears and pass scissor state to clear() hook 
this adds a new pipe cap that drivers can support which enables passing buffer
clears with scissor test enabled through to be handled by the driver instead
of having mesa draw a quad

also adjust all existing clear() hooks to have the new parameter

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4310>
 2020-04-29 18:05:06 +00:00
Marek Olšák 5e31e4b697 ac/surface: add code for gfx10 displayable DCC 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
 2020-04-29 14:53:25 +00:00
Marek Olšák a3dc7fffbb ac/surface: don't compute DCC if it's unsupported by DCN on gfx9+ 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
 2020-04-29 14:53:25 +00:00
Marek Olšák 3dc2ccc14c ac/surface: replace RADEON_SURF_OPTIMIZE_FOR_SPACE with !FORCE_SWIZZLE_MODE 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
 2020-04-29 14:53:25 +00:00
Marek Olšák f6d87ec8a9 ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set 
So that drivers can enable it without worrying how the texture was
allocated.

v2: reworked the mechanism, hopefully fixes now
    added Bas Nieuwenhuizen's diff to fix radv

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
 2020-04-29 14:53:25 +00:00
Marek Olšák 25d3cc293e ac/surface: rename micro tile mode enums like gfx10 uses them 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>
 2020-04-29 14:53:25 +00:00
Bas Nieuwenhuizen 8e03cf15f9 radeonsi: Count planes for imported textures. 
For the DRI2 lowered YUV import separate pipe_resources get created
but in the end the first resource just gets asked for NPLANES.

Since

1) (Almost) everything uses the first resource + a plane index in the
  Gallium interface.
2) This mirrors non-imported textures.

lets fix this in the driver.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4779>
 2020-04-28 11:16:03 +00:00
Bas Nieuwenhuizen afd9274d48 st/dri: Set next in template instead of after creation. (v2) 
This should prevent horrors like Iris has with the delayed calls
to iris_resource_finish_aux_import just because info is not
available at allocation time.

AFAICT all drivers just copy the template except radeonsi/r600
which reset the next pointer.

AFAICT there is also no other place we get a state tracker setting
next ptrs on a resource.

v2: Updated Gallium docs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3792>
 2020-04-27 21:08:01 +00:00
Samuel Pitoiset 42b1696ef6 ac,radeonsi: fix compilations issues with LLVM 11 
Latest LLVM replaced LLVMVectorTypeKind.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2826
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4755>
 2020-04-27 17:13:36 +00:00
Marek Olšák 19eb89b0f3 gallium: add PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE for glthread 
and add radeonsi support.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758>
 2020-04-27 11:56:06 +00:00
Marek Olšák f2c2a28073 ac: update and document fast math flags used by radeonsi 
This should have no effect, because we never use FP division, but
it's safer for the future.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696>
 2020-04-27 11:20:16 +00:00
Marek Olšák b520a58cc1 radeonsi: use pipe_blend_state::max_rt to update fewer blend registers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
 2020-04-24 10:38:55 +00:00
Marek Olšák b4fd8f1919 ac,radeonsi: simplify checking for Navi1x chips 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
 2020-04-24 10:38:54 +00:00
Indrajit Kumar Das 133efa112d radeonsi: enable support for AlphaToCoverageDitherControlNV 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4543>
 2020-04-23 12:02:56 +05:30
Pierre-Eric Pelloux-Prayer 17acff01a0 radeonsi: skip vs output optimizations for some outputs 
If PT_SPRITE_TEX is enabled, PS inputs are overriden at runtime so
we can't apply the vs output optim.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2747
Fixes: 3ec9975555 ("radeonsi: eliminate trivial constant VS outputs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4559>
 2020-04-20 08:45:16 +02:00
Pierre-Eric Pelloux-Prayer 8521acd660 radeonsi: don't assume ctx is always a threaded_context 
Fixes: dcb1e8fef8 ("radeonsi: use thread_context::bytes_mapped_limit")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4587>
 2020-04-17 11:36:20 +02:00
Bas Nieuwenhuizen d80fb02430 winsys/amdgpu: Retrieve WC flags from imported buffers. 
Otherwise reading from an imported mapped GTT+WC linear texture
is painfully slow.

Sadly no radeon winsys implementation, as I don't know a suitable
kernel driver operation.

Hit this  in vaGetImage with an image imported from minigbm (which
we are switching to allocate WC for SCANOUT images).

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4542>
 2020-04-16 13:51:28 +00:00
Pierre-Eric Pelloux-Prayer dcb1e8fef8 radeonsi: use thread_context::bytes_mapped_limit 
Limit the amount of "in-flight" mapping to 1/4 of the total RAM.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2735
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4508>
 2020-04-16 08:36:04 +00:00
James Zhu 98743f648a radeonsi: fix Segmentation fault during vaapi enc test 
Fix Segmentation fault during vaapi enc test on Arcturus.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by Leo Liu <leo.liu@amd.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4472>
 2020-04-08 18:11:45 +00:00
Timothy Arceri 1f649ff107 radeonsi: don't lower constant arrays to uniforms in GLSL IR 
This re-enables the change made in 2f5783bc2b which was
incorrectly disabled by 3e1dd99adc.

For radeonsi, we will prefer the NIR pass as it'll generate better code
(some index calculation and a single load vs. a load, then index
calculation, then another load) and oftentimes NIR optimization can kick
in and make all the access indices constant.

Fixes: 3e1dd99adc ("radeonsi: Remove a bunch of default handling of pipe caps.")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4474>
 2020-04-08 01:23:40 +00:00
Pierre-Eric Pelloux-Prayer dbc86fa3de radeonsi: dump shader stats when hitting the live cache 
With the introduction of the live shader cache, when a shader is
fetched from the cache no stats are printed for shaderdb.
So in a sequence like this: vs1, fs1, vs1, fs2, shaderdb may see
3 or 4 lines, depending on the threads being used.
If one run produces 3 lines while the other produces 4 lines, it
would compare vs1 stats with fs2 stats.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355>
 2020-04-02 08:31:37 +02:00
Pierre-Eric Pelloux-Prayer d7008fe46a radeonsi: switch to 3-spaces style 
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319>
 2020-03-30 11:05:52 +00:00
Marek Olšák e609737526 radeonsi/gfx10: fix descriptors and compute registers for compute-based culling 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák 4ef1c8d60b radeonsi/gfx10: fix the wave size for compute-based culling 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák b4a0087a1c radeonsi/gfx10: user correct ACQUIRE_MEM packet for compute-based culling 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák acc5bdf887 radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák ee4d797d8b radeonsi/gfx10: don't use NGG culling if compute-based culling is used 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák 65e9239977 radeonsi: add num_vbos_in_user_sgprs into the shader cache key 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák be9455bdf7 radeonsi: always create wait_mem_scratch for compute-based culling 
used by the primitive restart emulation

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák 42ce52b904 radeonsi: set amdgpu-gds-size for mode == 2 of compute-based culling 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák 3381f2fa06 radeonsi: fix incorrect ordered_wave_id initilization for compute-based culling 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák d89b19cfe1 radeonsi: remove obsolete TODO comment related to compute-based culling 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
 2020-03-28 00:58:34 +00:00
Marek Olšák b94c277fd1 radeonsi: enable full out-of-order drawing when allow_draw_out_of_order is set 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
 2020-03-26 03:08:34 -04:00
Kristian H. Kristensen d269fb33b0 radeonsi: Stop exposing PIPE_SHADER_CAP_FP16 
Not fully supported.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
 2020-03-25 22:43:41 +00:00
Pierre-Eric Pelloux-Prayer bd6234f24b radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed 
FLUSH_AND_INV_DB should be done when we're changing surface state
registers of a bound depth target.

When depth_clear_value changes, si_state will modify
S_028038_ZRANGE_PRECISION so we need to flush the DB caches.

Verified with the captures from bugs cited below.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1283
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1330
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
 2020-03-24 08:05:12 +01:00
Marek Olšák 5cc3ab0ba0 vbo,gallium: make glBegin/End buffer size configurable by drivers 
The default is 512 KB, but radeonsi wants 4 MB.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154>
 2020-03-21 03:39:51 +00:00
John Stultz 511c6408f4 Android.mk: Tweak MESA_ENABLE_LLVM checks 
Change the MESA_ENABLE_LLVM checks in Android.mk
files in order to get mesa3d to build w/ AOSP
using mmma.

This tries to re-create a change that was introduced
in the following merge in the AOSP branch:
  69f2c0128d2b Merge branch 'aosp/upstream-18.0'

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175>
 2020-03-19 21:20:08 +00:00
Marek Olšák 56cc10bd27 ac: unify denorm setting enforcement 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196>
 2020-03-17 20:47:48 +00:00
Marek Olšák 7ba5e94c50 ac: add radeon_info::use_late_alloc to control LATE_ALLOC globally 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
 2020-03-12 17:27:23 +00:00
Marek Olšák 09295e95eb radeonsi: tune primitive binning for small chips 
same as PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
 2020-03-12 17:27:23 +00:00
Marek Olšák 629b6ddd71 radeonsi: set better tessellation tunables on gfx9 and gfx10 
same as PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
 2020-03-12 17:27:23 +00:00
Marek Olšák bf5b65d0fd radeonsi/gfx10: cache metadata in L2 on small chips 
same as PAL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
 2020-03-12 17:27:23 +00:00
Marek Olšák 70298ec4c0 gallium: add PIPE_CAP_DRAW_INFO_START_WITH_USER_INDICES 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591>
 2020-03-11 18:45:28 +00:00
Karol Herbst 6e035c01fb Revert "gallium: make handles of set_global_binding 64 bit" 
This reverts commit e1ffb72a05
 2020-03-10 22:41:26 +00:00
Karol Herbst e1ffb72a05 gallium: make handles of set_global_binding 64 bit 
needed by CL

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072>
 2020-03-10 22:06:19 +00:00
Marek Olšák c1b8e84961 radeonsi: determine uses_bindless_samplers correctly 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
 2020-03-09 16:08:14 -04:00
Marek Olšák 7481c4be58 radeonsi: add a bug workaround for NGG - LATE_ALLOC_GS 
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
 2020-03-09 16:08:10 -04:00
Sonny Jiang 5ea2034f58 radeonsi: enable EXT_texture_shadow_lod 
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079>
 2020-03-09 16:08:07 -04:00
Daniel Schürmann 61fb17e8d7 amd: join emit_kill() from radv and radeonsi in ac_nir_to_llvm 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
 2020-03-09 12:29:32 +00:00
Daniel Schürmann 9d64ad2fe7 radeonsi: lower discard to demote when FS_CORRECT_DERIVS_AFTER_KILL is enabled 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047>
 2020-03-09 12:29:32 +00:00
Thong Thai 8ab31808fd radeonsi: add 10-bit HEVC encode support for VCN2.0 devices 
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033>
 2020-03-06 16:10:40 +00:00
Pierre-Eric Pelloux-Prayer 771f16cf61 radeonsi: remove AMD_DEBUG=sisched option 
sisched is not maintained anymore in LLVM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4059>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4059>
 2020-03-06 11:35:12 +01:00
Samuel Pitoiset 9432eb3e9c ac: rename lds_size_per_cu to lds_size_per_workgroup 
It's more accurate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
 2020-03-03 08:16:56 +01:00
Pierre-Eric Pelloux-Prayer 69aadc4933 radeonsi: fix surf_pitch for subsampled surface 
gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.

For subsampled formats like uyvy (bpe is 2) this breaks in various places:
 - sdma copy
 - video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363)
   when the vl_compositor_gfx_render method is used

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
 2020-02-27 10:01:31 +01:00
Pierre-Eric Pelloux-Prayer fb29f0847f radeonsi: test subsampled format in testdma 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
 2020-02-27 10:01:31 +01:00
Samuel Pitoiset 974c87e449 ac,radeonsi: add ac_gpu_info::lds_size_per_cu 
Both RadeonSI and RADV use the WGP mode, so we can assume 128KB on
GFX10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
 2020-02-26 07:58:47 +00:00
Bas Nieuwenhuizen 68d1757420 radeonsi: Fix compute copies for subsampled formats. 
We cannot do image stores (or render) to subsampled formats.

Reinterpret as R32_UINT instead.

si_set_shader_image_desc already uses the blockwidth from
the view formats, so the image width adjustments are
already implemented.

This is still icky with mipmapping on GFX9+ though, but
since it is mostly a video format I don't think that will
be much of an issue and broken mipmapping is still better
than broken everything.

Fixes: e5167a9276 "radeonsi: disable SDMA on gfx8 to fix corruption on RX 580"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2535
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
 2020-02-19 22:51:12 +00:00
Marek Olšák 7e2b4bf256 radeonsi: don't wait for shader compilation to finish when destroying a context 
This was a hack for glsl_types deinitialization and it predates the proper
fix, which was the addition of glsl_type_singleton_decref.

This fixes a crash when the context is destroyed via the atexit handler.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800>
 2020-02-14 16:19:38 -05:00
Peng Huang 0660cbf426 radeonsi: make si_fence_server_signal flush pipe without work 
glSignalSemaphoreEXT sometime doesn't signal the semaphore, it is
because radeonsi doesn't flush if gl context doesn't have pending
work. Fix the porblem by always submit ib.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
 2020-02-12 23:51:50 +00:00
Marek Olšák 1082e6fcb8 radeonsi: don't update states for the DCC MSAA bug on GFX6-7 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
 2020-02-10 17:24:09 -05:00
Marek Olšák fbb27eebc8 radeonsi: fix the DCC MSAA bug workaround 
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
 2020-02-10 17:24:02 -05:00
Marek Olšák 35961b10da radeonsi: don't report that multi-plane formats are supported 
Fixes: a554b45d - st/mesa: don't lower YUV when driver supports it natively
Closes: #2376

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3632>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3632>
 2020-02-07 20:42:42 -05:00
Pierre-Eric Pelloux-Prayer 3da91b3327 radeonsi/ngg: add VGT_FLUSH when enabling fast launch 
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2418
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2426
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2434
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675>
 2020-02-05 10:27:54 +00:00
Eric Anholt ab081970e0 gallium: Add and use a helper for packing uc from a color_union. 
The same pattern kept coming up, and we don't need to hit
util_format_write_4* to do it when we have util_format_pack_rgba().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
 2020-02-04 19:02:59 +00:00
Eric Anholt c574cda3c6 util: Make helper functions for pack/unpacking pixel rows. 
Almost all users of the unpack functions don't have strides to plug in
(and many are only doing one pixel!), and this will help simplify
them.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744>
 2020-02-04 19:02:59 +00:00
Drew Davenport 0d99ff54cc radeonsi: Clear uninitialized variable 
|view| was not initialized leading to flaky test failures in SkQP
test unitTest_ES2BlendWithNoTexture.

Fixes: 029bfa3d25 "radeonsi: add ability to bind images as image buffers"

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3592>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3592>
 2020-01-28 16:29:48 +00:00
Pierre-Eric Pelloux-Prayer a803d41248 radeonsi: move AMD_DEBUG tests to AMD_TEST 
AMD_DEBUG env var is stored in a 64 bits int and has 64 different values.
This commit makes some space by moving the test* special values to AMD_TEST.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3492>
 2020-01-27 09:29:10 +01:00
Marek Olšák eb7cd575da radeonsi: fix a regression since the addition of si_shader_llvm_vs.c 
Fixes: cd5b99c541 - radeonsi: move VS shader code into si_shader_llvm_vs.c
Closes: #2416
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3561>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3561>
 2020-01-25 05:59:24 +00:00
Marek Olšák 688d2901b8 radeonsi: make screen available to shader part compilation 
to fix a crash in is_multi_part_shader.

Fixes: 1a0890dcf3 - radeonsi: change prototypes of si_is_multi_part_shader & si_is_merged_shader
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3561>
 2020-01-25 05:59:24 +00:00
Marek Olšák 0366c8c5b7 radeonsi: expose shader cache stats to the HUD 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2929>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2929>
 2020-01-24 20:29:29 -05:00
Marek Olšák c046551e60 radeonsi: print shader cache stats with AMD_DEBUG=cache_stats 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2929>
 2020-01-24 20:29:29 -05:00
Marek Olšák 2fd3bb23ab radeonsi: restructure si_shader_cache_load_shader 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2929>
 2020-01-24 20:29:29 -05:00
Marek Olšák 0db74f479b radeonsi: use the live shader cache 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2929>
 2020-01-24 20:29:29 -05:00
Marek Olšák 43d9bac6f2 radeonsi: separate LLVM compilation from non-LLVM code 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák 1a0890dcf3 radeonsi: change prototypes of si_is_multi_part_shader & si_is_merged_shader 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák 7ce84b256e radeonsi: make si_compile_shader return bool 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák be772182e0 radeonsi: make si_compile_llvm return bool 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák bd19d144a1 radeonsi: move more LLVM functions into si_shader_llvm.c 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák 9a66f3d3e2 radeonsi: fold si_shader_context_set_ir into si_build_main_function 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák beacb414b9 radeonsi: move si_nir_build_llvm into si_shader_llvm.c 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák 1c73d598eb radeonsi: minor cleanup in si_shader_internal.h 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák ab33ba987a radeonsi: move si_shader_llvm_build.c content into si_shader_llvm.c 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák cd5b99c541 radeonsi: move VS shader code into si_shader_llvm_vs.c 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák d1c42e2c6a radeonsi: move non-LLVM code out of si_shader_llvm.c 
There was also some redundant code in si_shader_nir.c

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Marek Olšák 594f085cfa radeonsi: use ctx->ac. for types and integer constants 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
 2020-01-23 19:10:21 +00:00
Eric Anholt 6c10af95c7 radeonsi: Drop PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS. 
Now that we don't expose TGSI, we can stop exposing the flag.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3493>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3493>
 2020-01-21 19:04:22 +00:00
Eric Anholt 3e1dd99adc radeonsi: Remove a bunch of default handling of pipe caps. 
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3493>
 2020-01-21 19:04:22 +00:00
Marek Olšák 735a3ba007 radeonsi/gfx10: enable GS fast launch for triangles and strips with NGG culling 
Only non-indexed triangle lists and strips are supported. This increases
performance if there is something to cull.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák c377f45c18 radeonsi/gfx10: rewrite late alloc computation 
- Use conservative late alloc when the number of CUs <= 6.
- Move the late alloc GS register to the GS shader state, so that it can be
  tuned for NGG culling.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák 4e4b2d13f0 ac: add helper ac_build_triangle_strip_indices_to_triangle 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák 8db00a51f8 radeonsi/gfx10: implement NGG culling for 4x wave32 subgroups 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák aa2d846604 radeonsi/gfx10: move GE_PC_ALLOC setting to shader states 
The value is not changed. I just use a different way to compute it.

The value will vary with NGG culling.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák 41fef6fc09 radeonsi/gfx10: don't initialize VGPRs not used by NGG passthrough 
v2: TES doesn't use the GS PrimitiveID

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák 943d131e7d radeonsi/gfx10: merge main and pos/param export IF blocks into one if possible 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák a966729c84 radeonsi/gfx10: export primitives at the beginning of VS/TES 
This decreases VGPR usage and will allow us to merge some IF blocks
in shaders.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák 5a0fcf11f0 radeonsi/gfx10: move s_sendmsg gs_alloc_req to the beginning of shaders 
This will allow us to merge some IF blocks in shaders.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák cf9f8d1ea2 radeonsi/gfx10: correct VS PrimitiveID implementation for NGG 
We didn't use the correct LDS pointer, though it probably doesn't matter,
because I think that nothing else is using LDS here.

This commit makes it consistent with all other esgs_ring use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák b2326a7549 radeonsi/gfx10: update comments and remove invalid TODOs 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 16:16:11 -05:00
Marek Olšák 679b6244e1 radeonsi: turn an assertion into return in si_nir_store_output_tcs 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 15:40:13 -05:00
Marek Olšák 27cc7703d3 radeonsi: fix doubles and int64 
Fixes: 57bd73e229 - radeonsi: remove llvm_type_is_64bit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 15:40:10 -05:00
Marek Olšák df34fa14bb radeonsi: don't invoke decompression inside internal launch_grid 
Decompress resources properly but don't do it inside launch_grid
to prevent recursion.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: 19.3 <mesa-stable@lists.freedesktop.org>
 2020-01-20 15:40:08 -05:00
Marek Olšák 58c929be0d radeonsi: clean up how internal compute dispatches are handled 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: 19.3 <mesa-stable@lists.freedesktop.org>
 2020-01-20 15:40:07 -05:00
Marek Olšák d69483270e Revert "radeonsi: unbind image before compute clear" 
This reverts commit 3a527eda7c.

It's incorrect.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-20 15:40:05 -05:00
Marek Olšák c4daf2b485 radeonsi: merge si_compile_llvm and si_llvm_compile functions 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
 2020-01-15 21:54:55 +00:00
Marek Olšák 68586bdd21 radeonsi: remove useless #includes 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
 2020-01-15 21:54:55 +00:00
Marek Olšák 30b14ba67e radeonsi: move code for shader resources into si_shader_llvm_resources.c 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
 2020-01-15 21:54:55 +00:00
Marek Olšák da2c12af4b radeonsi: move geometry shader code into si_shader_llvm_gs.c 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
 2020-01-15 21:54:55 +00:00
Marek Olšák 57bd73e229 radeonsi: remove llvm_type_is_64bit 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
 2020-01-15 21:54:55 +00:00
Marek Olšák 194449a405 radeonsi: move tessellation shader code into si_shader_llvm_tess.c 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
 2020-01-15 21:54:55 +00:00
Marek Olšák d7c86b106c radeonsi: move si_insert_input_* functions 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3399>
 2020-01-15 21:54:55 +00:00
Marek Olšák 8ff8e68e42 radeonsi: work around an LLVM crash when using llvm.amdgcn.icmp.i64.i1 
Cc: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3338>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3338>
 2020-01-15 20:17:23 +00:00
Marek Olšák af3fbb410c radeonsi: fix si_build_wrapper_function for compute-based primitive culling 
Fixes: 3b143369a5 "ac/nir, radv, radeonsi: Switch to using ac_shader_args"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3338>
 2020-01-15 20:17:23 +00:00
Marek Olšák 6d4993c942 radeonsi/gfx10: separate code for determining the number of vertices for NGG 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-15 15:06:34 -05:00
Marek Olšák 7a25521f92 radeonsi/gfx10: separate code for getting edgeflags from the gs_invocation_id VGPR 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-15 15:06:33 -05:00
Marek Olšák cf65c6f0d2 radeonsi: move VS_STATE.LS_OUT_PATCH_SIZE a few bits higher to make space there 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-15 15:06:31 -05:00
Marek Olšák 34ef0c5083 radeonsi: make si_insert_input_* functions non-static 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-15 15:06:29 -05:00
Marek Olšák 8070402a30 radeonsi: separate code computing info for small primitive culling 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-15 14:59:11 -05:00
Pierre-Eric Pelloux-Prayer 7b0b085c94 radeonsi: drop the negation from fmask_is_not_identity 
This change eases code reading ("fmask_is_identity = true" is clearer than
"fmask_is_not_identity = false").
Initialization is not changed so fmask_is_identity is false when a texture is
created.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
 2020-01-15 10:10:15 +00:00
Pierre-Eric Pelloux-Prayer 3a527eda7c radeonsi: unbind image before compute clear 
It's not used and avoid infinite recursion when used from si_compute_expand_fmask

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
 2020-01-15 10:10:15 +00:00
Pierre-Eric Pelloux-Prayer c2df5389bb radeonsi: make sure fmask expand is done if needed 
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2248
Fixes: 095a58204d ("radeonsi: expand FMASK before MSAA image stores are used")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
 2020-01-15 10:10:15 +00:00
Pierre-Eric Pelloux-Prayer b5e748b49b radeonsi: fix fmask expand compute shader 
'coord' variable was using TGSI_WRITEMASK_XYZ so subsequent uses of
TGSI_WRITEMASK_W were dropped.
The result for a 2 samples program was:

  0: UMAD TEMP[0].xy, SV[1].xyyy, IMM[0].xxxx, SV[0].xyyy
  1: STORE IMAGE[0], TEMP[0], TEMP[1], RESTRICT, 2D_MSAA
  2: STORE IMAGE[0], TEMP[0], TEMP[2], RESTRICT, 2D_MSAA
  3: END

instead of the expected:

  0: UMAD TEMP[0].xy, SV[1].xyyy, IMM[0].xxxx, SV[0].xyyy
  1: MOV TEMP[0].w, IMM[0].yyyy
  2: LOAD TEMP[1], IMAGE[0], TEMP[0], RESTRICT, 2D_MSAA
  3: MOV TEMP[0].w, IMM[0].zzzz
  4: LOAD TEMP[2], IMAGE[0], TEMP[0], RESTRICT, 2D_MSAA
  5: MOV TEMP[0].w, IMM[0].yyyy
  6: STORE IMAGE[0], TEMP[0], TEMP[1], RESTRICT, 2D_MSAA
  7: MOV TEMP[0].w, IMM[0].zzzz
  8: STORE IMAGE[0], TEMP[0], TEMP[2], RESTRICT, 2D_MSAA
  9: END

This fixes half of https://gitlab.freedesktop.org/mesa/mesa/issues/2248

Fixes: 095a58204d ("radeonsi: expand FMASK before MSAA image stores are used")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
 2020-01-15 10:10:15 +00:00
Marek Olšák 8832a88434 radeonsi: move PS LLVM code into si_shader_llvm_ps.c 
This is an attempt to clean up si_shader.c.

v2: don't move code that is not specific to LLVM

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (v1)
 2020-01-14 18:46:07 -05:00
Marek Olšák 9b60b3ce93 radeonsi: remove always constant ballot_mask_bits from si_llvm_context_init 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák 37916a66b1 radeonsi: fold si_create_function into si_llvm_create_func 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák 42112010a3 radeonsi: rename si_shader_create -> si_create_shader_variant for clarity 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák 63b5d85baa radeonsi: rename si_compile_tgsi_main -> si_build_main_function 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák f4ba457e1e radeonsi: clean up si_shader_info 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák 03950473df radeonsi: merge si_tessctrl_info into si_shader_info 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák 5fa2ab831e radeonsi: fork tgsi_shader_info and tgsi_tessctrl_info 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák 18aaceae8d radeonsi: rename si_shader_info -> si_shader_binary_info 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák 7f4a54d5bd radeonsi: remove TGSI from comments 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák b1badf4ad6 radeonsi: rename DBG_NO_TGSI -> DBG_NO_NIR 
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák b144d4be74 radeonsi: don't adjust depth and stencil PS output locations 
this was for compatibility with TGSI

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2020-01-14 18:46:07 -05:00
Marek Olšák 9e699ae690 radeonsi: actually enable VBOs in user SGPRs 
Fixes: 363b4027fc - radeonsi: put up to 5 VBO descriptors into user SGPRs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-14 13:42:36 -05:00
Marek Olšák f341db3e17 radeonsi: fix assertion and other failures in si_emit_graphics_shader_pointers 
The assertion was failing.

Fixes: 363b4027fc - radeonsi: put up to 5 VBO descriptors into user SGPRs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-14 13:42:36 -05:00
Marek Olšák 2bb88b2fdc radeonsi: don't enable VBOs in user SGPRs if compute-based culling can be used 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-13 15:57:07 -05:00
Marek Olšák 363b4027fc radeonsi: put up to 5 VBO descriptors into user SGPRs 
gfx6-8: 1 VBO descriptor in user SGPRs
gfx9-10: 5 VBO descriptors in user SGPRs

We no longer pull up to 5 VBO descriptors from GTT when SDMA is disabled.

Totals from affected shaders:
SGPRS: 1110528 -> 1170528 (5.40 %)
VGPRS: 952896 -> 951936 (-0.10 %)
Spilled SGPRs: 83 -> 61 (-26.51 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 23766296 -> 22843920 (-3.88 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 179344 -> 179344 (0.00 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-13 15:57:07 -05:00
Marek Olšák 220d00314f ac,radeonsi: increase the maximum number of shader args and return values 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-13 15:57:07 -05:00
Marek Olšák ef253c6789 radeonsi: simplify si_set_vertex_buffers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-13 15:57:07 -05:00
Marek Olšák 312e04689a radeonsi: don't allow draw calls with uninitialized VS inputs 
These always hang, because vertex buffer descriptors are not set up.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-13 15:57:07 -05:00
Marek Olšák c278c73f13 radeonsi: add si_context::num_vertex_elements 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-13 15:57:07 -05:00
Marek Olšák 1e03b63b3b radeonsi: rename desc_list_byte_size -> vb_desc_list_alloc_size 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-13 15:57:07 -05:00
Pierre-Eric Pelloux-Prayer a5fe84aefb radeonsi: release saved resources in si_compute_do_clear_or_copy 
Fixes: 9b331e462e ("radeonsi: use compute shaders for clear_buffer & copy_buffer")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2020-01-10 08:41:40 +01:00
Pierre-Eric Pelloux-Prayer 6912149ee5 radeonsi: release saved resources in si_compute_clear_12bytes_buffer 
Fixes: 6c901f0675 ("radeonsi: use compute shader for clear 12-byte buffer")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2020-01-10 08:41:38 +01:00
Pierre-Eric Pelloux-Prayer 1acf714d57 radeonsi: release saved resources in si_compute_copy_image 
Fixes: 1b25d340b7 ("radeonsi: use compute for resource_copy_region when possible")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2020-01-10 08:41:35 +01:00
Pierre-Eric Pelloux-Prayer e1e87466ae radeonsi: release saved resources in si_compute_clear_render_target 
Fixes: 984fd73515 ("radeonsi: use compute for clear_render_target when possible")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2020-01-10 08:41:33 +01:00
Pierre-Eric Pelloux-Prayer 6c019e28ca radeonsi: release saved resources in si_compute_expand_fmask 
Fixes: 095a58204d ("radeonsi: expand FMASK before MSAA image stores are used")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2020-01-10 08:41:31 +01:00
Pierre-Eric Pelloux-Prayer 9211cbe07a radeonsi: release saved resources in si_retile_dcc 
Fixes: 1f21396431 ("radeonsi: add support for displayable DCC for multi-RB chips")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2330
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2020-01-10 08:41:19 +01:00
Marek Olšák 269953e779 radeonsi/gfx9: force the micro tile mode for MSAA resolve correctly on gfx9 
Fixes: 69ea473 "amd/addrlib: update to the latest version"
Closes: #2325

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-09 16:28:28 -05:00
Marek Olšák d7b565365e ac/gpu_info: add pc_lines and use it in radeonsi 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-08 16:00:40 -05:00
Marek Olšák d1c8aeb24f ac: unify primitive export code 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-08 16:00:38 -05:00
Marek Olšák 1c77a18cc2 ac: unify build_sendmsg_gs_alloc_req 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-08 16:00:36 -05:00
Marek Olšák fd84e422b6 radeonsi: clean up messy si_emit_rasterizer_prim_state 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-08 15:48:49 -05:00
Marek Olšák b64a3240c2 radeonsi: determine accurately if line stippling is enabled for performance 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-08 15:48:47 -05:00
Marek Olšák 79cc7e6ff0 radeonsi: test polygon mode enablement accurately 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-08 15:48:43 -05:00
Marek Olšák 898c9cb797 radeonsi: fix context roll tracking in si_emit_shader_vs 
probably harmless, because we don't need to track context rolls on gfx10

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-08 15:48:39 -05:00
Marek Olšák 4249a90f5d radeonsi: fix monolithic pixel shaders with two-sided colors and SampleMaskIn 
They are never used except for testing AMD_DEBUG=mono.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-08 15:48:35 -05:00
Pierre-Eric Pelloux-Prayer 5f8daae4d8 radeonsi: check ctx->sdma_cs before using it 
e5167a9276 disabled SDMA for gfx8.
This caused 3 piglit arb_sparse_buffer tests (basic, buffer-data
and commit) to crash on GFX8.

Reported-by: Michel Dänzer <michel@daenzer.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Fixes: e5167a9276 ("radeonsi: disable SDMA on gfx8 to fix corruption on RX 580")
 2020-01-08 09:31:35 +01:00
Marek Olšák 420fe1e7f9 radeonsi: remove TGSI 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-06 15:57:20 -05:00
Marek Olšák e5167a9276 radeonsi: disable SDMA on gfx8 to fix corruption on RX 580 
Closes: #1399
Closes: #1889

Cc: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
 2020-01-06 15:38:36 -05:00
Marek Olšák 991328498b radeonsi: move SI and CIK+ SDMA code into 1 common function for cleanups 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
 2020-01-06 15:38:35 -05:00
Marek Olšák 3c265c2586 radeonsi: rename dma_cs -> sdma_cs 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
 2020-01-06 15:38:33 -05:00
Marek Olšák cd6a4f7631 radeonsi: add AMD_DEBUG=nodmacopyimage for debugging 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
 2020-01-06 15:38:32 -05:00
Marek Olšák 0c9e7a67f9 radeonsi: add AMD_DEBUG=nodmaclear for debugging 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
 2020-01-06 15:38:30 -05:00
Marek Olšák 4110e6e564 radeonsi: remove broken and unused SI SDMA image copy code 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
 2020-01-06 15:38:28 -05:00
Marek Olšák 503bd821fa radeonsi: rename SDMA debug flags 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
 2020-01-06 15:38:11 -05:00
Marek Olšák 66483ee017 radeonsi: remove the "display_dcc_offset == 0" assertion 
I think it's not needed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2020-01-03 15:07:19 -05:00