a54bcb9429
radeonsi: enable larger SDMA clears and copies on gfx10.3
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
c4b5fd9ab0
radeonsi: honor a user-specified pitch on gfx10.3
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
a23802bcb9
ac,radeonsi: start adding support for gfx10.3
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
a1602516d7
ac,radeonsi: replace == GFX10 with >= GFX10 where it's needed
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5383 >
2020-06-09 16:17:36 +00:00
04dbf709ed
nir: add callback to nir_remove_dead_variables()
...
This allows us to do API specific checks before removing variable
without filling nir_remove_dead_variables() with API specific code.
In the following patches we will use this to support the removal
of dead uniforms in GLSL.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4797 >
2020-06-03 02:22:23 +00:00
b351a50763
radeonsi: Define gfx10_format in the common header.
...
So we don't have to have multiple definitions of the struct when
sharing with radv.
While at it put the table properly in a C file so we don't have to
deal with multiple definitions, and the struct definition isn't
in generated source.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291 >
2020-06-03 00:17:00 +00:00
c98e52f88a
amd/common,radeonsi: Move gfx10_format_table to common.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291 >
2020-06-03 00:17:00 +00:00
d936f69677
radeonsi: Explicitly map Z16_UNORM_S8_UINT to None for GFX10.
...
We should always use separate planes for textures with this format.
Fixes: 273ead81f1https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5291 >
2020-06-03 00:17:00 +00:00
fe3947632c
radeonsi: add a hack to disable TRUNC_COORD for shadow samplers
...
This fixes dEQP-GLES3.functional.shaders.texture_functions.textureprojlodoffset.sampler2dshadow_vertex.
This is probably a dEQP bug.
Fixes: d573d1d825https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209 >
2020-06-02 20:47:49 +00:00
85a6bcca61
radeonsi: pass at most 3 images and/or shader buffers via user SGPRs for compute
...
This should slightly decrease shader lifetime.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209 >
2020-06-02 20:47:49 +00:00
877c56bfdc
radeonsi: remove const_buffers_declared hacks
...
This was a bug that was uncovered by 4553fc66a54553fc66a5https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209 >
2020-06-02 20:47:49 +00:00
ce4575b3b5
radeonsi: remove unused leftover code for INDIRECT_BUFFER inside IBs
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209 >
2020-06-02 20:47:49 +00:00
cac24bee62
nir: gather which images are MSAA
...
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5209 >
2020-06-02 20:47:49 +00:00
c3e0ba52a0
ac/nir: support 16-bit data in buffer_load_format opcodes
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003 >
2020-06-02 16:29:25 -04:00
b819ba949b
ac/nir: remove type and num_channels args from ac_build_buffer_store_common
...
They were only used for type overloading where we can just use
the type of data.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003 >
2020-06-02 16:29:25 -04:00
e5ea87cde8
ac/nir: use more types from ac_llvm_context
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5003 >
2020-06-02 16:29:25 -04:00
1af8fe4ed5
gallium: add shader caps INT16 and FP16_DERIVATIVES
...
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5002 >
2020-06-02 20:01:18 +00:00
a8e2d79e02
meson: use gnu_symbol_visibility argument
...
This uses a meson builtin to handle -fvisibility=hidden. This is nice
because we don't need to track which languages are used, if C++ is
suddenly added meson just does the right thing.
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740 >
2020-06-01 18:59:18 +00:00
38a4b86145
radeonsi/gfx10: implement most performance counters
...
PAL has all of them.
GE perf counters don't work - no idea why.
I only tested the few that I like to use.
There is no documentation, though most of the enums had already been
in the headers.
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184 >
2020-05-26 06:00:54 -04:00
2a3806ffa3
amd: replace SH -> SA (shader array) in comments
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184 >
2020-05-26 06:00:54 -04:00
2cf46f2e3d
ac/gpu_info: replace num_good_cu_per_sh with min/max_good_cu_per_sa
...
Perf counters use the new max number.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184 >
2020-05-26 06:00:54 -04:00
8c3fe285c9
radeonsi: don't hardcode most perf counter block counts
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184 >
2020-05-26 06:00:54 -04:00
444138d6d9
tree-wide: fix deprecated GitLab URLs
...
They will stop working in the next GitLab release, so let's update them
ASAP to make sure things are propagated to everyone by then.
See:
https://about.gitlab.com/releases/2020/05/06/gitlab-com-13-0-breaking-changes/#removal-of-deprecated-project-paths
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5111 >
2020-05-23 15:33:50 +00:00
9375e72d8d
radeonsi/gfx8: enable TC-compatible HTILE from the beginning as before
...
Fixes: 0d83e7f4b9https://gitlab.freedesktop.org/mesa/mesa/-/issues/2921
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2967
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:45:07 -04:00
d30e1e486d
radeonsi: don't enable TC-compatible HTILE for stencil if stencil doesn't use it
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:45:09 -04:00
caeb44aa24
radeonsi: split si_all_descriptors_begin_new_cs and rename functions
...
A future commit will extend it.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:45:07 -04:00
7b6b35c6b5
radeonsi: move resetting tracked registers into a new function
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:45:07 -04:00
3509d3bd53
ac: update register and packet definitions for preemption
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:45:07 -04:00
56af131f33
Revert "radeonsi: don't wait for idle at the end of gfx IBs"
...
This reverts commit 266fec1307266fec1307https://gitlab.freedesktop.org/mesa/mesa/-/issues/2950
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:44:44 -04:00
3f1f23239a
radeonsi: decrease the max GS invocation count to 32
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:44:44 -04:00
3cd96b5109
radeonsi: don't use INDIRECT_BUFFER within IBs
...
It's fragile. If I change the size or alignment, it hangs. Better safe than
sorry.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095 >
2020-05-23 03:44:44 -04:00
e75effc629
radeonsi/sdma: remove useless compare
...
clang warning:
result of comparison of constant 65536 with expression of type 'uint16_t'
(aka 'unsigned short') is always true
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119 >
2020-05-22 09:12:18 +02:00
d92ab0e763
radeonsi: fix inversed arguments in si_test_gds_memory_management
...
clang warning:
implicit conversion from enumeration type 'enum radeon_bo_usage'
to different enumeration type 'enum radeon_bo_domain'
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119 >
2020-05-22 09:12:06 +02:00
2a6811f0f9
Revert "ac,radeonsi: fix compilations issues with LLVM 11"
...
This reverts commit 42b1696ef6https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5087 >
2020-05-19 07:19:35 +00:00
c9ccceff10
radeonsi: test uncached clear/copy buffer performance with compute shaders
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
5acf99e81f
radeonsi: compute perf tests - don't test 1 wave/SA limit, test no limit first
...
1 wave/SA is always slow and thus not useful
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
c45a2145f5
radeonsi: disable the L2 cache for CPU read mappings of buffers
...
for faster copying over PCIe and no need to flush L2
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
7356144fe4
radeonsi: disable the L2 cache for most CPU mappings of textures
...
for faster blits over PCIe and no need to flush L2
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
cbbc18bc67
radeonsi: use display_dcc_offset for setting displayable_dcc_cb_mask
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
b5ac9d18d8
radeonsi: use vi_dcc_enabled instead of using tex->surface.dcc_offset directly
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
2c4c1b0499
radeonsi: rename SI_RESOURCE_FLAG_TRANSFER to FORCE_LINEAR
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
4907bb44c3
radeonsi: simplify setting resource usage for si_init_temp_resource_from_box
...
usage was set twice, once in the function, and then after the function
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
f57276309b
radeonsi: tweak clear/copy_buffer limits when to use compute
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
b158b117e1
radeonsi: optimize access pattern for compute blits with linear textures
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
9f8089139f
radeonsi: use correct clear value size for EQAA in expand_fmask
...
based on the fmask_expand_values array.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4935 >
2020-05-15 22:12:35 +00:00
Joshua Ashton
d573d1d825
radeonsi: Use TRUNC_COORD on samplers
...
The default behaviour (0) is: "round-nearest-even to n.6 and drop fraction when point sampling" whereas the OpenGL spec simply wants us to floor it (1) "truncate when point sampling".
See 8.14.2 in the OpenGL spec:
https://www.khronos.org/registry/OpenGL/specs/gl/glspec46.core.pdf
The Direct3D spec also mandates this (https://microsoft.github.io/DirectX-Specs/d3d/archive/D3D11_3_FunctionalSpec.htm#7.18.7%20Point%20Sample%20Addressing )
On WineD3D:
This fixes some point-sampling texture precision issues in some Direct3D 9 titles such as Guild Wars 2 and htoL#NiQ: The Firefly Diary that are not present on other vendors.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3953 >
2020-05-15 21:56:44 +00:00
f80d653d70
radeonsi: don't expose 16xAA on chips with 1 RB due to an occlusion query issue
...
Only Stoney and Raven2 are affected.
Cc: 20.0 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5047 >
2020-05-15 21:04:55 +00:00
1152af2eda
radeonsi: also enable tgsi_to_nir caching for compute shaders
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993 >
2020-05-13 19:43:05 +00:00
45e69e7d11
radeonsi: Enable tgsi to nir disk cache
...
Enable the tgsi to nir cache for radeonsi.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993 >
2020-05-13 19:43:05 +00:00
522bd414f3
ttn: Add new allow_disk_cache parameter
...
For now this parameter doesn't do anything.
It means the implementation is allowed to use
a cache on disk.
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993 >
2020-05-13 19:43:05 +00:00
8c9b9aac7d
gallium: change comments to remove 'state tracker'
...
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902 >
2020-05-13 13:47:27 -04:00
d6287a94b6
gallium: rename 'state tracker' to 'frontend'
...
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902 >
2020-05-13 13:46:53 -04:00
c668bdf05c
radeonsi: do not use cmask with encrypted texture
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401 >
2020-05-11 10:26:05 +02:00
8873ea0e25
radeonsi: determine secure flag must be set for gfx IB
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401 >
2020-05-11 10:25:53 +02:00
2c2ab36f53
radeonsi: add support for PIPE_RESOURCE_FLAG_ENCRYPTED
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401 >
2020-05-11 10:25:53 +02:00
5c58cbe84d
radeonsi/sdma: implement tmz support
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401 >
2020-05-11 10:25:53 +02:00
5d96c26b67
radeonsi: force using staging texture when uploading to secure texture
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401 >
2020-05-11 10:25:53 +02:00
2853ed1a24
radeonsi: allocate framebuffer texture as secure when using tmz
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401 >
2020-05-11 10:25:53 +02:00
727a0a53fd
radeonsi: remove emacs style config file
...
As radeonsi has synced the code style with main mesa,
remove the orginal radeonsi spec emacs config file and
use the top level dir .dir-locals.el
Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4961 >
2020-05-09 00:57:26 +00:00
808eb20186
radeonsi: Fix omitted flush when moving suballocated texture
...
Fixes: 5e805cc74bhttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4925 >
2020-05-07 17:00:08 -04:00
441eaef6a9
amd: unify code for overriding offset and stride for imported buffers
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
c164ea86e1
ac/surface,radeonsi: move the set/get_umd_metadata code into ac_surface.c
...
The indentation is on purpose. The whole file will be reindented to this
code style some other time.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
7691de0dce
ac/surface,radeonsi: move the set/get_bo_metadata code to ac_surface.c
...
The indentation is on purpose. The whole file will be reindented to this
code style some other time.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
56e37374dd
amd: assume HTILE is always rb/pipe_aligned, remove ac_surface.u.gfx9.htile
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
cf61f635ff
amd: assume CMASK is always rb/pipe_aligned, remove ac_surface.u.gfx9.cmask
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4863 >
2020-05-07 20:13:41 +00:00
29da521280
radeonsi: fix compilation of monolithic PS
...
This was totally broken. Monolithic PS is only used if FBFETCH or
interpolateAtSample are used.
When the PS prolog was built, it overwrote ctx->main_fn.
Discovered by @eefano.
Fixes: 8832a88434Closes : #2814
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4918 >
2020-05-06 17:02:23 +00:00
0d83e7f4b9
radeonsi: enable TC-compatible HTILE on demand for best Z/S performance
...
I haven't measured this, but it can only help.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866 >
2020-05-05 16:27:29 +00:00
39571d384e
radeonsi: allow tc_compatible_htile to be mutable
...
Move the relevant code from si_init_depth_surface to
si_emit_framebuffer_state, so that it can be changed after a pipe_surface
is initialized.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866 >
2020-05-05 16:27:29 +00:00
04085bedc2
radeonsi/gfx9: always use IMG_DATA_FORMAT_S8_32 for 8-bit stencil
...
I wanna remove dependency on tc_compatible_htile from non-dynamic states.
This should be the same as 8_UINT if HTILE is disabled.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866 >
2020-05-05 16:27:29 +00:00
266fec1307
radeonsi: don't wait for idle at the end of gfx IBs
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4894 >
2020-05-05 11:52:21 -04:00
ae4379d81e
ac/nir: export some undef as zero
...
NIR already optimizes undef usage.
If undef reaches llvm, it's probably because of a broken shader.
In this situation, rather than letting llvm use the undef values
to do more optimization and probably produce incorrect results,
we replace undef values by 0.
"undef" values that are directly used in exports are kept as undef,
because this allows llvm to optimize them away.
This is only enabled for radeonsi.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2689
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607 >
2020-05-05 12:26:26 +02:00
0ee1a724bf
gallium: add a new cap PIPE_CAP_GLSL_ZERO_INIT
...
Allows driver to select a zero init mode between the 3 possible values.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607 >
2020-05-05 12:26:02 +02:00
547e81655a
radeonsi: don't print gs_copy_shader stats for shaderdb
...
Fixes: dbc86fa3dehttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4607 >
2020-05-05 12:26:02 +02:00
64662dd5ba
radeonsi: add workaround for issue 2647
...
For unknown reasons pixel shaders in KSP game get executed with
infinite interpolation coefficients and this causes an infinite
loop in the shader.
This commit adds a hacky workaround that kills pixel shaders if
invalid interp coeffs are detected and enables it for KSP.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2174
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2647
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4700 >
2020-05-05 09:41:14 +00:00
f1a40a26a9
Revert "ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set"
...
This reverts commit f6d87ec8a9f6d87ec8a9https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4864 >
2020-05-02 20:12:38 +00:00
bdd2f284d9
radeonsi: revert an accidental change in si_clear_buffer
...
The change was in: 7b0b085c947b0b085c94https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
5afec9bc9f
radeonsi: fix si_compute_clear_render_target with render condition enabled
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
19db1a540c
radeonsi: add a workaround to fix KHR-GL45.texture_view.view_classes on gfx9
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
d6acdbd935
radeonsi: implement and use compute-based DCC decompression on gfx9-10
...
DCC_DECOMPRESS doesn't work. Instead of trying to figure out why,
use a compute blit where the load is compressed and the store is
uncompressed.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
d3da73954a
radeonsi: add SI_IMAGE_ACCESS_DCC_OFF to ignore DCC for shader images
...
A shader-based DCC decompress pass will use this.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
93d5c86081
radeonsi: bind shader images after DCC is disabled for image stores
...
This prevents an infinite recursion with a compute-based DCC decompression
when it restores shader images.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
44d27fd6fb
radeonsi: clean up and deduplicate code around internal compute dispatches
...
In addition to the cleanup, there are these changes in behavior:
- clear_render_target waits for idle after the dispatch and then flushes
L0-L1 caches (this was missing)
- sL0 is no longer invalidated before the dispatch, because src resources
don't use it
- sL0 is no longer invalidated after the dispatch if dst is an image
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
e58dcc47c3
radeonsi: unify and align down the max SSBO/TBO/UBO buffer binding size
...
Rounding down the size fixes:
KHR-GL45.enhanced_layouts.ssb_member_invalid_offset_alignment
Fixes: 03e2adc990https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761 >
2020-04-30 22:27:31 +00:00
1c8bcad81a
gallium: add pipe cap for scissored clears and pass scissor state to clear() hook
...
this adds a new pipe cap that drivers can support which enables passing buffer
clears with scissor test enabled through to be handled by the driver instead
of having mesa draw a quad
also adjust all existing clear() hooks to have the new parameter
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4310 >
2020-04-29 18:05:06 +00:00
5e31e4b697
ac/surface: add code for gfx10 displayable DCC
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
a3dc7fffbb
ac/surface: don't compute DCC if it's unsupported by DCN on gfx9+
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
3dc2ccc14c
ac/surface: replace RADEON_SURF_OPTIMIZE_FOR_SPACE with !FORCE_SWIZZLE_MODE
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
f6d87ec8a9
ac/surface: remove RADEON_SURF_TC_COMPATIBLE_HTILE and assume it's always set
...
So that drivers can enable it without worrying how the texture was
allocated.
v2: reworked the mechanism, hopefully fixes now
added Bas Nieuwenhuizen's diff to fix radv
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
25d3cc293e
ac/surface: rename micro tile mode enums like gfx10 uses them
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697 >
2020-04-29 14:53:25 +00:00
8e03cf15f9
radeonsi: Count planes for imported textures.
...
For the DRI2 lowered YUV import separate pipe_resources get created
but in the end the first resource just gets asked for NPLANES.
Since
1) (Almost) everything uses the first resource + a plane index in the
Gallium interface.
2) This mirrors non-imported textures.
lets fix this in the driver.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4779 >
2020-04-28 11:16:03 +00:00
afd9274d48
st/dri: Set next in template instead of after creation. (v2)
...
This should prevent horrors like Iris has with the delayed calls
to iris_resource_finish_aux_import just because info is not
available at allocation time.
AFAICT all drivers just copy the template except radeonsi/r600
which reset the next pointer.
AFAICT there is also no other place we get a state tracker setting
next ptrs on a resource.
v2: Updated Gallium docs.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3792 >
2020-04-27 21:08:01 +00:00
42b1696ef6
ac,radeonsi: fix compilations issues with LLVM 11
...
Latest LLVM replaced LLVMVectorTypeKind.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2826
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4755 >
2020-04-27 17:13:36 +00:00
19eb89b0f3
gallium: add PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE for glthread
...
and add radeonsi support.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4758 >
2020-04-27 11:56:06 +00:00
f2c2a28073
ac: update and document fast math flags used by radeonsi
...
This should have no effect, because we never use FP division, but
it's safer for the future.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4696 >
2020-04-27 11:20:16 +00:00
b520a58cc1
radeonsi: use pipe_blend_state::max_rt to update fewer blend registers
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698 >
2020-04-24 10:38:55 +00:00
b4fd8f1919
ac,radeonsi: simplify checking for Navi1x chips
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698 >
2020-04-24 10:38:54 +00:00
133efa112d
radeonsi: enable support for AlphaToCoverageDitherControlNV
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4543 >
2020-04-23 12:02:56 +05:30
17acff01a0
radeonsi: skip vs output optimizations for some outputs
...
If PT_SPRITE_TEX is enabled, PS inputs are overriden at runtime so
we can't apply the vs output optim.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2747
Fixes: 3ec9975555https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4559 >
2020-04-20 08:45:16 +02:00
8521acd660
radeonsi: don't assume ctx is always a threaded_context
...
Fixes: dcb1e8fef8https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4587 >
2020-04-17 11:36:20 +02:00
d80fb02430
winsys/amdgpu: Retrieve WC flags from imported buffers.
...
Otherwise reading from an imported mapped GTT+WC linear texture
is painfully slow.
Sadly no radeon winsys implementation, as I don't know a suitable
kernel driver operation.
Hit this in vaGetImage with an image imported from minigbm (which
we are switching to allocate WC for SCANOUT images).
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4542 >
2020-04-16 13:51:28 +00:00
dcb1e8fef8
radeonsi: use thread_context::bytes_mapped_limit
...
Limit the amount of "in-flight" mapping to 1/4 of the total RAM.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2735
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4508 >
2020-04-16 08:36:04 +00:00
98743f648a
radeonsi: fix Segmentation fault during vaapi enc test
...
Fix Segmentation fault during vaapi enc test on Arcturus.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4472 >
2020-04-08 18:11:45 +00:00
1f649ff107
radeonsi: don't lower constant arrays to uniforms in GLSL IR
...
This re-enables the change made in 2f5783bc2b3e1dd99adc3e1dd99adchttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4474 >
2020-04-08 01:23:40 +00:00
dbc86fa3de
radeonsi: dump shader stats when hitting the live cache
...
With the introduction of the live shader cache, when a shader is
fetched from the cache no stats are printed for shaderdb.
So in a sequence like this: vs1, fs1, vs1, fs2, shaderdb may see
3 or 4 lines, depending on the threads being used.
If one run produces 3 lines while the other produces 4 lines, it
would compare vs1 stats with fs2 stats.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4355 >
2020-04-02 08:31:37 +02:00
d7008fe46a
radeonsi: switch to 3-spaces style
...
Generated automatically using clang-format and the following config:
AlignAfterOpenBracket: true
AlignConsecutiveMacros: true
AllowAllArgumentsOnNextLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: false
AlwaysBreakAfterReturnType: None
BasedOnStyle: LLVM
BraceWrapping:
AfterControlStatement: false
AfterEnum: true
AfterFunction: true
AfterStruct: false
BeforeElse: false
SplitEmptyFunction: true
BinPackArguments: true
BinPackParameters: true
BreakBeforeBraces: Custom
ColumnLimit: 100
ContinuationIndentWidth: 3
Cpp11BracedListStyle: false
Cpp11BracedListStyle: true
ForEachMacros:
- LIST_FOR_EACH_ENTRY
- LIST_FOR_EACH_ENTRY_SAFE
- util_dynarray_foreach
- nir_foreach_variable
- nir_foreach_variable_safe
- nir_foreach_register
- nir_foreach_register_safe
- nir_foreach_use
- nir_foreach_use_safe
- nir_foreach_if_use
- nir_foreach_if_use_safe
- nir_foreach_def
- nir_foreach_def_safe
- nir_foreach_phi_src
- nir_foreach_phi_src_safe
- nir_foreach_parallel_copy_entry
- nir_foreach_instr
- nir_foreach_instr_reverse
- nir_foreach_instr_safe
- nir_foreach_instr_reverse_safe
- nir_foreach_function
- nir_foreach_block
- nir_foreach_block_safe
- nir_foreach_block_reverse
- nir_foreach_block_reverse_safe
- nir_foreach_block_in_cf_node
IncludeBlocks: Regroup
IncludeCategories:
- Regex: '<[[:alnum:].]+>'
Priority: 2
- Regex: '.*'
Priority: 1
IndentWidth: 3
PenaltyBreakBeforeFirstCallParameter: 1
PenaltyExcessCharacter: 100
SpaceAfterCStyleCast: false
SpaceBeforeCpp11BracedList: false
SpaceBeforeCtorInitializerColon: false
SpacesInContainerLiterals: false
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4319 >
2020-03-30 11:05:52 +00:00
e609737526
radeonsi/gfx10: fix descriptors and compute registers for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
4ef1c8d60b
radeonsi/gfx10: fix the wave size for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
b4a0087a1c
radeonsi/gfx10: user correct ACQUIRE_MEM packet for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
acc5bdf887
radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
ee4d797d8b
radeonsi/gfx10: don't use NGG culling if compute-based culling is used
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
65e9239977
radeonsi: add num_vbos_in_user_sgprs into the shader cache key
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
be9455bdf7
radeonsi: always create wait_mem_scratch for compute-based culling
...
used by the primitive restart emulation
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
42ce52b904
radeonsi: set amdgpu-gds-size for mode == 2 of compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
3381f2fa06
radeonsi: fix incorrect ordered_wave_id initilization for compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
d89b19cfe1
radeonsi: remove obsolete TODO comment related to compute-based culling
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269 >
2020-03-28 00:58:34 +00:00
b94c277fd1
radeonsi: enable full out-of-order drawing when allow_draw_out_of_order is set
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152 >
2020-03-26 03:08:34 -04:00
d269fb33b0
radeonsi: Stop exposing PIPE_SHADER_CAP_FP16
...
Not fully supported.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321 >
2020-03-25 22:43:41 +00:00
bd6234f24b
radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed
...
FLUSH_AND_INV_DB should be done when we're changing surface state
registers of a bound depth target.
When depth_clear_value changes, si_state will modify
S_028038_ZRANGE_PRECISION so we need to flush the DB caches.
Verified with the captures from bugs cited below.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1283
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1330
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263 >
2020-03-24 08:05:12 +01:00
5cc3ab0ba0
vbo,gallium: make glBegin/End buffer size configurable by drivers
...
The default is 512 KB, but radeonsi wants 4 MB.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4154 >
2020-03-21 03:39:51 +00:00
511c6408f4
Android.mk: Tweak MESA_ENABLE_LLVM checks
...
Change the MESA_ENABLE_LLVM checks in Android.mk
files in order to get mesa3d to build w/ AOSP
using mmma.
This tries to re-create a change that was introduced
in the following merge in the AOSP branch:
69f2c0128d2b Merge branch 'aosp/upstream-18.0'
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4175 >
2020-03-19 21:20:08 +00:00
56cc10bd27
ac: unify denorm setting enforcement
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4196 >
2020-03-17 20:47:48 +00:00
7ba5e94c50
ac: add radeon_info::use_late_alloc to control LATE_ALLOC globally
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143 >
2020-03-12 17:27:23 +00:00
09295e95eb
radeonsi: tune primitive binning for small chips
...
same as PAL
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143 >
2020-03-12 17:27:23 +00:00
629b6ddd71
radeonsi: set better tessellation tunables on gfx9 and gfx10
...
same as PAL
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143 >
2020-03-12 17:27:23 +00:00
bf5b65d0fd
radeonsi/gfx10: cache metadata in L2 on small chips
...
same as PAL.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143 >
2020-03-12 17:27:23 +00:00
70298ec4c0
gallium: add PIPE_CAP_DRAW_INFO_START_WITH_USER_INDICES
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3591 >
2020-03-11 18:45:28 +00:00
6e035c01fb
Revert "gallium: make handles of set_global_binding 64 bit"
...
This reverts commit e1ffb72a05
2020-03-10 22:41:26 +00:00
e1ffb72a05
gallium: make handles of set_global_binding 64 bit
...
needed by CL
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072 >
2020-03-10 22:06:19 +00:00
c1b8e84961
radeonsi: determine uses_bindless_samplers correctly
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079 >
2020-03-09 16:08:14 -04:00
7481c4be58
radeonsi: add a bug workaround for NGG - LATE_ALLOC_GS
...
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079 >
2020-03-09 16:08:10 -04:00
5ea2034f58
radeonsi: enable EXT_texture_shadow_lod
...
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4079 >
2020-03-09 16:08:07 -04:00
61fb17e8d7
amd: join emit_kill() from radv and radeonsi in ac_nir_to_llvm
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047 >
2020-03-09 12:29:32 +00:00
9d64ad2fe7
radeonsi: lower discard to demote when FS_CORRECT_DERIVS_AFTER_KILL is enabled
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4047 >
2020-03-09 12:29:32 +00:00
8ab31808fd
radeonsi: add 10-bit HEVC encode support for VCN2.0 devices
...
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4033 >
2020-03-06 16:10:40 +00:00
771f16cf61
radeonsi: remove AMD_DEBUG=sisched option
...
sisched is not maintained anymore in LLVM.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4059 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4059 >
2020-03-06 11:35:12 +01:00
9432eb3e9c
ac: rename lds_size_per_cu to lds_size_per_workgroup
...
It's more accurate.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975 >
2020-03-03 08:16:56 +01:00
69aadc4933
radeonsi: fix surf_pitch for subsampled surface
...
gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.
For subsampled formats like uyvy (bpe is 2) this breaks in various places:
- sdma copy
- video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363 )
when the vl_compositor_gfx_render method is used
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
2020-02-27 10:01:31 +01:00
fb29f0847f
radeonsi: test subsampled format in testdma
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738 >
2020-02-27 10:01:31 +01:00
974c87e449
ac,radeonsi: add ac_gpu_info::lds_size_per_cu
...
Both RadeonSI and RADV use the WGP mode, so we can assume 128KB on
GFX10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899 >
2020-02-26 07:58:47 +00:00
68d1757420
radeonsi: Fix compute copies for subsampled formats.
...
We cannot do image stores (or render) to subsampled formats.
Reinterpret as R32_UINT instead.
si_set_shader_image_desc already uses the blockwidth from
the view formats, so the image width adjustments are
already implemented.
This is still icky with mipmapping on GFX9+ though, but
since it is mostly a video format I don't think that will
be much of an issue and broken mipmapping is still better
than broken everything.
Fixes: e5167a9276https://gitlab.freedesktop.org/mesa/mesa/issues/2535
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853 >
2020-02-19 22:51:12 +00:00
7e2b4bf256
radeonsi: don't wait for shader compilation to finish when destroying a context
...
This was a hack for glsl_types deinitialization and it predates the proper
fix, which was the addition of glsl_type_singleton_decref.
This fixes a crash when the context is destroyed via the atexit handler.
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800 >
2020-02-14 16:19:38 -05:00
0660cbf426
radeonsi: make si_fence_server_signal flush pipe without work
...
glSignalSemaphoreEXT sometime doesn't signal the semaphore, it is
because radeonsi doesn't flush if gl context doesn't have pending
work. Fix the porblem by always submit ib.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779 >
2020-02-12 23:51:50 +00:00
1082e6fcb8
radeonsi: don't update states for the DCC MSAA bug on GFX6-7
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646 >
2020-02-10 17:24:09 -05:00
fbb27eebc8
radeonsi: fix the DCC MSAA bug workaround
...
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646 >
2020-02-10 17:24:02 -05:00
35961b10da
radeonsi: don't report that multi-plane formats are supported
...
Fixes: a554b45dCloses : #2376
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3632 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3632 >
2020-02-07 20:42:42 -05:00
3da91b3327
radeonsi/ngg: add VGT_FLUSH when enabling fast launch
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2418
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2426
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2434
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3675 >
2020-02-05 10:27:54 +00:00
ab081970e0
gallium: Add and use a helper for packing uc from a color_union.
...
The same pattern kept coming up, and we don't need to hit
util_format_write_4* to do it when we have util_format_pack_rgba().
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744 >
2020-02-04 19:02:59 +00:00
c574cda3c6
util: Make helper functions for pack/unpacking pixel rows.
...
Almost all users of the unpack functions don't have strides to plug in
(and many are only doing one pixel!), and this will help simplify
them.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2744 >
2020-02-04 19:02:59 +00:00
0d99ff54cc
radeonsi: Clear uninitialized variable
...
|view| was not initialized leading to flaky test failures in SkQP
test unitTest_ES2BlendWithNoTexture.
Fixes: 029bfa3d25https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3592 >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3592 >
2020-01-28 16:29:48 +00:00
a803d41248
radeonsi: move AMD_DEBUG tests to AMD_TEST
...
AMD_DEBUG env var is stored in a 64 bits int and has 64 different values.
This commit makes some space by moving the test* special values to AMD_TEST.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3492 >
2020-01-27 09:29:10 +01:00
Marek Olšák
Timothy Arceri
Bas Nieuwenhuizen
Dylan Baker
Eric Engestrom
Pierre-Eric Pelloux-Prayer
Michel Dänzer
Joshua Ashton
Axel Davy
Qiang Yu
Blaž Tomažič
Mike Blumenkrantz
Samuel Pitoiset
Indrajit Kumar Das
James Zhu
Kristian H. Kristensen
John Stultz
Karol Herbst
Karol Herbst
Sonny Jiang
Daniel Schürmann
Thong Thai
Bas Nieuwenhuizen
Peng Huang
Eric Anholt
Drew Davenport