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radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling 

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
This commit is contained in:
Marek Olšák 2020-03-20 17:30:33 -04:00 committed by Marge Bot
parent ee4d797d8b
commit acc5bdf887
1 changed files with 3 additions and 0 deletions
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3
src/gallium/drivers/radeonsi/si_compute_prim_discard.c
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@ -240,6 +240,9 @@ si_build_ds_ordered_op(struct si_shader_context *ctx, const char *opcode,
LLVMValueRef m0, LLVMValueRef value, unsigned ordered_count_index,
bool release, bool done)
{
if (ctx->screen->info.chip_class >= GFX10)
ordered_count_index |= 1 << 24; /* number of dwords == 1 */
LLVMValueRef args[] = {
LLVMBuildIntToPtr(ctx->ac.builder, m0,
LLVMPointerType(ctx->ac.i32, AC_ADDR_SPACE_GDS), ""),