Commit Graph

3376 Commits

Author SHA1 Message Date
Connor Abbott c601ba332b ir3/sched: Fix could_sched() determination
This needs to be accurate so that when we split and then schedule a new
a0.x/a1.x/p0.x write we will eventually make progress. It wasn't taking
the kill_path into account which could create an infinite loop as we
keep scheduling writes whose uses are blocked because they are memory
instructions not on the kill_path.

Closes: #6413
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16635>
2022-06-22 10:09:13 +00:00
Danylo Piliaiev a8671b2182 meson/tu: Don't compile libdrm paths if KGSL is selected
Even if there is libdrm we shouldn't use it if KGSL is selected.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17173>
2022-06-22 11:52:36 +03:00
Emma Anholt 5f09b1ebe9 ci/bare-metal: Add test phase timeouts to all boards.
This should help with "marge got stuck for an hour and all I got was this
failed job with no results/" when a system intermittently wedges.

This replaces the BM_POE_TIMEOUT ("did we get something on serial in the
last 3 minutes?") that rpi had, in favor of checking that the whole test
job gets through in 20 minutes.

Acked-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17096>
2022-06-21 21:38:25 +00:00
Danylo Piliaiev 909e7aaf57 tu: Reset xfb_used at the end of a renderpass
Otherwise xfb_used could be true until the end of command buffer,
which is not what we intended it to be.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17162>
2022-06-21 21:15:10 +00:00
Emma Anholt 086faecbba turnip: Document some fields about resolves.
I noticed the unk12 pattern, and cwabbott and danylo had figured out some
more details.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17126>
2022-06-21 19:40:58 +00:00
Danylo Piliaiev 48540caec9 tu: Disable sample counting for 3d blits during occlusion query
Per Vulkan spec only "Draw" commands should be counted towards
occlusion query.

Apparently RB_SAMPLE_COUNT_CONTROL::UNK0 bool controls whether
sample counting is enabled, so we could use it to disable
sample counting for 3d blits which are sometimes used for
clear/copy/blit/gmem-store/resolve operations.

Fixes GL CTS tests running through Zink:
 dEQP-GLES3.functional.occlusion_query.depth_clear
 dEQP-GLES3.functional.occlusion_query.depth_clear_stencil_clear
 dEQP-GLES3.functional.occlusion_query.scissor_depth_clear_stencil_clear
 dEQP-GLES3.functional.occlusion_query.scissor_stencil_clear
 dEQP-GLES3.functional.occlusion_query.stencil_clear

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6559

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17138>
2022-06-21 13:13:36 +00:00
David Heidelberg 57ad38c2fc ci/freedreno: disable non-existing trace
Never existed in the repository.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17137>
2022-06-20 16:36:10 +00:00
David Heidelberg dfe9b856cb ci/freedreno: update restricted traces to the brotli compressed version
Save some space on proxies and speedup network transfer to the runners.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17016>
2022-06-20 12:42:41 +00:00
Chia-I Wu 858cd2797c freedreno/fdl: use XYZW swap for PIPE_FORMAT_X24S8_UINT
We used to use WZYX and apply swizzles.  Because swizzles apply for
border colors as well, the gallium driver un-swizzled the border colors
to cancel out swizzles.  That did not work for turnip because turnip
advertises customBorderColorWithoutFormat and does not know when to
un-swizzle.

This change replaces WZYX by XYZW and removes the swizzles.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6516
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16647>
2022-06-17 18:39:47 +00:00
Danylo Piliaiev 10f6191fb5 turnip: copy disasm strings for pipeline executables
A single compiled_shaders instance could be reused by several
pipelines, but strings from disasm info could be stolen only once.
So now we have to copy them.

Fixes crashes when using RenderDoc.

Fixes: 05329d7f9a
("tu: Implement pipeline caching with shared Vulkan cache")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17053>
2022-06-16 08:45:34 +00:00
Connor Abbott cba6da2b21 tu: Save/restore *_BIN_CONTROL in 3d GMEM store path
These are normally only set once because it's constant across the entire
renderpass, but they're trashed by the 3d store path because it needs to
store to CCU instead of GMEM. Therefore we need to save/restore them. Do
it in a way compatible with #5181.

Fixes: b157a5d ("tu: Implement non-aligned multisample GMEM STORE_OP_STORE")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17058>
2022-06-16 01:10:24 +00:00
Connor Abbott a9d7b47613 tu: Add missing WFI to the 3d GMEM store path
Similar to the 2d path.

Fixes: b157a5d ("tu: Implement non-aligned multisample GMEM STORE_OP_STORE")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17058>
2022-06-16 01:10:24 +00:00
Connor Abbott 705c0d0373 tu: Fix 3d GMEM store swizzle in texture descriptor
Even though image views for attachments must use the identity swizzle,
there are cases where we have to add in our own swizzle, in particular
for D24S8 when the view is depth-only/stencil-only. Therefore we have to
reset it to the identity, similar to what we do with input attachments.

Fixes: b157a5d ("tu: Implement non-aligned multisample GMEM STORE_OP_STORE")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17058>
2022-06-16 01:10:24 +00:00
Connor Abbott 6dfabab08f freedreno/a6xx: Support more 3-component formats
These should be trivially enableable. This gets us some test coverage on
turnip because there are no tests of RGB32 texel buffers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16980>
2022-06-15 22:48:38 +00:00
Connor Abbott 2e63c570dd tu: Enable uniform texture buffers with NPOT formats
This is enough for zink to expose ARB_texture_buffer_object_rgb32 and
therefore GL 4.0. We could enable sampled images with a few more
workarounds, but the blob doesn't bother and there isn't any need at the
moment.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16980>
2022-06-15 22:48:38 +00:00
Chia-I Wu af0080c4ef turnip: advertise VK_EXT_border_color_swizzle
We already support the functionality so just advertise it.  Pass all
dEQP-VK*border_swizzle*.

v2: update freedreno-a630-fails.txt

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17019>
2022-06-15 15:48:47 +00:00
Connor Abbott 169e03800d tu: Implement VK_EXT_color_write_enable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16936>
2022-06-14 23:18:17 +00:00
Connor Abbott 94be0dd0b8 tu: Implement extendedDynamicState2LogicOp
Because this impacts most of the registers in the BLEND draw state, we
make the entire draw state dynamic so that it all gets re-emitted when
the logicOp changes. This also lays the groundwork for
VK_EXT_color_write_enable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16936>
2022-06-14 23:18:17 +00:00
Connor Abbott c23eb99357 tu: Fix partial-write LRZ determination
There were a few problems with this:

- It wasn't considering logic op at all, which is another source of
  reading from the destination.
- It was conditioned on the blend_enable_mask, so it was missing the
  case where there's no blending but some of the outputs were masked
  out.
- It wasn't considering attachments with less than 4 components (for
  example, normals in a typical deferred rendering setup) and would
  always consider them partially written unless the user added extra
  unnecessary components.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16936>
2022-06-14 23:18:17 +00:00
David Heidelberg a7f7f2a1dd ci/freedreno: fix A530 glmark2@ideas:speed=10000 trace
Just one-pixel change in rendering, look correct to me.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16909>
2022-06-14 11:52:45 +00:00
David Heidelberg e8cf79f664 ci/freedreno: add Blender, Warzone2100, Freedoom and Unvanquished traces
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16909>
2022-06-14 11:52:45 +00:00
Connor Abbott 3cd39c2b32 tu: Enable VK_KHR_swapchain_mutable_format
This is already implemented entirely in common code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16976>
2022-06-13 14:58:32 +00:00
Danylo Piliaiev 19682028eb tu/autotune: Prevent division by zero
src/freedreno/vulkan/tu_autotune.c:509:48: runtime error: division by zero

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16967>
2022-06-10 14:09:59 +00:00
Danylo Piliaiev 4846d53b18 turnip: Fix out-of-bounds builder->shader_iova access
src/freedreno/vulkan/tu_pipeline.c:1722:72: runtime error: index 5 out of bounds for type 'uint64_t [5]'

Fixes: 05329d7f9a
("tu: Implement pipeline caching with shared Vulkan cache")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16967>
2022-06-10 14:09:59 +00:00
Chia-I Wu 3933752c7f turnip: force sample interpolations for sample shading
Sample shading has similiar definitions in Vulkan and OpenGL, and they
both require unique associated data.  While the definition for Vulkan
might change, we should stick to the current definition until the change
takes place and until apps (i.e., ANGLE) are updated.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16700>
2022-06-10 12:08:32 +00:00
Jason Ekstrand 0c764afac1 turnip: Set supported_sync_types before wsi_init
The WSI code is about to start querying for available semaphore handle
types via GetPhysicalDeviceExternalSemaphoreProperties in wsi_init().
For drivers that use vk_sync, supported_sync_types needs to be
initialized before GetPhysicalDeviceExternalSemaphoreProperties is
called.  Really, wsi_init() should be the very last step of physical
device setup.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4037>
2022-06-10 01:33:12 +00:00
Jason Ekstrand 4c95b574d1 turnip: Use the common QueuePresent implementation
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4037>
2022-06-10 01:33:12 +00:00
Jason Ekstrand 513d73b160 turnip: Use the common AcquireNextImage implementation
The only reason for the wrapper was so that we could dummy signal the
semaphore and fence.  Now that the WSI code always dos this for us, we
can drop our wrapper.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4037>
2022-06-10 01:33:12 +00:00
Emma Anholt c426e21ff1 turnip: Reverse the order of walking pipes or tiles on odd rows.
This improves the cache locality compared to raster order.  Improves
gfxbench vk-5-normal perf by 3.3009% +/- 0.105934% (n=3).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16917>
2022-06-09 20:36:42 +00:00
Chia-I Wu 790fc8455f ci/turnip: add a link to VkPhysicalDeviceMemoryProperties failure
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16939>
2022-06-09 19:55:32 +00:00
Chia-I Wu 5c17a04282 turnip: consider render pass costs in autotune
To be able to sum drawcall cost and render pass cost, the units of costs
are changed to bytes.  With that, tu_autotune_use_bypass can make
decisions by comparing the costs of sysmem rendering and gmem rendering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
2022-06-08 12:48:08 +00:00
Chia-I Wu ce118a7002 turnip: estimate render pass costs
They will be used by autotuner.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
2022-06-08 12:48:08 +00:00
Chia-I Wu fe9a2374e6 turnip: include stencil test for drawcall costs
Stencil test reads from and writes to the stencil buffer.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
2022-06-08 12:48:08 +00:00
Chia-I Wu 2dc10165a1 turnip: base pipeline draw costs on colorWriteMask
drawcall_base_cost estimates the memory bandwidth per sample.
colorWriteMask should be more accurate than fs outputs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
2022-06-08 12:48:08 +00:00
Chia-I Wu 6fe7b92114 turnip: if-checks autotune debug macros
This avoids bitrot while the compiler can easily optimize away those
checks.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
2022-06-08 12:48:08 +00:00
Emma Anholt 7af5929b54 turnip: Move tile loads back into the draw CS.
Now that we don't need to know if HW binning actually will get used or
not, we can just emit the tile loads into the start of the draw CS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Danylo Piliaiev ecabd3b5a9 turnip: Allow nested CP_COND_REG_EXEC
This ends up being needed for moving tile loads into the draw cs.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt a92fad45e9 turnip: Allow load/store skipping in vkCmdClearAttachments().
We have to use a 3D draw to make it possible (so it goes through the
binner's visibility calcs), but hopefully the increased overhead for apps
with non-skippable rendering balances against skipping in others.

The real motivation is to get draw-time state out of tile load setup.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt b8619ef343 turnip: Refactor a bit of subpass attachment processing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt 83ae4a5ed4 turnip: Include 3d-based CmdClearAttachments() in binning visibility.
It means the clear's draw can get skipped when it doesn't intersect with
the tile.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt 48403628a2 turnip: Refactor a bit of repeated code for subpass setup.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt 5b119c0148 ci/turnip: Add a little forced touch-testing of XFB with no binning requested.
This is just a couple of seconds of runtime.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt 046438b7a4 turnip: Use fb->binning_possible to decide on conditional tile load/stores.
When !fb->binning but fb->binning_possible, we can just set the VSC
per-tile visibility reg to all visible in the "whoops, we'd rather not bin
but we had to anyway for XFB" case.  This gets that EndRenderPass state out
of tile_load_cs/store_cs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt 6c37b4ded1 turnip: Move binning decisions from FB usage time to FB creation time.
This is mostly about helping me understand which choices are constant for the object as opposed to runtime decisions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt ceeaac340a turnip: Refactor a bit of tu6_emit_tile_select().
Reduce redundant code, make the used SET_VISIBILITY_OVERRIDE value clearer.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Emma Anholt 2cad0dd03b turnip: Don't bother creating tile_load/store_cs for sysmem rendering.
They won't get called, so don't bother.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16826>
2022-06-07 00:00:28 +00:00
Timothy Arceri 57dee95b85 freedreno: switch to NIR loop unrolling
Force unroll setting based on GLSL IR settings:

   case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
   case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
   case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
   case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
      /* a2xx compiler doesn't handle indirect: */
      return is_ir3(screen) ? 1 : 0;

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16366>
2022-06-04 16:11:49 +00:00
Timothy Arceri 34e868d882 freedreno/ir3: tidy up duplication of common nir options
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16366>
2022-06-04 16:11:49 +00:00
Erik Faye-Lund 200091aad0 freedreno: do not use variable in STATIC_ASSERT
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16670>
2022-06-03 07:14:43 +00:00
Erik Faye-Lund 08f8ccfc60 turnip: do not do STATIC_ASSERT on a variable
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16670>
2022-06-03 07:14:43 +00:00
Hyunjun Ko 8eb5178a6d turnip: clamp to 1 for negative bottom-right of viewport.
This fixes a crash of spec@!opengl 3.0@viewport-clamp in
piglit(with zink).
Also fixes a crash of negativeviewportheight in Sascha's examples.

Closes: #6583

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16831>
2022-06-03 02:40:08 +00:00
Connor Abbott bd68559d36 tu: Enable shaderTessellationAndGeometryPointSize
This already works and AFAICT there was no reason to disable it other
than that the blob does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16830>
2022-06-02 16:32:57 +00:00
Danylo Piliaiev eba8671e40 tu: Fix D32S8 resolves into D32 or S8 in sysmem mode
Fixes CTS tests in sysmem mode:
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.compatibility_depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.compatibility_depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_stencil

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16834>
2022-06-02 16:01:46 +00:00
Erik Faye-Lund 9bcd538643 freedreno: remove stale makefile
We don't use this makefile, so there's no point in keeping it in the
repo. It's also a generated one, so it contains a lot of... mess.

Fixes: 536f43cb96 ("freedreno: slurp in afuc")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16790>
2022-06-02 09:13:23 +00:00
Emma Anholt 49dc60efa1 freedreno/ir3: Fold 16-bit conversions into image load/store src/dsts.
Shaves 5 instructions off of one manhattan31 shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616>
2022-06-01 22:19:44 +00:00
Emma Anholt f005a2d786 freedreno/ir3: Fix validation of half-precision image store values.
ce1a381e57 ("turnip: enable VK_KHR_16bit_storage on A650") determined
that the type of the instr decided the type of the value being stored in
the ".b" case.  But it would be surprising if image stores had the type
determine the coordinates' precision instead of the value's, and once we
turned on image instruction precision lowering we ran into asserts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616>
2022-06-01 22:19:44 +00:00
Matt Turner 003327dd95 freedreno/ir3: Pass 16-bit sampler coordinates when possible.
shader-db highlights from Rob's android shaders:

total instructions in shared programs: 769641 -> 767536 (-0.27%)
instructions in affected programs: 151139 -> 149034 (-1.39%)
total last-baryf in shared programs: 55908 -> 55607 (-0.54%)
last-baryf in affected programs: 35219 -> 34918 (-0.85%)
total sstall in shared programs: 67074 -> 65767 (-1.95%)
total full in shared programs: 36115 -> 36080 (-0.10%)
full in affected programs: 203 -> 168 (-17.24%)
sstall in affected programs: 9510 -> 8203 (-13.74%)
total (ss) in shared programs: 14380 -> 14239 (-0.98%)
(ss) in affected programs: 2965 -> 2824 (-4.76%)
total systall in shared programs: 92425 -> 91522 (-0.98%)
systall in affected programs: 13146 -> 12243 (-6.87%)
total (sy) in shared programs: 4330 -> 4314 (-0.37%)
(sy) in affected programs: 167 -> 151 (-9.58%)
total waves in shared programs: 71580 -> 71584 (<.01%)
waves in affected programs: 12 -> 16 (33.33%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616>
2022-06-01 22:19:44 +00:00
Emma Anholt ac24c49c37 freedreno/ir3: Make the types of tex coord padding match.
Required for lowering of coords to be 16-bit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616>
2022-06-01 22:19:44 +00:00
Matt Turner edb0904775 freedreno/ir3: Move the texture array coord fixup to nir
We're going to optimize sampler coordinates to FP16, so we'll need to
add the appropriately typed 0.5. Move this to NIR where that information
is readily available.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616>
2022-06-01 22:19:44 +00:00
Emma Anholt bf49d4a084 freedreno/ir3: Enable load/store vectorization for SSBO access, too.
Saves a few ldib/stib instructions in gfxbench vk-5-normal compute shaders
by grouping vec4 accesses together.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616>
2022-06-01 22:19:44 +00:00
Emma Anholt 5f64bc7a3e ci/turnip: Add missing xfails for a618 full VK run
Fixes: 836ce97f5e ("ci: bump VK-GL-CTS to 1.3.2.0")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616>
2022-06-01 22:19:44 +00:00
Danylo Piliaiev 79e266fffc ir3: Force late-z if FS has global store/atomic
No known tests are fixed.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16816>
2022-06-01 16:30:36 +00:00
Connor Abbott 68b10b39f7 tu: Implement VK_EXT_image_2d_view_of_3d
This is already allowed by the gallium driver, which uses the same code
for image layout and image views, so everything Just Works and the tests
pass. radv doesn't enable the sampler feature, but I don't see any
reason it wouldn't work and the tests pass.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16806>
2022-06-01 15:04:31 +00:00
Connor Abbott 2e9c53549b tu: Expose VK_KHR_synchronization2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16374>
2022-06-01 04:06:46 +00:00
Connor Abbott 59259a0167 tu: Convert to sync2 entrypoints
Use the common Vulkan fallbacks to implement the now-deprecated original
entrypoints.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16374>
2022-06-01 04:06:46 +00:00
Timothy Arceri abe4536c51 ci: uprev piglit 2022-05-31
Also document additional piglit failures and passes.

Multiple changes, mostly notable:
  - few new tests
  - fixed test for upcoming mesa MR

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16785>
2022-06-01 03:14:29 +00:00
Jason Ekstrand c8e191e369 turnip: Use nir_gather_xfb_info
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16750>
2022-05-31 23:09:30 +00:00
Jason Ekstrand 3e04432b3a nir: Rename nir_gather_xfb_info to nir_shader_get_xfb_info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16750>
2022-05-31 23:09:30 +00:00
Juan A. Suarez Romero 836ce97f5e ci: bump VK-GL-CTS to 1.3.2.0
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16689>
2022-05-31 15:02:08 +00:00
Erico Nunes 3d7b2f0186 ci: update linux kernel to v5.17
In addition to pushing it to the current latest stable, the v5.17 kernel
for mesa CI pulls a patch to address a regression in drm that affects at
least the lima jobs.

The dtb for sc7180-trogdor-lazor-limozeen-nots is also updated since the
old one no longer exists in v5.17.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16641>
2022-05-31 06:31:15 +00:00
Hyunjun Ko 16ea41c901 ir3: handle intrinsic_load_draw_id when scanning driver constants
Fixes: #6567

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16769>
2022-05-31 01:33:55 +00:00
David Heidelberg 2cf7f08b04 ci: traces: temporarily disable nheko trace
Disable nheko trace until apitrace gets fixed.
apitrace currently fails with this trace, when more than 1 run is
requested.

Upstream issue: https://github.com/apitrace/apitrace/issues/800

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16774>
2022-05-31 00:00:25 +00:00
David Heidelberg b8381aaa37 ci/freedreno: enable ROR and Nheko traces
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
2022-05-27 06:51:38 +00:00
Danylo Piliaiev 713f504033 ir3: handle gl_Layer and gl_ViewportIndex when there is TES + GS
Fixes CTS tests:
 KHR-GL46.shader_viewport_layer_array.ShaderViewportIndexTestCase
 KHR-GL46.shader_viewport_layer_array.ShaderLayerFramebufferLayeredTestCase
 KHR-GL46.shader_viewport_layer_array.ShaderLayerFramebufferNonLayeredTestCase

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6497

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16696>
2022-05-26 08:47:02 +00:00
Mike Blumenkrantz aa32b96c51 turnip: fix assert for max xfb outputs
this is a counter, not an index, so use <=

cc: mesa-stable

Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16620>
2022-05-21 16:48:54 +00:00
Chia-I Wu 2a8e6a4d1a turnip: disable UBWC for SNORM formats
In copy_format, we treat snorm as unorm to avoid clamping.  But snorm
and unorm are UBWC incompatible for special values such as all 0's or
all 1's.  Disable UBWC for snorm.

For reference, I dumped the first byte of an UBWC blocks and it was

  color      UNORM  SNORM
  all black  0x01   0x31
  all white  0x0d   0x11

@flto clarified that bit 4 is unset for fast clear encoded blocks.  It
looks like fast clear is not used for SNORM.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6480
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16534>
2022-05-21 15:27:42 +00:00
Chia-I Wu e8eb6d13a5 turnip: fix tu6_pack_border_color for z24
The value should be at the bottom 24 bits, not at the top.

dEQP-VK.pipeline.sampler.* still passes.  This fixes most of
dEQP-GLES31.functional.texture_border_clamp.formats.*depth* on angle.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16570>
2022-05-21 00:54:28 +00:00
Hyunjun Ko f2635ca47b turnip: add an assertion for max descriptor set count.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16624>
2022-05-20 09:49:00 +00:00
Jason Ekstrand c24aa449d0 vulkan,anv,turnip: Add a common CmdBindVertexBuffers wrapper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16611>
2022-05-20 02:12:37 +00:00
Emma Anholt 7938ce4af3 freedreno/ir3: Lower texture instructions used only for f2f16 to 16-bit.
2.5% improvement in gfxbench vk-5-normal.  No obvious change on
gl-5-normal.

shader-db on Rob's android shaders:

total instructions in shared programs: 770644 -> 770595 (<.01%)
instructions in affected programs: 14880 -> 14831 (-0.33%)
total nops in shared programs: 167784 -> 167860 (0.05%)
nops in affected programs: 3351 -> 3427 (2.27%)
total non-nops in shared programs: 602860 -> 602735 (-0.02%)
non-nops in affected programs: 10523 -> 10398 (-1.19%)
total mov in shared programs: 19313 -> 19286 (-0.14%)
mov in affected programs: 365 -> 338 (-7.40%)
total cov in shared programs: 18075 -> 17978 (-0.54%)
cov in affected programs: 566 -> 469 (-17.14%)
total dwords in shared programs: 1612848 -> 1612596 (-0.02%)
dwords in affected programs: 13882 -> 13630 (-1.82%)
total last-baryf in shared programs: 56144 -> 55975 (-0.30%)
last-baryf in affected programs: 482 -> 313 (-35.06%)
total full in shared programs: 36094 -> 36092 (<.01%)
full in affected programs: 10 -> 8 (-20.00%)
total sstall in shared programs: 66986 -> 66923 (-0.09%)
sstall in affected programs: 1392 -> 1329 (-4.53%)
total systall in shared programs: 91244 -> 91072 (-0.19%)
systall in affected programs: 1194 -> 1022 (-14.41%)
total (sy) in shared programs: 4316 -> 4321 (0.12%)
(sy) in affected programs: 19 -> 24 (26.32%)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
2022-05-19 19:43:36 +00:00
Emma Anholt 1cf0736f1c freedreno/ir3: Add support for 16-bit nir_texop_lod.
Same basic path, just do the rescaling in half float.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
2022-05-19 19:43:36 +00:00
Emma Anholt a28d2e87d3 turnip: Make RelaxedPrecision-decorated ALU ops 16-bit.
Improves gfxbench vk-5-normal performance 5.5%.

Fixes: #6346
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
2022-05-19 19:43:36 +00:00
Emma Anholt 633cf4eca1 freedreno/ir3: Fix 16-bit bit_count.
No need to do the 16-bit lowering if it already is.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
2022-05-19 19:43:36 +00:00
Connor Abbott 9f67fa368e tu: Implement VK_EXT_pipeline_creation_cache_control
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16562>
2022-05-18 13:14:55 +00:00
Connor Abbott 49827da6fa tu: Implement VK_EXT_pipeline_creation_feedback
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16562>
2022-05-18 13:14:55 +00:00
Connor Abbott e348f2fb38 tu: Zero-initialize compute driver key
Fixes: 05329d7 ("tu: Implement pipeline caching with shared Vulkan cache")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16562>
2022-05-18 13:14:55 +00:00
Danylo Piliaiev 5d377f435b freedreno/a6xx: Add EARLYPREAMBLE flag to all a6xx_sp_xs_ctrl_reg0
Each shader stage has its own "early preamble" flag.

Early preamble is likely an optimization to hide some of latency
when loading UBOs into consts in the preamble.

Early preamble has the following limitations:
- Only shared, a1, and consts regs could be used
  (accessing other regs would result in GPU fault);
- No cat5/cat6, only stc/ldc variants are working;
- Values writen to shared regs are not accessible by the rest
  of the shader;
- Instructions before shps are also considered to be a part of
  early preamble.

Note, for all shaders from d3d11 games blob produced preambles
compatible with early preamble mode.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15901>
2022-05-18 11:17:47 +00:00
Chia-I Wu 2410993ef6 turnip: fix off-by-one in border color bitset
BITSET_FFS reserves 0 for no bit set.  BITSET_CLEAR just below cleared
the wrong bit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16567>
2022-05-17 23:29:15 +00:00
Timothy Arceri d7a071a28f gallium/drivers: set force_indirect_unrolling_sampler for all required drivers
This is set to true for all drivers that have a GLSL level
of support lower than 4.00. This matches the rule for setting the
GLSL IR option EmitNoIndirectSampler.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16543>
2022-05-17 02:12:21 +00:00
Chia-I Wu cb50fe7110 ir3: fix mem_ctx for ir3_disasm_info::nir
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6494
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16535>
2022-05-16 22:09:13 +00:00
Chia-I Wu d3d34ad476 turnip: emit VPC_SO_DISABLE in xfb begin/end
SO was always enabled before this change.  That meant, after a call to
tu_CmdBindTransformFeedbackBuffersEXT to emit VPC_SO_BUFFER_SIZE, any
draw call (from the same render pass, in a different render pass, or in
a different cmdbuf) could potentially cause writes to the SO buffers
regardless of whether the draw is inside xfb begin/end or not.

I choose to emit VPC_SO_DISABLE instead of using stateobjs like
freedreno does only because it is simpler.  It is not clear to me which
is more efficient to HW.

This also fixes double SO writes for gmem rendering.  While
tu6_tile_render_begin was careful to disable SO for the draw pass,
tu6_emit_tile_select re-enabled it.

dEQP-VK.transform_feedback.* still passes.  It fixes
dEQP-GLES3.functional.transform_feedback.* on angle.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16502>
2022-05-16 20:46:59 +00:00
Chia-I Wu 0b7751babf turnip: fix sampledImageIntegerSampleCounts
It seems fine to advertise msaa in sampledImageIntegerSampleCounts.

dEQP-VK.rasterization.rasterization_order_attachment_access.format_integer.*
goes from NotSupported to Pass for more test cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16487>
2022-05-16 19:26:46 +00:00
David Heidelberg 875643feeb ci: uprev piglit 2022-05-10
Also document additional piglit failures and crashes with new tests.

Multiple changes, mostly notable:
 - few new tests
 - traces downloader improvements

Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16428>
2022-05-16 06:33:36 +00:00
Chia-I Wu e9e8c649cd freedreno/fdperf: support dumping counters
This is useful for comparing two workloads.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16488>
2022-05-14 22:18:52 +00:00
Chia-I Wu 267786be60 freedreno/fdperf: make refresh rate configurable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16488>
2022-05-14 22:18:52 +00:00
Chia-I Wu cd42f63c43 turnip: let modifier takes precedence over TU_DEBUG=noubwc
TU_DEBUG=noubwc is not very usable on sway/xwayland where the wsi uses
modifiers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16507>
2022-05-14 21:56:38 +00:00
Connor Abbott 05329d7f9a tu: Implement pipeline caching with shared Vulkan cache
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16147>
2022-05-13 17:07:05 +00:00
Connor Abbott 43981f0f58 tu: Include turnip debug flags in pipeline cache UUID
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16147>
2022-05-13 17:07:05 +00:00
Connor Abbott d023ae4686 tu: Rewrite cache UUID based on radv
Switch to using sha1 so that we can add as many other flags as we need
to easily.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16147>
2022-05-13 17:07:05 +00:00
Connor Abbott 410d59943d tu: Hash pipeline layout contents
Mostly adapted from anv.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16147>
2022-05-13 17:07:05 +00:00