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freedreno/ir3: Fix validation of half-precision image store values. 

ce1a381e57 ("turnip: enable VK_KHR_16bit_storage on A650") determined
that the type of the instr decided the type of the value being stored in
the ".b" case.  But it would be surprising if image stores had the type
determine the coordinates' precision instead of the value's, and once we
turned on image instruction precision lowering we ran into asserts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616>
This commit is contained in:
Emma Anholt 2022-05-31 12:49:27 -07:00 committed by Marge Bot
parent 003327dd95
commit f005a2d786
1 changed files with 3 additions and 9 deletions
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12
src/freedreno/ir3/ir3_validate.c
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@ -331,15 +331,9 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
validate_assert(ctx, !(instr->srcs[2]->flags & IR3_REG_HALF));
break;
case OPC_STIB:
if (instr->flags & IR3_INSTR_B) {
validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF));
validate_reg_size(ctx, instr->srcs[2], instr->cat6.type);
} else {
validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
validate_reg_size(ctx, instr->srcs[1], instr->cat6.type);
validate_assert(ctx, !(instr->srcs[2]->flags & IR3_REG_HALF));
}
validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF));
validate_reg_size(ctx, instr->srcs[2], instr->cat6.type);
break;
case OPC_GETFIBERID:
case OPC_GETSPID: