The callback allows to request different vectorization factors
per instruction depending on e.g. bitsize or opcode.
This patch also removes using the vectorize_vec2_16bit option
from nir_opt_vectorize().
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13080>
NIR already has the necessary lowering, and the GLSL lowering violates
GLSL IR validation rules. Once quadop lowering was turned off, the IR
validation at the end of the compile path on DEBUG builds caught the
problem.
In order to move the lowering to NIR, though, we need to make sure that
drivers supporting these functions actually have the lowering flag set.
xfails added for t860, where apparently this tickles a variety of existing
64-bit bugs in the backend.
Fixes: #6461
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16437>
Since PIPE_CAP_TGSI_TEXCOORD is now set in SVGA vgpu10 driver,
we need to add a new parameter need_texcoord_semantic to
tgsi_add_point_sprite and tgsi_add_aa_point
to allow setting texcoords using tgsi texcoord semantic.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16598>
This was wrong and enabled codecs where they shouldn't have been.
Fixes: 7ab05e3c3f ("gallium/vl: respect the video codecs configure in meson")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16542>
This fixes a crash with luxmark where it uses a 12-byte scratch space,
but when llvmpipe allocates it for 8 lanes, it isn't properly aligned
for 64-bit.
Karol found this debugging rusticl.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16288>
This is set to true for all drivers that have a GLSL level
of support lower than 4.00. This matches the rule for setting the
GLSL IR option EmitNoIndirectSampler.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16543>
Prior to scanning instrucitons, we initialize it based on variables. If
this is adding anything, we have a bug somewhere.
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16435>
Coming in from Vulkan or OpenCL, it's possible for nr_samplers to be
zero if all we ever use is texelFetch(). Annoyingly, samplers and
sampler views are handled by the same function. Fortunately, it will
work if some of the samplers or sampler views are missing so we can just
pass the maximum.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16435>
First, make all key_size functions take nr_samplers and nr_sampler_views
separately so we ensure both get passed in. Second, rework the offset
helpers to take MAX(nr_samplers, nr_sampler_views) so we get the image
param offset correct if nr_samplers < nr_sampler_views. While we're
here, also re-order the size calculations to be in the same order as the
things land in memory.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16435>
this wasn't taking into account the format swizzle, returning broken
alpha values in most cases
Fixes: 0b6554ba6f ("gallivm,llvmpipe: handle TXF (texelFetch) instruction, including offsets")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16137>
the first case in gallivm did no checking, so this was always going to be
broken, so instead just copy the now-correct ssbo logic
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16137>
this was checking (offset < size) when really it needs to be
(offset < size && extent < size && offset >= 0)
Fixes: 591899eedd ("gallivm/nir: Add a short circuit uniform-offset mode for load_ssbo/load_shared.")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16137>
Sampler views and samplers may not be the same limit; in fact one is 32
while the other is 128. The sampler_buffers field is tracking sampler
views (yes, naming is confusing) so we should use the right limit.
Fixes: e9c41b3214 ("gallium/u_threaded: add buffer lists - tracking of buffers referenced by tc")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>
The following sequence:
glEnable(GL_DEBUG_OUTPUT_KHR);
glEnable(GL_DEBUG_OUTPUT_SYNCHRONOUS_KHR);
glDebugMessageCallbackKHR(my_callback, NULL);
Will cause the 2nd call to be ignored - but since the callback
function used by _mesa_update_debug_callback is always the
same (_debug_message), this means we'll keep using it, causing
"my_callback" to be called from driver-internal threads.
So instead of skipping the 2nd call, make sure we pass the
information to the driver.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5206
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16300>
Now that all consumers of GLSL use NIR, make the remaining drivers take
the path that relies on NIR to really do optimization.
nouveau steam shader-db runtime -6.69631% +/- 1.29235% (n=12).
No change on shader-db there.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16364>
LLVM 15 ripped out the legacy coroutine passes. This means moving
to the new pass manager is the best option to move forward and is
long overdue.
I've tried to recreate the same set of passes in the new pass mgr
as the old, but I expect some tweaking may be needed to confirm this.
Acked-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16289>
in a sequence where a driver saves 0 sampler/views before calling
u_blitter, the previous state of having 0 sampler/views bound would
not be restored as expected, resulting in stale sampler/views which
could affect behavior before new sampler/views were bound
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16178>
The only interesting ones here were LOWER_IF_THRESHOLD (which previously
had connected to some lowering in GLSL that was broken in the face of side
effects), and FMA (which turned GLSL IR's fma() into TGSI_OPCODE_FMA
instead of MAD).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8044>
Also extract lp_build_const_func_pointer_from_type() in lp_bld_const.h
taking explicit function type.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15893>
LLVM is transitioning to "opaque pointers", and as such deprecates
LLVMBuildGEP, LLVMBuildCall, LLVMBuildLoad, replacing them with
LLVMBuildGEP2, LLVMBuildCall2, LLVMBuildLoad2 respectivelly.
These new functions were added in LLVM 8.0; so for LLVM before 8.0 we
simply forward to the non-opaque-pointer variants.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15893>
I'm working on switching mesa/st to no longer produce TGSI on its own, and
so we need a way to test SVGA against that future.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14160>
This checks if index is a ConstantAggregateZero, ConstantDataSequential,
or UndefValue and emits a single shufflevector instead of a loop if so.
Signed-off-by: Autumn on Tape <autumn@cyfox.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13671>
This way we can make allow_draw_out_of_order true by default for all
apps, iff the driver allows it.
And allow_draw_out_of_order=false can still be used in drirc, for
apps that need this optim to be turned off.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16139>
This just is an initial wrapping of all calls into the driver
to check for codec support.
The idea is to add more to this function to support the meson
level disables.
Acked-by: Christian König <christian.koenig@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15258>
This controls the whole lowering of "make tex ops with implicit
derivatives on non-implicit-derivative stages be tex ops with an explicit
lod of 0 instead", but it's really hard to describe that in a git commit
summary.
All existing callers get it added except:
- nir_to_tgsi which didn't want it.
- nouveau, which didn't want it (fixes regressions in shadowcube and
shadow2darray with NIR, since the shading languages don't expose txl of
those sampler types and thus it's not supported in HW)
- optional lowering passes in mesa/st (lower_rect, YUV lowering, etc)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16156>
Check the shader IR type first before freeing the NIR IR in
draw_delete_xxx_shader() in case the IR has been converted to TGSI
and the NIR IR has already been freed.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16199>
Because for fragment shaders we still use the variables, and
lower_io_to_vector may leave dead variables that duplicate inputs
that are now vectorized, we have to call this pass, because otherwise
we will may hit the assertion
src/gallium/auxiliary/tgsi/tgsi_ureg.c:318:
ureg_DECL_fs_input_centroid_layout:
Assertion `(ureg->input[i].usage_mask & usage_mask) == 0'
This is relevant for
spec@arb_enhanced_layouts@execution@component-layout@*
on r600/ntt
Fixes: a4840e15ab
r600: Use nir-to-tgsi instead of TGSI when the NIR debug opt is disabled
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16130>
Piglit tests fbo-generatemipmap-3d RGB9_E5 and
fbo-generatemipmap-cubemap array RGB9_E5 hit assert when debug_flush
is active. Increase the debug map depth to 64.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16061>
With nir-to-tgsi, virgl saw a case where a previous declaration of array
.x and scalar .y (turning into an array with .xy) ended up being a
declaration of scalar .x and array .y (turning into a scalar with .xy).
Make sure we extend the declared array length as well.
One might think that the fix would be to union the .first/.last between
the two declarations being merged, but note that ureg_DECL_output() passes
in the current nr_output_regs as the index, so the .last would end up
getting extended for those callers (such as nir_to_tgsi fs outputs) every
time you merged.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13295>
We can't declare input arrays because mesa/st lowers NIR VS output
declarations to elements no matter what, and virgl has depended on
matching array sizes of declarations between producers and consumers. So,
we have to lower it away (which is fine because hardware drivers will
generally be lowering anyway).
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13295>
src/gallium/auxiliary/tgsi/tgsi_scan.c:287: scan_src_operand: Assertion `info->sampler_targets[index] == target' failed.
assert was being triggered by
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_multisampled_to_singlesampled_blit
using the stencil fallback with zink.
Fixes: f05dfddeb1 ("u_blitter: fix stencil blit fallback for crocus.")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16069>
When setting the dst framebuffer width height, it might be silly
to constrain this beyond the dst resource, but at least constrain
it correctly to take account of x/y offsets.
This fixes some uses of this as a fallback for zink with
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_stencil_blit
Fixes: b4c07a8a87 ("gallium/util: allow scaling blits for stencil-fallback")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16069>
GL spec states that the stride for indirect multidraws:
* cannot be negative
* can be zero
* must be a multiple of 4
some drivers can't support strides which are not a multiple of the
size of the indirect struct being used, however, so rewrite those to
direct draws
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15963>
this was incorrectly calculating too small of a map region if
the stride was less than the size of the struct
Fixes: 3eb9932317 ("aux/draw: add a util function for reading back indirect draw params")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15963>
I had some workarounds in ALU op emits trying to fix up when we were asked
to store to unsupported channels when the ALU op had 64bit srcs (so only
vec2 supported) but a 32-bit dest with a >vec2 writemask.
Those workarounds had some bugs breaking 64-bit uniform initializer tests
on virgl, and also set up too wide of a writemask such that they triggered
assertion failures on nvc0. We can avoid the need for those workarounds
at emit time by just having nir_lower_vec_to_movs not generate unsupported
writemasks in the first place.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15934>
util_cpu_detect is an anti-pattern: it relies on callers high up in the call
chain initializing a local implementation detail. As a real example, I added:
...a Mali compiler unit test
...that called bi_imm_f16() to construct an FP16 immediate
...that calls _mesa_float_to_half internally
...that calls util_get_cpu_caps internally, but only on x86_64!
...that relies on util_cpu_detect having been called before.
As a consequence, this unit test:
...crashes on x86_64 with USE_X86_64_ASM set
...passes on every other architecture
...works on my local arm64 workstation and on my test board
...failed CI which runs on x86_64
...needed to have a random util_cpu_detect() call sprinkled in.
This is a bad design decision. It pollutes the tree with magic, it causes
mysterious CI failures especially for non-x86_64 developers, and it is not
justified by a micro-optimization.
Instead, let's call util_cpu_detect directly from util_get_cpu_caps, avoiding
the footgun where it fails to be called. This cleans up Mesa's design,
simplifies the tree, and avoids a class of a (possibly platform-specific)
failures. To mitigate the added overhead, wrap it all in a (fast) atomic
load check and declare the whole thing as ATTRIBUTE_CONST so the
compiler will CSE calls to util_cpu_detect.
Co-authored-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15580>
Otherwise, we get an ishl that the HW can't support, and a ushr if the NIR
ends up being lowered to ubo_vec4, which may not get constant-folded if
the offset was non-constant.
This matches what mesa/st uses for this arg to uniform lowering.
Fixes: #5971
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14883>
On virglrenderer it is of interest to not re-use temporaries when we
want to handle precise, invariant, and highp/mediump with better
possibility for optimization.
v2: Force optimized RA if the number of registers is too large
(Emma: only 16 bit signed int are reserved for register indices)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16051>
r600 would end up looking for it past the end of its array of inputs
(which expected 1:1 ordering from declarations to driver locations).
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16043>
virglrenderer emits GLSL referencing all the swizzles, even if the write
mask doesn't contain them. This is a problem when the output is
TessLevelInner, which has only 2 elements.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16043>
Same splitting method as store_output. Fixes regressions in virgl
with nir-to-tgsi.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16043>
Found in virgl, where a glslparsertest accidentally gets its inputs
lowered to undefs, and 64-bit undefs don't get split by the normal
alu/intrinsic splitter (and would be hard to split because other passes
would see reconstruction of the vec4 from undefs and turn it back into
vec3/vec4 undef).
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16043>
I've tried to keep virglrenderer workarounds out of ntt, but this one
would be bothersome to do with tgsi_translate and TG4 is pretty low-stakes
for NTT consumers.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16043>
it's used by 3 different drivers, so it shouldn't be in radeonsi
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15907>
If we made a copy deref, then we need to do dead-write elimination for the
pervious writes or we'll just emit the same copy deref again next time
around. And, at the end of the opt loop, we need to lower copy derefs
because later passes (locals_to_regs, notably) depend on it.
Fixes infinite opt loop on fs-function-inout-array with virgl on NTT.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15899>
now that it's easier to determine whether zink is being used (mostly),
this whole thing can be simplified
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15857>
Previously, the caller allocated storage and tgsi_transform_shader() would
emit into that, returning how many tokens it emitted. All the callers had
to guess at how much storage was necessary, trying not to over-allocate
but also getting enough that you wouldn't (effectively) silently run out
of space.
Instead, make tgsi_transform_shader() do the allocation for you, taking
just a hint of how much space you think you need, and internally double
size when necessary. Fixes failures on virgl with fp64 since we've added
more fp64 virglrenderer workarounds and its old "XXX: is this enough?"
allocation wasn't any more.
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15782>
I missed these in the previous fix to mimic GLSL-to-TGSI address reg
behavior, which r600 relies on.
Fixes: 4bb9c0a28a ("nir_to_tgsi: Use the same address reg mappings as GLSL-to-TGSI did.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15824>
virglrenderer maps atomic accesses to atomic counter declarations using
the .Index field. We were previously emitting a .Index of 0 for array
accesses, so virglrenderer would emit
atomicIncrement(first_counter[counter_offset+array_index]). This would
mostly work because hardware doesn't care about the bounds of counter
declarations, but if the first counter was a non-array, then the [] GLSL
emit gets dropped (can't array access a scalar!) and you'd access the
non-array first_counter instead.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15824>
It's always in .w, rather than being the next component after the
x/y/array index.
Fixes: c6d3fd8c21 ("gallium/ntt: Emit sample index when necessary for image load/store.")
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15825>
dEQP-VK.binding_model.buffer_device_address.set3.depth3.basessbo.convertuvec2.nostore.multi.scalar.vert
runtime -24.4002% +/- 1.94375% (n=7). The win (I think) is in LLVM not
having to chew through handling the extra loops on every constant-offset
SSBO load, not in actual rendering time.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14999>
If we know the offset is constant, we don't have ask LLVM to loop over the
elements pulling the same value out over and over.
This doesn't seem to have produced a win in the testcase I was looking at,
but it was an easier entrypoint to figuring out how to do scalar memory
access than load_memory, and will probably affect some workload.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14999>
In a fragment shader or inside of control flow, invocation 0 might be
inactive, and so our use-first-invocation-and-broadcast optimizations
would be invalid, and the loop logic of an emit_read_invocation would
defeat the point of these optimized paths.
For load_kernel_input, I didn't guard the uniform path with the check
because some CL tests that are currently passing are doing the
load_kernel_input under (presumably) uniform control flow. Instead, I
dropped in a once warning for the next person to be debugging CL.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14999>
Make sure to take all the array sizes into account when generating the TGSI.
Makes the `piglit.spec@arb_arrays_of_arrays@execution@ubo@fs-const-explicit-binding`
test pass
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15713>
In some cases like when using `NIR_DEBUG=serialize`, impl->num_blocks is 0
which leads to assertions error in the blocklist. Make sure to require the
num_blocks to be populated.
Fixes: 74c02d99b2
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15640>
It might be possible to combine this with the other merge to avoid
the overheads of making a temp copy.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15516>
The checks were reproduced making adding another one not so fun.
rework the deinterleave path code to match the interleave path code.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15516>
Freedreno will check if the virtgpu supports the pass-thru context, and
if not will bail, falling back to virgl.
TODO this requires that virgl is also enabled in the mesa build, even if
it is not needed.. maybe there is a better way to handle this?
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
error log:
```
[2/43] Compiling C object src/gallium/drivers/llvmpipe/libllvmpipe.a.p/lp_setup_tri.c.obj
FAILED: src/gallium/drivers/llvmpipe/libllvmpipe.a.p/lp_setup_tri.c.obj
"cc" "-Isrc/gallium/drivers/llvmpipe/libllvmpipe.a.p" "-Isrc/gallium/drivers/llvmpipe" "-I../../src/gallium/drivers/llvmpipe" "-I../../src/gallium/include" "-Isrc/gallium/auxiliary" "-I../../src/gallium/auxiliary" "-Iinclude" "-I../../include" "-Isrc" "-I../../src" "-Isrc/compiler/nir" "-I../../src/compiler/nir" "-Isrc/util" "-I../../src/util" "-IC:/CI-Tools/msys64/clang64/include" "-fvisibility=hidden" "-fcolor-diagnostics" "-Wall" "-Winvalid-pch" "-std=c11" "-O0" "-g" "-DPACKAGE_VERSION=\"22.0.0-devel\"" "-DPACKAGE_BUGREPORT=\"https://gitlab.freedesktop.org/mesa/mesa/-/issues\"" "-DHAVE_WINDOWS_PLATFORM" "-DHAVE_SURFACELESS_PLATFORM" "-DUSE_ELF_TLS" "-DUSE_TLS_BEHIND_FUNCTIONS" "-DENABLE_ST_OMX_BELLAGIO=0" "-DENABLE_ST_OMX_TIZONIA=0" "-DEGL_NO_X11" "-DDEBUG" "-DHAVE___BUILTIN_BSWAP32" "-DHAVE___BUILTIN_BSWAP64" "-DHAVE___BUILTIN_CLZ" "-DHAVE___BUILTIN_CLZLL" "-DHAVE___BUILTIN_CTZ" "-DHAVE___BUILTIN_EXPECT" "-DHAVE___BUILTIN_FFS" "-DHAVE___BUILTIN_FFSLL" "-DHAVE___BUILTIN_POPCOUNT" "-DHAVE___BUILTIN_POPCOUNTLL" "-DHAVE___BUILTIN_UNREACHABLE" "-DHAVE___BUILTIN_TYPES_COMPATIBLE_P" "-DHAVE_FUNC_ATTRIBUTE_CONST" "-DHAVE_FUNC_ATTRIBUTE_FLATTEN" "-DHAVE_FUNC_ATTRIBUTE_MALLOC" "-DHAVE_FUNC_ATTRIBUTE_PURE" "-DHAVE_FUNC_ATTRIBUTE_UNUSED" "-DHAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT" "-DHAVE_FUNC_ATTRIBUTE_WEAK" "-DHAVE_FUNC_ATTRIBUTE_FORMAT" "-DHAVE_FUNC_ATTRIBUTE_PACKED" "-DHAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL" "-DHAVE_FUNC_ATTRIBUTE_ALIAS" "-DHAVE_FUNC_ATTRIBUTE_NORETURN" "-DHAVE_FUNC_ATTRIBUTE_VISIBILITY" "-DHAVE_UINT128" "-D_WINDOWS" "-D_WIN32_WINNT=0x0A00" "-DWINVER=0x0A00" "-DPIPE_SUBSYSTEM_WINDOWS_USER" "-D_USE_MATH_DEFINES" "-DUSE_SSE41" "-DUSE_GCC_ATOMIC_BUILTINS" "-DHAS_SCHED_H" "-DHAVE_CET_H" "-DHAVE_STRTOF" "-DHAVE_STRTOK_R" "-DHAVE_QSORT_S" "-DHAVE_ZLIB" "-DHAVE_ZSTD" "-DHAVE_COMPRESSION" "-DLLVM_AVAILABLE" "-DMESA_LLVM_VERSION_STRING=\"13.0.0\"" "-DLLVM_IS_SHARED=1" "-DDRAW_LLVM_AVAILABLE" "-DMESA_EXECMEM" "-DVK_USE_PLATFORM_WIN32_KHR" "-Werror=implicit-function-declaration" "-Werror=missing-prototypes" "-Werror=return-type" "-Werror=empty-body" "-Werror=incompatible-pointer-types" "-Werror=int-conversion" "-Wimplicit-fallthrough" "-Wno-missing-field-initializers" "-fno-math-errno" "-fno-trapping-math" "-Qunused-arguments" "-fno-common" "-Wno-microsoft-enum-value" "-Werror=format" "-Wformat-security" "-Werror=thread-safety" "-ffunction-sections" "-fdata-sections" "-pthread" "-D_FILE_OFFSET_BITS=64" "-D__STDC_CONSTANT_MACROS" "-D__STDC_FORMAT_MACROS" "-D__STDC_LIMIT_MACROS" "-Werror=pointer-arith" "-Werror=gnu-empty-initializer" -MD -MQ src/gallium/drivers/llvmpipe/libllvmpipe.a.p/lp_setup_tri.c.obj -MF "src/gallium/drivers/llvmpipe/libllvmpipe.a.p/lp_setup_tri.c.obj.d" -o src/gallium/drivers/llvmpipe/libllvmpipe.a.p/lp_setup_tri.c.obj "-c" ../../src/gallium/drivers/llvmpipe/lp_setup_tri.c
In file included from ../../src/gallium/drivers/llvmpipe/lp_setup_tri.c:37:
In file included from ../../src/gallium/drivers/llvmpipe/lp_setup_context.h:38:
In file included from ../../src/gallium/drivers/llvmpipe/lp_setup.h:31:
In file included from ../../src/gallium/drivers/llvmpipe/lp_jit.h:40:
In file included from ../../src/gallium/auxiliary/gallivm/lp_bld_limits.h:37:
In file included from ../../src/util/u_cpu_detect.h:41:
In file included from ../../src/util/u_thread.h:35:
In file included from ../../include/c11/threads.h:64:
In file included from ../../include/c11/threads_win32.h:58:
In file included from C:/CI-Tools/msys64/clang64/x86_64-w64-mingw32/include/windows.h:69:
In file included from C:/CI-Tools/msys64/clang64/x86_64-w64-mingw32/include/windef.h:9:
In file included from C:/CI-Tools/msys64/clang64/x86_64-w64-mingw32/include/minwindef.h:163:
In file included from C:/CI-Tools/msys64/clang64/x86_64-w64-mingw32/include/winnt.h:1555:
In file included from C:/CI-Tools/msys64/clang64/lib/clang/13.0.0/include/x86intrin.h:15:
In file included from C:/CI-Tools/msys64/clang64/lib/clang/13.0.0/include/immintrin.h:37:
C:/CI-Tools/msys64/clang64/lib/clang/13.0.0/include/tmmintrin.h:582:1: error: redefinition of '_mm_shuffle_epi8'
_mm_shuffle_epi8(__m128i __a, __m128i __b)
^
../../src/gallium/auxiliary/util/u_sse.h:159:1: note: previous definition is here
_mm_shuffle_epi8(__m128i a, __m128i mask)
^
1 error generated.
```
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14077>
As this function doesn't check for any control-flow
dependence, it only returns true for statically
(or globally) uniform values.
The same holds true for is_binding_dynamically_uniform()
in nir_opt_gcm().
Rename to better reflect that property.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14994>
the fastpath here can only be taken if there is exactly one stream active,
as this will otherwise break nonzero stream primitives generated queries
in truth, this num_vertex_streams thing should be a bitmask so that the case
of num_streams=1,stream_id!=0 could also be fastpathed, but the complexity
probably isn't worth it given the infrequency of use
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15506>
this can't be determined from pipe_shader_state::stream_output,
as this only contains xfb info, which is not the same as the vertex
stream info, and may break primitives generated queries
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15506>
When using cubemaps and the u/v values are 0, then this point
can be arrived at with rho = nan, and if rho is NaN, then lod
calculations end up at the max lod, whereas the spec suggests
they should end up at the most negative lod.
This fixes
dEQP-VK.glsl.texture_functions.query.texturequerylod.samplercube_float_zero_uv_width_fragment
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15335>
This cap is no longer TGSI specific, so let's rename it to reflect
reality.
Because the name got a bit vague when removing the TGSI-bits, let's add
some more details to the name.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
This isn't specific to TGSI, so let's update the name to reflect
reality.
Because the name of the opcode was TGSI specific, let's pick a new one,
based on the naming of the PIPE_CAP_TEXTURE_QUERY_LOD cap.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
This cap is no longer TGSI-specific, so let's update the name to reflect
reality.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
These aren't spiecic to TGSI any more, so let's rename them to reflect
reality.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
These aren't specific to TGSI, so let's rename them to reflect the
reality.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
Similar to the previous commits, these aren't TGSI specific, so let's
drop TGSI from their name.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>