util: Rename pipe_debug_message to util_debug_message
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15657>
This commit is contained in:
parent
240cd8088c
commit
523675e995
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@ -103,7 +103,7 @@ _u_async_debug_drain(struct util_async_debug_callback *adbg,
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for (unsigned i = 0; i < adbg->count; ++i) {
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const struct util_debug_message *msg = &adbg->messages[i];
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_pipe_debug_message(dst, msg->id, msg->type, "%s", msg->msg);
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_util_debug_message(dst, msg->id, msg->type, "%s", msg->msg);
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free(msg->msg);
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}
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@ -757,7 +757,7 @@ struct crocus_context {
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if (INTEL_DEBUG(DEBUG_PERF)) \
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dbg_printf(__VA_ARGS__); \
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if (unlikely(dbg)) \
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pipe_debug_message(dbg, PERF_INFO, __VA_ARGS__); \
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util_debug_message(dbg, PERF_INFO, __VA_ARGS__); \
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} while(0)
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@ -380,7 +380,7 @@ dump_shader_info(struct etna_shader_variant *v, struct pipe_debug_callback *debu
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if (!unlikely(etna_mesa_debug & ETNA_DBG_SHADERDB))
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return;
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pipe_debug_message(debug, SHADER_INFO,
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util_debug_message(debug, SHADER_INFO,
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"%s shader: %u instructions, %u temps, "
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"%u immediates, %u loops",
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etna_shader_stage(v),
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@ -122,7 +122,7 @@ extern bool fd_binning_enabled;
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mesa_logw(__VA_ARGS__); \
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struct pipe_debug_callback *__d = (debug); \
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if (__d) \
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pipe_debug_message(__d, type, __VA_ARGS__); \
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util_debug_message(__d, type, __VA_ARGS__); \
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} while (0)
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#define perf_debug_ctx(ctx, ...) \
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@ -61,7 +61,7 @@ struct ir3_shader_state {
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/**
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* Should initial variants be compiled synchronously?
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*
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* The only case where pipe_debug_message() is used in the initial-variants
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* The only case where util_debug_message() is used in the initial-variants
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* path is with FD_MESA_DEBUG=shaderdb. So if either debug is disabled (ie.
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* debug.debug_message==NULL), or shaderdb stats are not enabled, we can
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* compile the initial shader variant asynchronously.
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@ -80,7 +80,7 @@ dump_shader_info(struct ir3_shader_variant *v,
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if (!FD_DBG(SHADERDB))
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return;
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pipe_debug_message(
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util_debug_message(
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debug, SHADER_INFO,
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"%s shader: %u inst, %u nops, %u non-nops, %u mov, %u cov, "
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"%u dwords, %u last-baryf, %u half, %u full, %u constlen, "
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@ -1042,7 +1042,7 @@ i915_fini_compile(struct i915_context *i915, struct i915_fp_compile *p)
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memcpy(&ifs->program[decl_size], p->program,
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program_size * sizeof(uint32_t));
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pipe_debug_message(
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util_debug_message(
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&i915->debug, SHADER_INFO,
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"%s shader: %d inst, %d tex, %d tex_indirect, %d temps, %d const",
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_mesa_shader_stage_to_abbrev(MESA_SHADER_FRAGMENT), (int)program_size,
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@ -836,7 +836,7 @@ struct iris_context {
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if (INTEL_DEBUG(DEBUG_PERF)) \
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dbg_printf(__VA_ARGS__); \
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if (unlikely(dbg)) \
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pipe_debug_message(dbg, PERF_INFO, __VA_ARGS__); \
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util_debug_message(dbg, PERF_INFO, __VA_ARGS__); \
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} while(0)
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struct pipe_context *
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@ -328,7 +328,7 @@ iris_fence_await(struct pipe_context *ctx,
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* actually flushed and the seqno finally passes.
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*/
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if (fence->unflushed_ctx) {
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pipe_debug_message(&ice->dbg, CONFORMANCE, "%s",
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util_debug_message(&ice->dbg, CONFORMANCE, "%s",
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"glWaitSync on unflushed fence from another context "
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"is unlikely to work without kernel 5.8+\n");
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}
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@ -440,7 +440,7 @@ static void gpir_print_shader_db(struct nir_shader *nir, gpir_compiler *comp,
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if (lima_debug & LIMA_DEBUG_SHADERDB)
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fprintf(stderr, "SHADER-DB: %s\n", shaderdb);
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pipe_debug_message(debug, SHADER_INFO, "%s", shaderdb);
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util_debug_message(debug, SHADER_INFO, "%s", shaderdb);
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free(shaderdb);
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}
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@ -876,7 +876,7 @@ static void ppir_print_shader_db(struct nir_shader *nir, ppir_compiler *comp,
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if (lima_debug & LIMA_DEBUG_SHADERDB)
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fprintf(stderr, "SHADER-DB: %s\n", shaderdb);
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pipe_debug_message(debug, SHADER_INFO, "%s", shaderdb);
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util_debug_message(debug, SHADER_INFO, "%s", shaderdb);
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free(shaderdb);
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}
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@ -219,7 +219,7 @@ nouveau_fence_wait(struct nouveau_fence *fence, struct pipe_debug_callback *debu
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do {
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if (fence->state == NOUVEAU_FENCE_STATE_SIGNALLED) {
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if (debug && debug->debug_message)
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pipe_debug_message(debug, PERF_INFO,
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util_debug_message(debug, PERF_INFO,
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"stalled %.3f ms waiting for fence",
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(os_time_get_nano() - start) / 1000000.f);
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return true;
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@ -452,7 +452,7 @@ nv50_program_translate(struct nv50_program *prog, uint16_t chipset,
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prog->so = nv50_program_create_strmout_state(&info_out,
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&prog->pipe.stream_output);
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pipe_debug_message(debug, SHADER_INFO,
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util_debug_message(debug, SHADER_INFO,
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"type: %d, local: %d, shared: %d, gpr: %d, inst: %d, bytes: %d",
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prog->type, info_out.bin.tlsSpace, info_out.bin.smemSize,
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prog->max_gpr, info_out.bin.instructions,
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@ -1706,7 +1706,7 @@ nv50_blit(struct pipe_context *pipe, const struct pipe_blit_info *info)
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if (info->src.box.width == 0 || info->src.box.height == 0 ||
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info->dst.box.width == 0 || info->dst.box.height == 0) {
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pipe_debug_message(&nv50->base.debug, ERROR,
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util_debug_message(&nv50->base.debug, ERROR,
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"Blit with zero-size src or dst box");
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return;
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}
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@ -93,7 +93,7 @@ nv50_vertex_state_create(struct pipe_context *pipe,
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}
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so->element[i].state = nv50_vertex_format[fmt].vtx;
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so->need_conversion = true;
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pipe_debug_message(&nouveau_context(pipe)->debug, FALLBACK,
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util_debug_message(&nouveau_context(pipe)->debug, FALLBACK,
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"Converting vertex element %d, no hw format %s",
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i, util_format_name(ve->src_format));
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}
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@ -751,7 +751,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
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prog->tfb = nvc0_program_create_tfb_state(&info_out,
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&prog->pipe.stream_output);
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pipe_debug_message(debug, SHADER_INFO,
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util_debug_message(debug, SHADER_INFO,
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"type: %d, local: %d, shared: %d, gpr: %d, inst: %d, bytes: %d, cached: %zd",
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prog->type, info_out.bin.tlsSpace, info_out.bin.smemSize,
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prog->num_gprs, info_out.bin.instructions,
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@ -1611,7 +1611,7 @@ nvc0_blit(struct pipe_context *pipe, const struct pipe_blit_info *info)
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if (info->src.box.width == 0 || info->src.box.height == 0 ||
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info->dst.box.width == 0 || info->dst.box.height == 0) {
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pipe_debug_message(&nvc0->base.debug, ERROR,
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util_debug_message(&nvc0->base.debug, ERROR,
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"Blit with zero-size src or dst box");
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return;
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}
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@ -96,7 +96,7 @@ nvc0_vertex_state_create(struct pipe_context *pipe,
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}
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so->element[i].state = nvc0_vertex_format[fmt].vtx;
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so->need_conversion = true;
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pipe_debug_message(&nouveau_context(pipe)->debug, FALLBACK,
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util_debug_message(&nouveau_context(pipe)->debug, FALLBACK,
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"Converting vertex element %d, no hw format %s",
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i, util_format_name(ve->src_format));
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}
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@ -417,7 +417,7 @@ static void print_stats(struct radeon_compiler * c)
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* only the FS has, becasue shader-db's report.py wants all shaders to
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* have the same set.
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*/
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pipe_debug_message(c->debug, SHADER_INFO, "%s shader: %u inst, %u vinst, %u sinst, %u predicate, %u flowcontrol, %u loops, %u tex, %u presub, %u omod, %u temps, %u consts, %u lits",
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util_debug_message(c->debug, SHADER_INFO, "%s shader: %u inst, %u vinst, %u sinst, %u predicate, %u flowcontrol, %u loops, %u tex, %u presub, %u omod, %u temps, %u consts, %u lits",
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c->type == RC_VERTEX_PROGRAM ? "VS" : "FS",
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s.num_insts, s.num_rgb_insts, s.num_alpha_insts, s.num_pred_insts,
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s.num_fc_insts, s.num_loops, s.num_tex_insts, s.num_presub_ops,
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@ -382,7 +382,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
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goto error;
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}
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pipe_debug_message(&rctx->b.debug, SHADER_INFO, "%s shader: %d dw, %d gprs, %d loops, %d cf, %d stack",
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util_debug_message(&rctx->b.debug, SHADER_INFO, "%s shader: %d dw, %d gprs, %d loops, %d cf, %d stack",
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_mesa_shader_stage_to_abbrev(tgsi_processor_to_shader_stage(processor)),
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shader->shader.bc.ndw,
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shader->shader.bc.ngpr,
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@ -941,7 +941,7 @@ static void si_shader_dump_disassembly(struct si_screen *screen,
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* overhead, but on the plus side it simplifies
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* parsing of resulting logs.
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*/
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pipe_debug_message(debug, SHADER_INFO, "Shader Disassembly Begin");
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util_debug_message(debug, SHADER_INFO, "Shader Disassembly Begin");
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uint64_t line = 0;
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while (line < nbytes) {
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@ -951,13 +951,13 @@ static void si_shader_dump_disassembly(struct si_screen *screen,
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count = nl - (disasm + line);
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if (count) {
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pipe_debug_message(debug, SHADER_INFO, "%.*s", count, disasm + line);
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util_debug_message(debug, SHADER_INFO, "%.*s", count, disasm + line);
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}
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line += count + 1;
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}
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pipe_debug_message(debug, SHADER_INFO, "Shader Disassembly End");
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util_debug_message(debug, SHADER_INFO, "Shader Disassembly End");
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}
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if (file) {
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@ -1034,7 +1034,7 @@ void si_shader_dump_stats_for_shader_db(struct si_screen *screen, struct si_shad
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si_shader_dump_disassembly(screen, &shader->binary, shader->selector->info.stage,
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shader->wave_size, debug, "main", NULL);
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pipe_debug_message(debug, SHADER_INFO,
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util_debug_message(debug, SHADER_INFO,
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"Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
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"LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
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"Spilled VGPRs: %d PrivMem VGPRs: %d DivergentLoop: %d, InlineUniforms: %d, "
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@ -57,7 +57,7 @@ static void si_diagnostic_handler(LLVMDiagnosticInfoRef di, void *context)
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char *description = LLVMGetDiagInfoDescription(di);
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pipe_debug_message(diag->debug, SHADER_INFO, "LLVM diagnostic (%s): %s", severity_str,
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util_debug_message(diag->debug, SHADER_INFO, "LLVM diagnostic (%s): %s", severity_str,
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description);
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if (severity == LLVMDSError) {
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@ -105,7 +105,7 @@ bool si_compile_llvm(struct si_screen *sscreen, struct si_shader_binary *binary,
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diag.retval = 1;
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if (diag.retval != 0) {
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pipe_debug_message(debug, SHADER_INFO, "LLVM compilation failed");
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util_debug_message(debug, SHADER_INFO, "LLVM compilation failed");
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return false;
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}
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}
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@ -113,7 +113,7 @@ softpipe_shader_db(struct pipe_context *pipe, const struct tgsi_token *tokens)
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struct tgsi_shader_info info;
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tgsi_scan_shader(tokens, &info);
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pipe_debug_message(&softpipe->debug, SHADER_INFO, "%s shader: %d inst, %d loops, %d temps, %d const, %d imm",
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util_debug_message(&softpipe->debug, SHADER_INFO, "%s shader: %d inst, %d loops, %d temps, %d const, %d imm",
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_mesa_shader_stage_to_abbrev(tgsi_processor_to_shader_stage(info.processor)),
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info.num_instructions,
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info.opcode_count[TGSI_OPCODE_BGNLOOP],
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@ -291,7 +291,7 @@ svga_hwtnl_draw_arrays(struct svga_hwtnl *hwtnl,
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gen_nr,
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gen_size, gen_func, &gen_buf);
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if (ret == PIPE_OK) {
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pipe_debug_message(&svga->debug.callback, PERF_INFO,
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util_debug_message(&svga->debug.callback, PERF_INFO,
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"generating temporary index buffer for drawing %s",
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u_prim_name(prim));
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@ -278,11 +278,11 @@ emulate_logicop(struct svga_context *svga,
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blend->rt[buffer].blendeq_alpha = blend->rt[buffer].blendeq;
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if (logicop_func == PIPE_LOGICOP_XOR) {
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pipe_debug_message(&svga->debug.callback, CONFORMANCE,
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util_debug_message(&svga->debug.callback, CONFORMANCE,
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"XOR logicop mode has limited support");
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}
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else if (logicop_func != PIPE_LOGICOP_COPY) {
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pipe_debug_message(&svga->debug.callback, CONFORMANCE,
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util_debug_message(&svga->debug.callback, CONFORMANCE,
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"general logicops are not supported");
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}
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}
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@ -165,14 +165,14 @@ svga_create_depth_stencil_state(struct pipe_context *pipe,
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ds->stencil_writemask = templ->stencil[1].writemask & 0xff;
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if (templ->stencil[1].valuemask != templ->stencil[0].valuemask) {
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pipe_debug_message(&svga->debug.callback, CONFORMANCE,
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util_debug_message(&svga->debug.callback, CONFORMANCE,
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"two-sided stencil mask not supported "
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"(front=0x%x, back=0x%x)",
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templ->stencil[0].valuemask,
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templ->stencil[1].valuemask);
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}
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if (templ->stencil[1].writemask != templ->stencil[0].writemask) {
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pipe_debug_message(&svga->debug.callback, CONFORMANCE,
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util_debug_message(&svga->debug.callback, CONFORMANCE,
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"two-sided stencil writemask not supported "
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"(front=0x%x, back=0x%x)",
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templ->stencil[0].writemask,
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@ -318,7 +318,7 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
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if (!svga_update_state_retry(svga, SVGA_STATE_HW_DRAW)) {
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static const char *msg = "State update failed, skipping draw call";
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debug_printf("%s\n", msg);
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pipe_debug_message(&svga->debug.callback, INFO, "%s", msg);
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util_debug_message(&svga->debug.callback, INFO, "%s", msg);
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goto done;
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}
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svga_hwtnl_set_fillmode(svga->hwtnl, svga->curr.rast->hw_fillmode);
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@ -411,7 +411,7 @@ svga_create_rasterizer_state(struct pipe_context *pipe,
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}
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if (templ->poly_smooth) {
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pipe_debug_message(&svga->debug.callback, CONFORMANCE,
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util_debug_message(&svga->debug.callback, CONFORMANCE,
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"GL_POLYGON_SMOOTH not supported");
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}
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@ -136,7 +136,7 @@ update_need_pipeline(struct svga_context *svga, uint64_t dirty)
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if (svga->state.sw.need_pipeline) {
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assert(reason);
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pipe_debug_message(&svga->debug.callback, FALLBACK,
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util_debug_message(&svga->debug.callback, FALLBACK,
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"Using semi-fallback for %s", reason);
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}
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@ -478,7 +478,7 @@ struct svga_shader_emitter_v10
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bool register_overflow; /**< Set if we exceed a VGPU10 register limit */
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/* For pipe_debug_message */
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/* For util_debug_message */
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struct pipe_debug_callback svga_debug_callback;
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/* current loop depth in shader */
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@ -10609,7 +10609,7 @@ emit_barrier(struct svga_shader_emitter_v10 *emit,
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* in shader, don't do anything for this opcode and continue rest
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* of shader translation
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*/
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pipe_debug_message(&emit->svga_debug_callback, INFO,
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util_debug_message(&emit->svga_debug_callback, INFO,
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"barrier instruction is not supported in tessellation control shader\n");
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return TRUE;
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}
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@ -635,7 +635,7 @@ struct v3d_blend_state {
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if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
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fprintf(stderr, __VA_ARGS__); \
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if (unlikely(v3d->debug.debug_message)) \
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pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
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util_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
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} while (0)
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static inline struct v3d_context *
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@ -348,7 +348,7 @@ v3d_shader_debug_output(const char *message, void *data)
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{
|
||||
struct v3d_context *v3d = data;
|
||||
|
||||
pipe_debug_message(&v3d->debug, SHADER_INFO, "%s", message);
|
||||
util_debug_message(&v3d->debug, SHADER_INFO, "%s", message);
|
||||
}
|
||||
|
||||
static void *
|
||||
|
|
|
@ -429,7 +429,7 @@ struct vc4_depth_stencil_alpha_state {
|
|||
if (unlikely(vc4_debug & VC4_DEBUG_PERF)) \
|
||||
fprintf(stderr, __VA_ARGS__); \
|
||||
if (unlikely(vc4->debug.debug_message)) \
|
||||
pipe_debug_message(&vc4->debug, PERF_INFO, __VA_ARGS__); \
|
||||
util_debug_message(&vc4->debug, PERF_INFO, __VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
static inline struct vc4_context *
|
||||
|
|
|
@ -66,7 +66,7 @@ _debug_vprintf(const char *format, va_list ap)
|
|||
|
||||
|
||||
void
|
||||
_pipe_debug_message(struct pipe_debug_callback *cb,
|
||||
_util_debug_message(struct pipe_debug_callback *cb,
|
||||
unsigned *id,
|
||||
enum pipe_debug_type type,
|
||||
const char *fmt, ...)
|
||||
|
|
|
@ -266,10 +266,10 @@ void _debug_assert_fail(const char *expr,
|
|||
/**
|
||||
* Output a debug log message to the debug info callback.
|
||||
*/
|
||||
#define pipe_debug_message(cb, type, fmt, ...) do { \
|
||||
#define util_debug_message(cb, type, fmt, ...) do { \
|
||||
static unsigned id = 0; \
|
||||
if ((cb) && (cb)->debug_message) { \
|
||||
_pipe_debug_message(cb, &id, \
|
||||
_util_debug_message(cb, &id, \
|
||||
PIPE_DEBUG_TYPE_ ## type, \
|
||||
fmt, ##__VA_ARGS__); \
|
||||
} \
|
||||
|
@ -278,7 +278,7 @@ void _debug_assert_fail(const char *expr,
|
|||
struct pipe_debug_callback;
|
||||
|
||||
void
|
||||
_pipe_debug_message(
|
||||
_util_debug_message(
|
||||
struct pipe_debug_callback *cb,
|
||||
unsigned *id,
|
||||
enum pipe_debug_type type,
|
||||
|
|
Loading…
Reference in New Issue