The common path that we really need to optimize for is CBV_SRV_UAV +
Simple + 1 descriptor.
Descriptor benchmark shows an almost 50% reduction in overhead now.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Checking for pNext here is too brittle and causes crashes when dynamic
rendering path is added.
Also need to chain in existing pNexts.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
This became basically a rewrite in the end, and it got too awkward to
split these commits in any meaningful way.
The goals here were primarily to:
- Support serializing SPIR-V and load SPIR-V.
To do this robustly requires a lot more validation and checks to make
sure end up compiling the same SPIR-V that we load from cache.
This is critical for performance when games have primed their pipeline
libraries and expect that loading a PSO should be fast. Without this,
we will hit vkd3d-shader for every PSO, causing very long load times.
- Implement the required validation for mismatched PSO descriptions.
- Rewrite the binary layout of the pipeline library for flexibility
concerns and performance.
If the pipeline library is mmap-ed from disk - which appears to be
the intended use - we only need to scan through the TOC to fully parse
the library contents.
From a flexibility concern, a blob needs to support inlined data,
but a library can use referential links. We introduce separate
hashmaps which store deduplicated SPIR-V and pipeline cache blobs,
which significantly drop memory and storage requirements.
For future improvements, it should be fairly easy to add information
which lets us avoid SPIR-V or pipeline cache data altogether if
relevant changes to Vulkan/drivers are made.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Useful when used together with pipeline library logging. Confirms that
we can load pipeline caches as expected.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Additionally, add option to ignore cached SPIR-V.
Will be useful for debugging, and also required for VKD3D_SHADER_OVERRIDE.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Avoids saving out pipeline cache blobs which are likely going to be
cached by on-disk cache anyways.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
For pipeline libraries and DXR to some extent later, we'll need an easy
way to compare root signature objects.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
We did not test the scenario where we first render with depth enabled,
and then bind a NULL DSV with the same pipeline.
Also fix issues if we bind NULL RTVs with same pipeline bound.
Fixes crash in Guardians of the Galaxy.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
This is benign and easily gets spammed a TON.
We will warn if an indexed draw is actually made like this.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
UBSAN found a bug here since we store RTV descriptors inline, the
compiler can assume the pointer is 64 byte aligned.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
If we're going to create different SPIR-V files from what the
VkPipelineCache represents, it's meaningless to load it.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
This key represents the variations of SPIR-V which would be generated
from otherwise identical inputs like DXBC blobs and root signatures.
Typically, changing VKD3D_CONFIG flags or enabled extensions will affect
this key. This ensures that we will not attempt to use a cached SPIR-V
file unless we can trust that the SPIR-V interface will match.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Wraps the D3D12 struct with a pipeline library handle.
This is needed if the blob contains references to external data,
which then needs to be resolved.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
D3D12 expects drivers to implicitly synchronize transfer operations,
since there is no TRANSFER barrier ala UAV barriers.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
In DEATHLOOP, there is a render pass which renders out a simple image,
which is then directly followed by a compute dispatch, reading that
image. The image is still in RENDER_TARGET state, and color buffers are
*not* flushed properly on at least RADV, manifesting as a very
distracting glitch pattern. This is a game bug, but for the time being,
we have to workaround it, *sigh*.
For a simple workaround, we can detect patterns where we see these
events in succession:
- Color RT is started
- StateBefore == RENDER_TARGET is not observed
- Dispatch()
In particular, when entering the options menu, highly distracting
glitches are observed in the background.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
HZD issues an aliasing barrier for an alias of a resource that it
still needs.
Because D3D12 requires you to call DiscardResource or a full resource
clear/copy, we can just rely on those to do the actual image layout
transition and treat the aliasing barrier as a pure sync + flush.
This behavior is also observed in a test case where D3D12 drivers
do not seem to discard / fast-clear anything in an aliasing barrier.
Signed-off-by: Robin Kertels <robin.kertels@gmail.com>
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Co-authored-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Mesa RADV translates these legacy entrypoints to the 2 variants. Using
them directly will cost a bit less CPU cycles.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Mesa RADV translates these legacy entrypoints to the 2 variants. Using
them directly will cost a bit less CPU cycles.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Otherwise, we accidentally merge ranges from different pools if
the indices happen to align.
Signed-off-by: Philip Rebohle <philip.rebohle@tu-dortmund.de>
NVIDIA drivers apparently cannot support EXTENDED_USAGE linear
images for whatever reason, so attempt to create these images without
the creation flag.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
For 64-bit image atomics, we should at the very least add 64-bit format
to compatibility list to avoid potential problems.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
We can bind texel buffers at scalar alignment now.
The warning is misleading for placed resources, since 64k never aligns
with a float3.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
The creation with those extensions may fail in few cases:
* older 32 bit drivers
* missing or inaccessible /dev/nvidia-uvm
There's also a mysterious crash that some Debian users experience with
64bit titles and a correct /dev/nvidia-uvm.
Signed-off-by: Arkadiusz Hiler <ahiler@codeweavers.com>
We previously did not take into account the new relaxed format compatibility
rules that we allow with CastingFullyTypedFormatSupported being supported.
Signed-off-by: Philip Rebohle <philip.rebohle@tu-dortmund.de>
Halo Infinite uses &desc->Width for total_bytes.
We can't set total_bytes early because code after this relies on desc->Width.
Signed-off-by: Robin Kertels <robin.kertels@gmail.com>
Guardians of the Galaxy hits this case. Fallback is to disable depth
attachment entirely in a fallback pipeline.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
The 16-byte requirement is kind of a lie. The real requirement is tied
to how vectorized load-store instructions are emitted in the shader
itself since I guess it allows compiler to assume something about
alignment of the base pointer.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
In d3d12, input element alignment needs to be the _minimum_ of 4 and the size of
the type. See the D3D11 spec, section 4.4.6, which behaves similarly:
https://microsoft.github.io/DirectX-Specs/d3d/archive/D3D11_3_FunctionalSpec.htm#4.4.6%20Element%20Alignment
This is correctly taken into account when generating, e.g., the
vertex_buffer_stride_align_mask used for validation, but is not taken
into account when D3D12_APPEND_ALIGNED_ELEMENT is used to automatically
place input elements. Currently, vkd3d always assumes the alignment is
4.
This means that, for example, bytes or shorts should be packed tightly
together when D3D12_APPEND_ALIGNED_ELEMENT is used, but are instead
padded to 4 bytes.
Fixing this makes units appear in Age of Empires IV (see vkd3d-proton
issue #880 for examples.)
Signed-off-by: David Gow <david@ingeniumdigital.com>
Wine VKD3D version of my original commit.
Co-authored-by: Conor McCarthy <cmccarthy@codeweavers.com>
Signed-off-by: Robin Kertels <robin.kertels@gmail.com>
The Vulkan spec update 1.2.195 restricted these features to a very limited
format subset, and somehow this is supposed to not be an API break?
Anyway, let's follow the new rules.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
It's common enough that new games break on RDNA2 because of this that we
should enable this by default. This matches DXVK behavior.
SOTTR gets a special weird exception, just like DXVK. The shaders are
broken enough that the proper fix is actually precise, not invariant.
This will be addressed at some later point.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
This function fails if the counter overflows.
CP77 hits this case a lot and we should just warn the specific failure
instead of a random error.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Potentially reduces the size of the query map, and makes each entry
versioned so that we no longer have to clear the entire map for multiple
dispatches even if it is sparsely populated.
Signed-off-by: Philip Rebohle <philip.rebohle@tu-dortmund.de>
If we need to fallback in both VRS and non-VRS scenarios, we need to key
on it. Fixes segfault in DIRT5 when toggling VRS.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
If we don't find a clear association to an entry point,
we can also find it in the hit group.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Hans-Kristian Arntzen
Philip Rebohle
Robin Kertels
Samuel Pitoiset
Arkadiusz Hiler
Georg Lehmann
Joshua Ashton
David Gow
ifedorov