gallium: remove vertices_per_patch, add pipe_context::set_patch_vertices
We would like draw-only display lists to have immutable draw info and this is the only GL non-draw state in pipe_draw_info (not counting view_mask). It also allows removing some code from draw_vbo for tessellation. Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12351>
This commit is contained in:
parent
6d76112624
commit
10a46226b1
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@ -118,6 +118,8 @@ objects. They all follow simple, one-method binding calls, e.g.
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levels. This corresponds to GL's ``PATCH_DEFAULT_OUTER_LEVEL``.
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* ``default_inner_level`` is the default value for the inner tessellation
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levels. This corresponds to GL's ``PATCH_DEFAULT_INNER_LEVEL``.
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* ``set_patch_vertices`` sets the number of vertices per input patch
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for tessellation.
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* ``set_debug_callback`` sets the callback to be used for reporting
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various debug messages, eventually reported via KHR_debug and
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@ -328,7 +328,8 @@ void draw_vbo(struct draw_context *draw,
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unsigned drawid_offset,
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const struct pipe_draw_indirect_info *indirect,
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const struct pipe_draw_start_count_bias *draws,
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unsigned num_draws);
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unsigned num_draws,
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uint8_t patch_vertices);
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/*******************************************************************************
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@ -498,7 +498,8 @@ draw_vbo(struct draw_context *draw,
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unsigned drawid_offset,
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const struct pipe_draw_indirect_info *indirect,
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const struct pipe_draw_start_count_bias *draws,
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unsigned num_draws)
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unsigned num_draws,
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uint8_t patch_vertices)
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{
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unsigned index_limit;
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unsigned fpstate = util_fpstate_get();
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@ -532,7 +533,7 @@ draw_vbo(struct draw_context *draw,
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draw->pt.user.drawid = drawid_offset;
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draw->pt.user.increment_draw_id = use_info->increment_draw_id;
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draw->pt.user.viewid = 0;
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draw->pt.vertices_per_patch = use_info->vertices_per_patch;
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draw->pt.vertices_per_patch = patch_vertices;
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if (0) {
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for (unsigned i = 0; i < num_draws; i++)
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@ -411,6 +411,15 @@ static void dd_context_set_tess_state(struct pipe_context *_pipe,
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pipe->set_tess_state(pipe, default_outer_level, default_inner_level);
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}
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static void dd_context_set_patch_vertices(struct pipe_context *_pipe,
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uint8_t patch_vertices)
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{
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struct dd_context *dctx = dd_context(_pipe);
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struct pipe_context *pipe = dctx->pipe;
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pipe->set_patch_vertices(pipe, patch_vertices);
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}
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static void dd_context_set_window_rectangles(struct pipe_context *_pipe,
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bool include,
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unsigned num_rectangles,
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@ -904,6 +913,7 @@ dd_context_create(struct dd_screen *dscreen, struct pipe_context *pipe)
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CTX_INIT(set_viewport_states);
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CTX_INIT(set_sampler_views);
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CTX_INIT(set_tess_state);
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CTX_INIT(set_patch_vertices);
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CTX_INIT(set_shader_buffers);
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CTX_INIT(set_shader_images);
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CTX_INIT(set_vertex_buffers);
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@ -397,6 +397,11 @@ static void noop_make_image_handle_resident(struct pipe_context *ctx, uint64_t h
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{
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}
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static void noop_set_patch_vertices(struct pipe_context *ctx,
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uint8_t patch_vertices)
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{
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}
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void noop_init_state_functions(struct pipe_context *ctx);
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void noop_init_state_functions(struct pipe_context *ctx)
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@ -477,4 +482,5 @@ void noop_init_state_functions(struct pipe_context *ctx)
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ctx->create_image_handle = noop_create_image_handle;
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ctx->delete_image_handle = noop_delete_image_handle;
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ctx->make_image_handle_resident = noop_make_image_handle_resident;
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ctx->set_patch_vertices = noop_set_patch_vertices;
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}
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@ -1951,6 +1951,20 @@ trace_context_set_tess_state(struct pipe_context *_context,
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context->set_tess_state(context, default_outer_level, default_inner_level);
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}
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static void
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trace_context_set_patch_vertices(struct pipe_context *_context,
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uint8_t patch_vertices)
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{
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struct trace_context *tr_context = trace_context(_context);
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struct pipe_context *context = tr_context->pipe;
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trace_dump_call_begin("pipe_context", "set_patch_vertices");
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trace_dump_arg(ptr, context);
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trace_dump_arg(uint, patch_vertices);
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trace_dump_call_end();
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context->set_patch_vertices(context, patch_vertices);
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}
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static void trace_context_set_shader_buffers(struct pipe_context *_context,
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enum pipe_shader_type shader,
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@ -2229,6 +2243,7 @@ trace_context_create(struct trace_screen *tr_scr,
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TR_CTX_INIT(memory_barrier);
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TR_CTX_INIT(resource_commit);
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TR_CTX_INIT(set_tess_state);
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TR_CTX_INIT(set_patch_vertices);
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TR_CTX_INIT(set_shader_buffers);
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TR_CTX_INIT(launch_grid);
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TR_CTX_INIT(set_shader_images);
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@ -820,8 +820,6 @@ void trace_dump_draw_info(const struct pipe_draw_info *state)
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trace_dump_member(uint, state, start_instance);
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trace_dump_member(uint, state, instance_count);
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trace_dump_member(uint, state, vertices_per_patch);
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trace_dump_member(uint, state, min_index);
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trace_dump_member(uint, state, max_index);
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@ -913,8 +913,6 @@ util_dump_draw_info(FILE *stream, const struct pipe_draw_info *state)
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util_dump_member(stream, uint, state, start_instance);
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util_dump_member(stream, uint, state, instance_count);
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util_dump_member(stream, uint, state, vertices_per_patch);
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util_dump_member(stream, uint, state, min_index);
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util_dump_member(stream, uint, state, max_index);
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@ -1081,6 +1081,29 @@ tc_set_tess_state(struct pipe_context *_pipe,
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memcpy(p + 4, default_inner_level, 2 * sizeof(float));
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}
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struct tc_patch_vertices {
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struct tc_call_base base;
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ubyte patch_vertices;
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};
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static uint16_t
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tc_call_set_patch_vertices(struct pipe_context *pipe, void *call, uint64_t *last)
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{
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uint8_t patch_vertices = to_call(call, tc_patch_vertices)->patch_vertices;
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pipe->set_patch_vertices(pipe, patch_vertices);
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return call_size(tc_patch_vertices);
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}
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static void
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tc_set_patch_vertices(struct pipe_context *_pipe, uint8_t patch_vertices)
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{
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struct threaded_context *tc = threaded_context(_pipe);
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tc_add_call(tc, TC_CALL_set_patch_vertices,
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tc_patch_vertices)->patch_vertices = patch_vertices;
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}
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struct tc_constant_buffer_base {
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struct tc_call_base base;
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ubyte shader, index;
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@ -2911,13 +2934,11 @@ simplify_draw_info(struct pipe_draw_info *info)
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info->index_bounds_valid = false;
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info->take_index_buffer_ownership = false;
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info->index_bias_varies = false;
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info->_pad = 0;
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/* This shouldn't be set when merging single draws. */
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info->increment_draw_id = false;
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if (info->mode != PIPE_PRIM_PATCHES)
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info->vertices_per_patch = 0;
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if (info->index_size) {
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if (!info->primitive_restart)
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info->restart_index = 0;
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@ -4148,6 +4169,7 @@ threaded_context_create(struct pipe_context *pipe,
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CTX_INIT(set_window_rectangles);
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CTX_INIT(set_sampler_views);
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CTX_INIT(set_tess_state);
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CTX_INIT(set_patch_vertices);
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CTX_INIT(set_shader_buffers);
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CTX_INIT(set_shader_images);
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CTX_INIT(set_vertex_buffers);
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@ -10,6 +10,7 @@ CALL(render_condition)
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CALL(bind_sampler_states)
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CALL(set_framebuffer_state)
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CALL(set_tess_state)
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CALL(set_patch_vertices)
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CALL(set_constant_buffer)
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CALL(set_inlinable_constants)
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CALL(set_sample_locations)
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@ -590,6 +590,7 @@ struct crocus_context {
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enum pipe_prim_type prim_mode:8;
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bool prim_is_points_or_lines;
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uint8_t vertices_per_patch;
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uint8_t patch_vertices;
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bool window_space_position;
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@ -159,8 +159,8 @@ crocus_update_draw_info(struct crocus_context *ice,
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}
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if (info->mode == PIPE_PRIM_PATCHES &&
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ice->state.vertices_per_patch != info->vertices_per_patch) {
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ice->state.vertices_per_patch = info->vertices_per_patch;
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ice->state.vertices_per_patch != ice->state.patch_vertices) {
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ice->state.vertices_per_patch = ice->state.patch_vertices;
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if (screen->devinfo.ver == 8)
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ice->state.dirty |= CROCUS_DIRTY_GEN8_VF_TOPOLOGY;
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@ -3203,6 +3203,14 @@ crocus_set_tess_state(struct pipe_context *ctx,
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shs->sysvals_need_upload = true;
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}
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static void
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crocus_set_patch_vertices(struct pipe_context *ctx, uint8_t patch_vertices)
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{
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struct crocus_context *ice = (struct crocus_context *) ctx;
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ice->state.patch_vertices = patch_vertices;
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}
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static void
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crocus_surface_destroy(struct pipe_context *ctx, struct pipe_surface *p_surf)
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{
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@ -7498,7 +7506,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
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if (dirty & CROCUS_DIRTY_GEN8_VF_TOPOLOGY) {
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crocus_emit_cmd(batch, GENX(3DSTATE_VF_TOPOLOGY), topo) {
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topo.PrimitiveTopologyType =
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translate_prim_type(draw->mode, draw->vertices_per_patch);
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translate_prim_type(draw->mode, ice->state.patch_vertices);
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}
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}
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#endif
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@ -7965,7 +7973,7 @@ crocus_upload_render_state(struct crocus_context *ice,
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prim.PredicateEnable = use_predicate;
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#endif
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prim.PrimitiveTopologyType = translate_prim_type(ice->state.prim_mode, draw->vertices_per_patch);
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prim.PrimitiveTopologyType = translate_prim_type(ice->state.prim_mode, ice->state.patch_vertices);
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if (indirect) {
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// XXX Probably have to do something for gen6 here?
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#if GFX_VER >= 7
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ctx->set_shader_images = crocus_set_shader_images;
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ctx->set_sampler_views = crocus_set_sampler_views;
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ctx->set_tess_state = crocus_set_tess_state;
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ctx->set_patch_vertices = crocus_set_patch_vertices;
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ctx->set_framebuffer_state = crocus_set_framebuffer_state;
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ctx->set_polygon_stipple = crocus_set_polygon_stipple;
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ctx->set_sample_mask = crocus_set_sample_mask;
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@ -148,7 +148,7 @@ fd6_build_tess_consts(struct fd6_emit *emit)
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* size is dwords, since that's what LDG/STG use.
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*/
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unsigned num_vertices = emit->hs
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? emit->info->vertices_per_patch
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? emit->patch_vertices
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: emit->gs->shader->nir->info.gs.vertices_in;
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uint32_t vs_params[4] = {
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@ -162,7 +162,7 @@ fd6_build_tess_consts(struct fd6_emit *emit)
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uint32_t hs_params[4] = {
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emit->vs->output_size * num_vertices * 4, /* vs primitive stride */
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emit->vs->output_size * 4, /* vs vertex stride */
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emit->hs->output_size, emit->info->vertices_per_patch};
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emit->hs->output_size, emit->patch_vertices};
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emit_stage_tess_consts(constobj, emit->hs, hs_params,
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ARRAY_SIZE(hs_params));
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@ -161,6 +161,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
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.sprite_coord_enable = ctx->rasterizer->sprite_coord_enable,
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.sprite_coord_mode = ctx->rasterizer->sprite_coord_mode,
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.primitive_restart = info->primitive_restart && info->index_size,
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.patch_vertices = ctx->patch_vertices,
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};
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if (!(ctx->prog.vs && ctx->prog.fs))
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@ -270,7 +271,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
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unreachable("bad tessmode");
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}
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draw0.prim_type = DI_PT_PATCHES0 + info->vertices_per_patch;
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draw0.prim_type = DI_PT_PATCHES0 + ctx->patch_vertices;
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draw0.tess_enable = true;
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const unsigned max_count = 2048;
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* limit. But in the indirect-draw case we must assume the worst.
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*/
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if (indirect && indirect->buffer) {
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count = ALIGN_NPOT(max_count, info->vertices_per_patch);
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count = ALIGN_NPOT(max_count, ctx->patch_vertices);
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} else {
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count = MIN2(max_count, draw->count);
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count = ALIGN_NPOT(count, info->vertices_per_patch);
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count = ALIGN_NPOT(count, ctx->patch_vertices);
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}
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OUT_PKT7(ring, CP_SET_SUBDRAW_SIZE, 1);
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@ -100,6 +100,7 @@ struct fd6_emit {
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bool sprite_coord_mode;
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bool rasterflat;
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bool primitive_restart;
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uint8_t patch_vertices;
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/* cached to avoid repeated lookups: */
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const struct fd6_program_state *prog;
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@ -250,6 +250,8 @@ struct fd_context {
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struct list_head acc_active_queries dt;
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/*@}*/
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uint8_t patch_vertices;
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/* Whether we need to recheck the active_queries list next
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* fd_batch_update_queries().
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*/
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@ -43,6 +43,14 @@ update_bound_stage(struct fd_context *ctx, enum pipe_shader_type shader,
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}
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}
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static void
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fd_set_patch_vertices(struct pipe_context *pctx, uint8_t patch_vertices) in_dt
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{
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struct fd_context *ctx = fd_context(pctx);
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ctx->patch_vertices = patch_vertices;
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}
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static void
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fd_vs_state_bind(struct pipe_context *pctx, void *hwcso) in_dt
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{
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@ -194,6 +202,7 @@ fd_prog_init(struct pipe_context *pctx)
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pctx->bind_tes_state = fd_tes_state_bind;
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pctx->bind_gs_state = fd_gs_state_bind;
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pctx->bind_fs_state = fd_fs_state_bind;
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pctx->set_patch_vertices = fd_set_patch_vertices;
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ctx->solid_prog.fs = assemble_tgsi(pctx, solid_fs, true);
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ctx->solid_prog.vs = assemble_tgsi(pctx, solid_vs, false);
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@ -113,7 +113,7 @@ i915_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
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/*
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* Do the drawing
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*/
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draw_vbo(i915->draw, info, drawid_offset, NULL, draws, num_draws);
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draw_vbo(i915->draw, info, drawid_offset, NULL, draws, num_draws, 0);
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/*
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* unmap vertex/index buffers
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@ -721,6 +721,7 @@ struct iris_context {
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/** Bitfield of which vertex buffers are bound (non-null). */
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uint64_t bound_vertex_buffers;
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uint8_t patch_vertices;
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bool primitive_restart;
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unsigned cut_index;
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enum pipe_prim_type prim_mode:8;
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@ -81,8 +81,8 @@ iris_update_draw_info(struct iris_context *ice,
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}
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if (info->mode == PIPE_PRIM_PATCHES &&
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ice->state.vertices_per_patch != info->vertices_per_patch) {
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ice->state.vertices_per_patch = info->vertices_per_patch;
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ice->state.vertices_per_patch != ice->state.patch_vertices) {
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ice->state.vertices_per_patch = ice->state.patch_vertices;
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ice->state.dirty |= IRIS_DIRTY_VF_TOPOLOGY;
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/* 8_PATCH TCS needs this for key->input_vertices */
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@ -2912,6 +2912,14 @@ iris_set_tess_state(struct pipe_context *ctx,
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shs->sysvals_need_upload = true;
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}
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static void
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iris_set_patch_vertices(struct pipe_context *ctx, uint8_t patch_vertices)
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{
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struct iris_context *ice = (struct iris_context *) ctx;
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ice->state.patch_vertices = patch_vertices;
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}
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static void
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iris_surface_destroy(struct pipe_context *ctx, struct pipe_surface *p_surf)
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{
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@ -6321,7 +6329,7 @@ iris_upload_dirty_render_state(struct iris_context *ice,
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if (dirty & IRIS_DIRTY_VF_TOPOLOGY) {
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iris_emit_cmd(batch, GENX(3DSTATE_VF_TOPOLOGY), topo) {
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topo.PrimitiveTopologyType =
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translate_prim_type(draw->mode, draw->vertices_per_patch);
|
||||
translate_prim_type(draw->mode, ice->state.vertices_per_patch);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -8095,6 +8103,7 @@ genX(init_state)(struct iris_context *ice)
|
|||
ctx->set_compute_resources = iris_set_compute_resources;
|
||||
ctx->set_global_binding = iris_set_global_binding;
|
||||
ctx->set_tess_state = iris_set_tess_state;
|
||||
ctx->set_patch_vertices = iris_set_patch_vertices;
|
||||
ctx->set_framebuffer_state = iris_set_framebuffer_state;
|
||||
ctx->set_polygon_stipple = iris_set_polygon_stipple;
|
||||
ctx->set_sample_mask = iris_set_sample_mask;
|
||||
|
|
|
@ -118,6 +118,8 @@ struct llvmpipe_context {
|
|||
/** Vertex format */
|
||||
struct vertex_info vertex_info;
|
||||
|
||||
uint8_t patch_vertices;
|
||||
|
||||
/** Which vertex shader output slot contains color */
|
||||
int8_t color_slot[2];
|
||||
|
||||
|
|
|
@ -146,7 +146,8 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
|
|||
!lp->queries_disabled);
|
||||
|
||||
/* draw! */
|
||||
draw_vbo(draw, info, drawid_offset, indirect, draws, num_draws);
|
||||
draw_vbo(draw, info, drawid_offset, indirect, draws, num_draws,
|
||||
lp->patch_vertices);
|
||||
|
||||
/*
|
||||
* unmap vertex/index buffers
|
||||
|
|
|
@ -181,6 +181,14 @@ llvmpipe_set_tess_state(struct pipe_context *pipe,
|
|||
draw_set_tess_state(llvmpipe->draw, default_outer_level, default_inner_level);
|
||||
}
|
||||
|
||||
static void
|
||||
llvmpipe_set_patch_vertices(struct pipe_context *pipe, uint8_t patch_vertices)
|
||||
{
|
||||
struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe);
|
||||
|
||||
llvmpipe->patch_vertices = patch_vertices;
|
||||
}
|
||||
|
||||
void
|
||||
llvmpipe_init_tess_funcs(struct llvmpipe_context *llvmpipe)
|
||||
{
|
||||
|
@ -193,4 +201,5 @@ llvmpipe_init_tess_funcs(struct llvmpipe_context *llvmpipe)
|
|||
llvmpipe->pipe.delete_tes_state = llvmpipe_delete_tes_state;
|
||||
|
||||
llvmpipe->pipe.set_tess_state = llvmpipe_set_tess_state;
|
||||
llvmpipe->pipe.set_patch_vertices = llvmpipe_set_patch_vertices;
|
||||
}
|
||||
|
|
|
@ -445,7 +445,7 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
|
|||
draw_set_indexes(draw, NULL, 0, 0);
|
||||
}
|
||||
|
||||
draw_vbo(draw, info, drawid_offset, NULL, draw_one, 1);
|
||||
draw_vbo(draw, info, drawid_offset, NULL, draw_one, 1, 0);
|
||||
draw_flush(draw);
|
||||
|
||||
if (info->index_size && transferi)
|
||||
|
|
|
@ -254,6 +254,7 @@ struct nvc0_context {
|
|||
|
||||
float default_tess_outer[4];
|
||||
float default_tess_inner[2];
|
||||
uint8_t patch_vertices;
|
||||
|
||||
bool vbo_push_hint;
|
||||
|
||||
|
|
|
@ -1003,6 +1003,14 @@ nvc0_set_tess_state(struct pipe_context *pipe,
|
|||
nvc0->dirty_3d |= NVC0_NEW_3D_TESSFACTOR;
|
||||
}
|
||||
|
||||
static void
|
||||
nvc0_set_patch_vertices(struct pipe_context *pipe, uint8_t patch_vertices)
|
||||
{
|
||||
struct nvc0_context *nvc0 = nvc0_context(pipe);
|
||||
|
||||
nvc0->patch_vertices = patch_vertices;
|
||||
}
|
||||
|
||||
static void
|
||||
nvc0_set_vertex_buffers(struct pipe_context *pipe,
|
||||
unsigned start_slot, unsigned count,
|
||||
|
@ -1499,6 +1507,7 @@ nvc0_init_state_functions(struct nvc0_context *nvc0)
|
|||
pipe->set_viewport_states = nvc0_set_viewport_states;
|
||||
pipe->set_window_rectangles = nvc0_set_window_rectangles;
|
||||
pipe->set_tess_state = nvc0_set_tess_state;
|
||||
pipe->set_patch_vertices = nvc0_set_patch_vertices;
|
||||
|
||||
pipe->create_vertex_elements_state = nvc0_vertex_state_create;
|
||||
pipe->delete_vertex_elements_state = nvc0_vertex_state_delete;
|
||||
|
|
|
@ -977,8 +977,8 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
|
|||
}
|
||||
|
||||
if (info->mode == PIPE_PRIM_PATCHES &&
|
||||
nvc0->state.patch_vertices != info->vertices_per_patch) {
|
||||
nvc0->state.patch_vertices = info->vertices_per_patch;
|
||||
nvc0->state.patch_vertices != nvc0->patch_vertices) {
|
||||
nvc0->state.patch_vertices = nvc0->patch_vertices;
|
||||
PUSH_SPACE(push, 1);
|
||||
IMMED_NVC0(push, NVC0_3D(PATCH_VERTICES), nvc0->state.patch_vertices);
|
||||
}
|
||||
|
|
|
@ -886,7 +886,7 @@ static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
|
|||
|
||||
r300_update_derived_state(r300);
|
||||
|
||||
draw_vbo(r300->draw, info, drawid_offset, NULL, &draw, 1);
|
||||
draw_vbo(r300->draw, info, drawid_offset, NULL, &draw, 1, 0);
|
||||
draw_flush(r300->draw);
|
||||
}
|
||||
|
||||
|
|
|
@ -3997,6 +3997,13 @@ static void evergreen_set_tess_state(struct pipe_context *ctx,
|
|||
rctx->driver_consts[PIPE_SHADER_TESS_CTRL].tcs_default_levels_dirty = true;
|
||||
}
|
||||
|
||||
static void evergreen_set_patch_vertices(struct pipe_context *ctx, uint8_t patch_vertices)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context *)ctx;
|
||||
|
||||
rctx->patch_vertices = patch_vertices;
|
||||
}
|
||||
|
||||
static void evergreen_setup_immed_buffer(struct r600_context *rctx,
|
||||
struct r600_image_view *rview,
|
||||
enum pipe_format pformat)
|
||||
|
@ -4489,6 +4496,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
|
|||
rctx->b.b.set_polygon_stipple = evergreen_set_polygon_stipple;
|
||||
rctx->b.b.set_min_samples = evergreen_set_min_samples;
|
||||
rctx->b.b.set_tess_state = evergreen_set_tess_state;
|
||||
rctx->b.b.set_patch_vertices = evergreen_set_patch_vertices;
|
||||
rctx->b.b.set_hw_atomic_buffers = evergreen_set_hw_atomic_buffers;
|
||||
rctx->b.b.set_shader_images = evergreen_set_shader_images;
|
||||
rctx->b.b.set_shader_buffers = evergreen_set_shader_buffers;
|
||||
|
@ -4524,7 +4532,7 @@ void evergreen_setup_tess_constants(struct r600_context *rctx, const struct pipe
|
|||
struct pipe_constant_buffer constbuf = {0};
|
||||
struct r600_pipe_shader_selector *tcs = rctx->tcs_shader ? rctx->tcs_shader : rctx->tes_shader;
|
||||
struct r600_pipe_shader_selector *ls = rctx->vs_shader;
|
||||
unsigned num_tcs_input_cp = info->vertices_per_patch;
|
||||
unsigned num_tcs_input_cp = rctx->patch_vertices;
|
||||
unsigned num_tcs_outputs;
|
||||
unsigned num_tcs_output_cp;
|
||||
unsigned num_tcs_patch_outputs;
|
||||
|
@ -4624,10 +4632,10 @@ uint32_t evergreen_get_ls_hs_config(struct r600_context *rctx,
|
|||
|
||||
num_output_cp = rctx->tcs_shader ?
|
||||
rctx->tcs_shader->info.properties[TGSI_PROPERTY_TCS_VERTICES_OUT] :
|
||||
info->vertices_per_patch;
|
||||
rctx->patch_vertices;
|
||||
|
||||
return S_028B58_NUM_PATCHES(num_patches) |
|
||||
S_028B58_HS_NUM_INPUT_CP(info->vertices_per_patch) |
|
||||
S_028B58_HS_NUM_INPUT_CP(rctx->patch_vertices) |
|
||||
S_028B58_HS_NUM_OUTPUT_CP(num_output_cp);
|
||||
}
|
||||
|
||||
|
|
|
@ -614,6 +614,7 @@ struct r600_context {
|
|||
struct r600_resource *trace_buf;
|
||||
unsigned trace_id;
|
||||
|
||||
uint8_t patch_vertices;
|
||||
bool cmd_buf_is_compute;
|
||||
struct pipe_resource *append_fence;
|
||||
uint32_t append_fence_id;
|
||||
|
|
|
@ -1074,6 +1074,7 @@ struct si_context {
|
|||
bool compute_image_sgprs_dirty;
|
||||
bool vs_uses_base_instance;
|
||||
bool vs_uses_draw_id;
|
||||
uint8_t patch_vertices;
|
||||
|
||||
/* shader descriptors */
|
||||
struct si_descriptors descriptors[SI_NUM_DESCS];
|
||||
|
|
|
@ -5003,6 +5003,13 @@ static void si_set_tess_state(struct pipe_context *ctx, const float default_oute
|
|||
si_set_internal_const_buffer(sctx, SI_HS_CONST_DEFAULT_TESS_LEVELS, &cb);
|
||||
}
|
||||
|
||||
static void si_set_patch_vertices(struct pipe_context *ctx, uint8_t patch_vertices)
|
||||
{
|
||||
struct si_context *sctx = (struct si_context *)ctx;
|
||||
|
||||
sctx->patch_vertices = patch_vertices;
|
||||
}
|
||||
|
||||
static void si_texture_barrier(struct pipe_context *ctx, unsigned flags)
|
||||
{
|
||||
struct si_context *sctx = (struct si_context *)ctx;
|
||||
|
@ -5132,6 +5139,7 @@ void si_init_state_functions(struct si_context *sctx)
|
|||
sctx->b.texture_barrier = si_texture_barrier;
|
||||
sctx->b.set_min_samples = si_set_min_samples;
|
||||
sctx->b.set_tess_state = si_set_tess_state;
|
||||
sctx->b.set_patch_vertices = si_set_patch_vertices;
|
||||
|
||||
sctx->b.set_active_query_state = si_set_active_query_state;
|
||||
}
|
||||
|
|
|
@ -1593,7 +1593,7 @@ static void si_emit_all_states(struct si_context *sctx, const struct pipe_draw_i
|
|||
|
||||
si_emit_rasterizer_prim_state<GFX_VERSION, HAS_TESS, HAS_GS, NGG>(sctx);
|
||||
if (HAS_TESS)
|
||||
si_emit_derived_tess_state(sctx, info->vertices_per_patch, &num_patches);
|
||||
si_emit_derived_tess_state(sctx, sctx->patch_vertices, &num_patches);
|
||||
|
||||
/* Emit state atoms. */
|
||||
unsigned mask = sctx->dirty_atoms & ~skip_atom_mask;
|
||||
|
@ -1625,8 +1625,8 @@ static void si_emit_all_states(struct si_context *sctx, const struct pipe_draw_i
|
|||
/* Emit draw states. */
|
||||
si_emit_vs_state<GFX_VERSION, HAS_TESS, HAS_GS, NGG>(sctx, info->index_size);
|
||||
si_emit_draw_registers<GFX_VERSION, HAS_TESS, HAS_GS, NGG>
|
||||
(sctx, indirect, prim, num_patches, instance_count, info->vertices_per_patch,
|
||||
primitive_restart, info->restart_index, min_vertex_count);
|
||||
(sctx, indirect, prim, num_patches, instance_count, sctx->patch_vertices, primitive_restart,
|
||||
info->restart_index, min_vertex_count);
|
||||
}
|
||||
|
||||
static bool si_all_vs_resources_read_only(struct si_context *sctx, struct pipe_resource *indexbuf)
|
||||
|
@ -1764,7 +1764,7 @@ static void si_draw_vbo(struct pipe_context *ctx,
|
|||
/* The rarely occuring tcs == NULL case is not optimized. */
|
||||
bool same_patch_vertices =
|
||||
GFX_VERSION >= GFX9 &&
|
||||
tcs && info->vertices_per_patch == tcs->info.base.tess.tcs_vertices_out;
|
||||
tcs && sctx->patch_vertices == tcs->info.base.tess.tcs_vertices_out;
|
||||
|
||||
if (sctx->same_patch_vertices != same_patch_vertices) {
|
||||
sctx->same_patch_vertices = same_patch_vertices;
|
||||
|
@ -1780,7 +1780,7 @@ static void si_draw_vbo(struct pipe_context *ctx,
|
|||
* function TCS.
|
||||
*/
|
||||
bool ls_vgpr_fix =
|
||||
tcs && info->vertices_per_patch > tcs->info.base.tess.tcs_vertices_out;
|
||||
tcs && sctx->patch_vertices > tcs->info.base.tess.tcs_vertices_out;
|
||||
|
||||
if (ls_vgpr_fix != sctx->ls_vgpr_fix) {
|
||||
sctx->ls_vgpr_fix = ls_vgpr_fix;
|
||||
|
|
|
@ -141,7 +141,7 @@ softpipe_draw_vbo(struct pipe_context *pipe,
|
|||
sp->active_statistics_queries > 0);
|
||||
|
||||
/* draw! */
|
||||
draw_vbo(draw, info, drawid_offset, indirect, draws, num_draws);
|
||||
draw_vbo(draw, info, drawid_offset, indirect, draws, num_draws, 0);
|
||||
|
||||
/* unmap vertex/index buffers - will cause draw module to flush */
|
||||
for (i = 0; i < sp->num_vertex_buffers; i++) {
|
||||
|
|
|
@ -655,6 +655,7 @@ struct svga_context
|
|||
|
||||
boolean render_condition;
|
||||
boolean disable_rasterizer; /* Set if to disable rasterization */
|
||||
uint8_t patch_vertices;
|
||||
|
||||
struct {
|
||||
struct svga_tcs_shader *passthrough_tcs;
|
||||
|
|
|
@ -284,7 +284,7 @@ svga_hwtnl_draw_range_elements(struct svga_hwtnl *hwtnl,
|
|||
gen_prim, index_offset, count,
|
||||
info->start_instance,
|
||||
info->instance_count,
|
||||
info->vertices_per_patch);
|
||||
hwtnl->svga->patch_vertices);
|
||||
pipe_resource_reference(&index_buffer, NULL);
|
||||
}
|
||||
else {
|
||||
|
@ -313,7 +313,7 @@ svga_hwtnl_draw_range_elements(struct svga_hwtnl *hwtnl,
|
|||
gen_nr,
|
||||
info->start_instance,
|
||||
info->instance_count,
|
||||
info->vertices_per_patch);
|
||||
hwtnl->svga->patch_vertices);
|
||||
}
|
||||
|
||||
if (gen_buf) {
|
||||
|
|
|
@ -102,7 +102,7 @@ retry_draw_auto(struct svga_context *svga,
|
|||
unsigned hw_count;
|
||||
|
||||
range.primType = svga_translate_prim(info->mode, 12, &hw_count,
|
||||
info->vertices_per_patch);
|
||||
svga->patch_vertices);
|
||||
range.primitiveCount = 0;
|
||||
range.indexArray.surfaceId = SVGA3D_INVALID_ID;
|
||||
range.indexArray.offset = 0;
|
||||
|
@ -151,7 +151,7 @@ retry_draw_indirect(struct svga_context *svga,
|
|||
unsigned hw_count;
|
||||
|
||||
range.primType = svga_translate_prim(info->mode, 12, &hw_count,
|
||||
info->vertices_per_patch);
|
||||
svga->patch_vertices);
|
||||
range.primitiveCount = 0; /* specified in indirect buffer */
|
||||
range.indexArray.surfaceId = SVGA3D_INVALID_ID;
|
||||
range.indexArray.offset = 0;
|
||||
|
@ -269,8 +269,8 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
|
|||
svga->dirty |= SVGA_NEW_VS_CONSTS;
|
||||
}
|
||||
|
||||
if (svga->curr.vertices_per_patch != info->vertices_per_patch) {
|
||||
svga->curr.vertices_per_patch = info->vertices_per_patch;
|
||||
if (svga->curr.vertices_per_patch != svga->patch_vertices) {
|
||||
svga->curr.vertices_per_patch = svga->patch_vertices;
|
||||
|
||||
/* If input patch size changes, we need to notifiy the TCS
|
||||
* code to reevaluate the shader variant since the
|
||||
|
@ -369,7 +369,7 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
|
|||
else {
|
||||
ret = retry_draw_arrays(svga, info->mode, draws[0].start, count,
|
||||
info->start_instance, info->instance_count,
|
||||
info->vertices_per_patch);
|
||||
svga->patch_vertices);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -47,6 +47,15 @@ svga_set_tess_state(struct pipe_context *pipe,
|
|||
}
|
||||
|
||||
|
||||
static void
|
||||
svga_set_patch_vertices(struct pipe_context *pipe, uint8_t patch_vertices)
|
||||
{
|
||||
struct svga_context *svga = svga_context(pipe);
|
||||
|
||||
svga->patch_vertices = patch_vertices;
|
||||
}
|
||||
|
||||
|
||||
static void *
|
||||
svga_create_tcs_state(struct pipe_context *pipe,
|
||||
const struct pipe_shader_state *templ)
|
||||
|
@ -210,6 +219,7 @@ void
|
|||
svga_init_ts_functions(struct svga_context *svga)
|
||||
{
|
||||
svga->pipe.set_tess_state = svga_set_tess_state;
|
||||
svga->pipe.set_patch_vertices = svga_set_patch_vertices;
|
||||
svga->pipe.create_tcs_state = svga_create_tcs_state;
|
||||
svga->pipe.bind_tcs_state = svga_bind_tcs_state;
|
||||
svga->pipe.delete_tcs_state = svga_delete_tcs_state;
|
||||
|
|
|
@ -115,7 +115,8 @@ svga_swtnl_draw_vbo(struct svga_context *svga,
|
|||
svga->curr.constbufs[PIPE_SHADER_VERTEX][i].buffer->width0);
|
||||
}
|
||||
|
||||
draw_vbo(draw, info, drawid_offset, indirect, draw_one, 1);
|
||||
draw_vbo(draw, info, drawid_offset, indirect, draw_one, 1,
|
||||
svga->patch_vertices);
|
||||
|
||||
draw_flush(svga->swtnl.draw);
|
||||
|
||||
|
|
|
@ -201,6 +201,7 @@ struct swr_context {
|
|||
SWR_TILE_INTERFACE tileApi;
|
||||
|
||||
uint32_t max_draws_in_flight;
|
||||
uint8_t patch_vertices;
|
||||
};
|
||||
|
||||
static INLINE struct swr_context *
|
||||
|
|
|
@ -90,7 +90,7 @@ swr_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
|
|||
// trick copied from softpipe to modify const struct *info
|
||||
memcpy(&resolved_info, (void*)info, sizeof(struct pipe_draw_info));
|
||||
resolved_draw.start = draws[0].start;
|
||||
resolved_draw.count = ctx->so_primCounter * resolved_info.vertices_per_patch;
|
||||
resolved_draw.count = ctx->so_primCounter * ctx->patch_vertices;
|
||||
resolved_info.max_index = resolved_draw.count - 1;
|
||||
info = &resolved_info;
|
||||
indirect = NULL;
|
||||
|
@ -252,7 +252,7 @@ swr_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
|
|||
|
||||
if (info->index_size)
|
||||
ctx->api.pfnSwrDrawIndexedInstanced(ctx->swrContext,
|
||||
swr_convert_prim_topology(info->mode, info->vertices_per_patch),
|
||||
swr_convert_prim_topology(info->mode, ctx->patch_vertices),
|
||||
draws[0].count,
|
||||
info->instance_count,
|
||||
draws[0].start,
|
||||
|
@ -260,7 +260,7 @@ swr_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
|
|||
info->start_instance);
|
||||
else
|
||||
ctx->api.pfnSwrDrawInstanced(ctx->swrContext,
|
||||
swr_convert_prim_topology(info->mode, info->vertices_per_patch),
|
||||
swr_convert_prim_topology(info->mode, ctx->patch_vertices),
|
||||
draws[0].count,
|
||||
info->instance_count,
|
||||
draws[0].start,
|
||||
|
|
|
@ -1658,7 +1658,7 @@ swr_update_derived(struct pipe_context *pipe,
|
|||
SWR_NEW_SAMPLER |
|
||||
SWR_NEW_SAMPLER_VIEW)) {
|
||||
if (ctx->tcs) {
|
||||
ctx->tcs->vertices_per_patch = p_draw_info->vertices_per_patch;
|
||||
ctx->tcs->vertices_per_patch = ctx->patch_vertices;
|
||||
|
||||
swr_jit_tcs_key key;
|
||||
swr_generate_tcs_key(key, ctx, ctx->tcs);
|
||||
|
@ -2162,6 +2162,14 @@ swr_set_so_targets(struct pipe_context *pipe,
|
|||
swr->dirty |= SWR_NEW_SO;
|
||||
}
|
||||
|
||||
static void
|
||||
swr_set_patch_vertices(struct pipe_context *pipe, uint8_t patch_vertices)
|
||||
{
|
||||
struct swr_context *swr = swr_context(pipe);
|
||||
|
||||
swr->patch_vertices = patch_vertices;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
swr_state_init(struct pipe_context *pipe)
|
||||
|
@ -2230,4 +2238,6 @@ swr_state_init(struct pipe_context *pipe)
|
|||
pipe->create_stream_output_target = swr_create_so_target;
|
||||
pipe->stream_output_target_destroy = swr_destroy_so_target;
|
||||
pipe->set_stream_output_targets = swr_set_so_targets;
|
||||
|
||||
pipe->set_patch_vertices = swr_set_patch_vertices;
|
||||
}
|
||||
|
|
|
@ -1163,6 +1163,13 @@ static void virgl_set_tess_state(struct pipe_context *ctx,
|
|||
virgl_encode_set_tess_state(vctx, default_outer_level, default_inner_level);
|
||||
}
|
||||
|
||||
static void virgl_set_patch_vertices(struct pipe_context *ctx, uint8_t patch_vertices)
|
||||
{
|
||||
struct virgl_context *vctx = virgl_context(ctx);
|
||||
|
||||
vctx->patch_vertices = patch_vertices;
|
||||
}
|
||||
|
||||
static void virgl_resource_copy_region(struct pipe_context *ctx,
|
||||
struct pipe_resource *dst,
|
||||
unsigned dst_level,
|
||||
|
@ -1546,6 +1553,7 @@ struct pipe_context *virgl_context_create(struct pipe_screen *pscreen,
|
|||
vctx->base.set_constant_buffer = virgl_set_constant_buffer;
|
||||
|
||||
vctx->base.set_tess_state = virgl_set_tess_state;
|
||||
vctx->base.set_patch_vertices = virgl_set_patch_vertices;
|
||||
vctx->base.create_vs_state = virgl_create_vs_state;
|
||||
vctx->base.create_tcs_state = virgl_create_tcs_state;
|
||||
vctx->base.create_tes_state = virgl_create_tes_state;
|
||||
|
|
|
@ -85,6 +85,7 @@ struct virgl_context {
|
|||
struct virgl_staging_mgr staging;
|
||||
bool encoded_transfers;
|
||||
bool supports_staging;
|
||||
uint8_t patch_vertices;
|
||||
|
||||
struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
|
||||
unsigned num_vertex_buffers;
|
||||
|
|
|
@ -764,7 +764,7 @@ int virgl_encoder_draw_vbo(struct virgl_context *ctx,
|
|||
else
|
||||
virgl_encoder_write_dword(ctx->cbuf, 0);
|
||||
if (length >= VIRGL_DRAW_VBO_SIZE_TESS) {
|
||||
virgl_encoder_write_dword(ctx->cbuf, info->vertices_per_patch); /* vertices per patch */
|
||||
virgl_encoder_write_dword(ctx->cbuf, ctx->patch_vertices); /* vertices per patch */
|
||||
virgl_encoder_write_dword(ctx->cbuf, drawid_offset); /* drawid */
|
||||
}
|
||||
if (length == VIRGL_DRAW_VBO_SIZE_INDIRECT) {
|
||||
|
|
|
@ -1487,6 +1487,13 @@ zink_set_tess_state(struct pipe_context *pctx,
|
|||
memcpy(&ctx->default_outer_level, default_outer_level, sizeof(ctx->default_outer_level));
|
||||
}
|
||||
|
||||
static void
|
||||
zink_set_patch_vertices(struct pipe_context *pctx, uint8_t patch_vertices)
|
||||
{
|
||||
struct zink_context *ctx = zink_context(pctx);
|
||||
ctx->gfx_pipeline_state.patch_vertices = patch_vertices;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
hash_render_pass_state(const void *key)
|
||||
{
|
||||
|
@ -3380,6 +3387,7 @@ zink_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
|
|||
ctx->base.set_clip_state = zink_set_clip_state;
|
||||
ctx->base.set_blend_color = zink_set_blend_color;
|
||||
ctx->base.set_tess_state = zink_set_tess_state;
|
||||
ctx->base.set_patch_vertices = zink_set_patch_vertices;
|
||||
|
||||
ctx->base.set_sample_mask = zink_set_sample_mask;
|
||||
|
||||
|
|
|
@ -428,7 +428,7 @@ zink_draw_vbo(struct pipe_context *pctx,
|
|||
|
||||
update_barriers(ctx, false);
|
||||
|
||||
if (ctx->gfx_pipeline_state.vertices_per_patch != dinfo->vertices_per_patch)
|
||||
if (ctx->gfx_pipeline_state.vertices_per_patch != ctx->gfx_pipeline_state.patch_vertices)
|
||||
ctx->gfx_pipeline_state.dirty = true;
|
||||
bool drawid_broken = ctx->drawid_broken;
|
||||
ctx->drawid_broken = false;
|
||||
|
@ -438,7 +438,7 @@ zink_draw_vbo(struct pipe_context *pctx,
|
|||
(HAS_MULTIDRAW && num_draws > 1 && !dinfo->increment_draw_id));
|
||||
if (drawid_broken != ctx->drawid_broken)
|
||||
ctx->dirty_shader_stages |= BITFIELD_BIT(PIPE_SHADER_VERTEX);
|
||||
ctx->gfx_pipeline_state.vertices_per_patch = dinfo->vertices_per_patch;
|
||||
ctx->gfx_pipeline_state.vertices_per_patch = ctx->gfx_pipeline_state.patch_vertices;
|
||||
if (ctx->rast_state->base.point_quad_rasterization &&
|
||||
ctx->gfx_prim_mode != mode) {
|
||||
if (ctx->gfx_prim_mode == PIPE_PRIM_POINTS || mode == PIPE_PRIM_POINTS)
|
||||
|
|
|
@ -79,6 +79,8 @@ struct zink_gfx_pipeline_state {
|
|||
|
||||
VkPipeline pipeline;
|
||||
enum pipe_prim_type mode : 8;
|
||||
|
||||
uint8_t patch_vertices;
|
||||
};
|
||||
|
||||
struct zink_compute_pipeline_state {
|
||||
|
|
|
@ -97,6 +97,7 @@ struct rendering_state {
|
|||
int num_viewports;
|
||||
struct pipe_viewport_state viewports[16];
|
||||
|
||||
uint8_t patch_vertices;
|
||||
ubyte index_size;
|
||||
unsigned index_offset;
|
||||
struct pipe_resource *index_buffer;
|
||||
|
@ -764,10 +765,10 @@ static void handle_graphics_pipeline(struct lvp_cmd_buffer_entry *cmd,
|
|||
if (pipeline->graphics_create_info.pTessellationState) {
|
||||
if (!dynamic_states[conv_dynamic_state_idx(VK_DYNAMIC_STATE_PATCH_CONTROL_POINTS_EXT)]) {
|
||||
const VkPipelineTessellationStateCreateInfo *ts = pipeline->graphics_create_info.pTessellationState;
|
||||
state->info.vertices_per_patch = ts->patchControlPoints;
|
||||
state->patch_vertices = ts->patchControlPoints;
|
||||
}
|
||||
} else
|
||||
state->info.vertices_per_patch = 0;
|
||||
state->patch_vertices = 0;
|
||||
|
||||
if (pipeline->graphics_create_info.pViewportState) {
|
||||
const VkPipelineViewportStateCreateInfo *vpi= pipeline->graphics_create_info.pViewportState;
|
||||
|
@ -1676,6 +1677,7 @@ static void handle_draw(struct lvp_cmd_buffer_entry *cmd,
|
|||
if (cmd->u.draw.draw_count > 1)
|
||||
state->info.increment_draw_id = true;
|
||||
|
||||
state->pctx->set_patch_vertices(state->pctx, state->patch_vertices);
|
||||
state->pctx->draw_vbo(state->pctx, &state->info, 0, NULL, cmd->u.draw.draws, cmd->u.draw.draw_count);
|
||||
}
|
||||
|
||||
|
@ -2252,6 +2254,7 @@ static void handle_draw_indexed(struct lvp_cmd_buffer_entry *cmd,
|
|||
cmd->u.draw_indexed.calc_start = false;
|
||||
}
|
||||
state->info.index_bias_varies = cmd->u.draw_indexed.vertex_offset_changes;
|
||||
state->pctx->set_patch_vertices(state->pctx, state->patch_vertices);
|
||||
state->pctx->draw_vbo(state->pctx, &state->info, 0, NULL, cmd->u.draw_indexed.draws, cmd->u.draw_indexed.draw_count);
|
||||
}
|
||||
|
||||
|
@ -2273,6 +2276,7 @@ static void handle_draw_indirect(struct lvp_cmd_buffer_entry *cmd,
|
|||
state->indirect_info.buffer = cmd->u.draw_indirect.buffer->bo;
|
||||
state->info.view_mask = subpass->view_mask;
|
||||
|
||||
state->pctx->set_patch_vertices(state->pctx, state->patch_vertices);
|
||||
state->pctx->draw_vbo(state->pctx, &state->info, 0, &state->indirect_info, &draw, 1);
|
||||
}
|
||||
|
||||
|
@ -2746,6 +2750,7 @@ static void handle_draw_indirect_count(struct lvp_cmd_buffer_entry *cmd,
|
|||
state->indirect_info.indirect_draw_count = cmd->u.draw_indirect_count.count_buffer->bo;
|
||||
state->info.view_mask = subpass->view_mask;
|
||||
|
||||
state->pctx->set_patch_vertices(state->pctx, state->patch_vertices);
|
||||
state->pctx->draw_vbo(state->pctx, &state->info, 0, &state->indirect_info, &draw, 1);
|
||||
}
|
||||
|
||||
|
@ -2920,6 +2925,7 @@ static void handle_draw_indirect_byte_count(struct lvp_cmd_buffer_entry *cmd,
|
|||
|
||||
draw.count /= cmd->u.draw_indirect_byte_count.vertex_stride;
|
||||
state->info.view_mask = subpass->view_mask;
|
||||
state->pctx->set_patch_vertices(state->pctx, state->patch_vertices);
|
||||
state->pctx->draw_vbo(state->pctx, &state->info, 0, &state->indirect_info, &draw, 1);
|
||||
}
|
||||
|
||||
|
@ -3079,7 +3085,7 @@ static void handle_set_logic_op(struct lvp_cmd_buffer_entry *cmd,
|
|||
static void handle_set_patch_control_points(struct lvp_cmd_buffer_entry *cmd,
|
||||
struct rendering_state *state)
|
||||
{
|
||||
state->info.vertices_per_patch = cmd->u.set_patch_control_points.vertices_per_patch;
|
||||
state->patch_vertices = cmd->u.set_patch_control_points.vertices_per_patch;
|
||||
}
|
||||
|
||||
static void handle_set_primitive_restart_enable(struct lvp_cmd_buffer_entry *cmd,
|
||||
|
|
|
@ -453,6 +453,11 @@ struct pipe_context {
|
|||
const float default_outer_level[4],
|
||||
const float default_inner_level[2]);
|
||||
|
||||
/**
|
||||
* Set the number of vertices per input patch for tessellation.
|
||||
*/
|
||||
void (*set_patch_vertices)(struct pipe_context *ctx, uint8_t patch_vertices);
|
||||
|
||||
/**
|
||||
* Sets the debug callback. If the pointer is null, then no callback is
|
||||
* set, otherwise a copy of the data should be made.
|
||||
|
|
|
@ -765,9 +765,8 @@ struct pipe_draw_start_count_bias {
|
|||
struct pipe_draw_info
|
||||
{
|
||||
enum pipe_prim_type mode:8; /**< the mode of the primitive */
|
||||
ubyte vertices_per_patch; /**< the number of vertices per patch */
|
||||
unsigned index_size:4; /**< if 0, the draw is not indexed. */
|
||||
unsigned view_mask:6; /**< mask of multiviews for this draw */
|
||||
uint8_t index_size; /**< if 0, the draw is not indexed. */
|
||||
uint8_t view_mask; /**< mask of multiviews for this draw */
|
||||
bool primitive_restart:1;
|
||||
bool has_user_indices:1; /**< if true, use index.user_buffer */
|
||||
bool index_bounds_valid:1; /**< whether min_index and max_index are valid;
|
||||
|
@ -776,6 +775,7 @@ struct pipe_draw_info
|
|||
bool take_index_buffer_ownership:1; /**< callee inherits caller's refcount
|
||||
(no need to reference indexbuf, but still needs to unreference it) */
|
||||
bool index_bias_varies:1; /**< true if index_bias varies between draws */
|
||||
uint8_t _pad:2;
|
||||
|
||||
unsigned start_instance; /**< first instance id */
|
||||
unsigned instance_count; /**< number of instances */
|
||||
|
|
|
@ -353,7 +353,7 @@ void brw_init_state( struct brw_context *brw )
|
|||
ctx->DriverFlags.NewTextureBuffer = BRW_NEW_TEXTURE_BUFFER;
|
||||
ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_UNIFORM_BUFFER;
|
||||
ctx->DriverFlags.NewImageUnits = BRW_NEW_IMAGE_UNITS;
|
||||
ctx->DriverFlags.NewDefaultTessLevels = BRW_NEW_DEFAULT_TESS_LEVELS;
|
||||
ctx->DriverFlags.NewTessState = BRW_NEW_DEFAULT_TESS_LEVELS;
|
||||
ctx->DriverFlags.NewIntelConservativeRasterization = BRW_NEW_CONSERVATIVE_RASTERIZATION;
|
||||
}
|
||||
|
||||
|
|
|
@ -1286,7 +1286,6 @@ _mesa_draw_arrays(struct gl_context *ctx, GLenum mode, GLint start,
|
|||
struct pipe_draw_start_count_bias draw;
|
||||
|
||||
info.mode = mode;
|
||||
info.vertices_per_patch = ctx->TessCtrlProgram.patch_vertices;
|
||||
info.index_size = 0;
|
||||
/* Packed section begin. */
|
||||
info.primitive_restart = false;
|
||||
|
@ -1614,7 +1613,6 @@ _mesa_MultiDrawArrays(GLenum mode, const GLint *first,
|
|||
ALLOC_PRIMS(draw, primcount, "glMultiDrawElements");
|
||||
|
||||
info.mode = mode;
|
||||
info.vertices_per_patch = ctx->TessCtrlProgram.patch_vertices;
|
||||
info.index_size = 0;
|
||||
/* Packed section begin. */
|
||||
info.primitive_restart = false;
|
||||
|
@ -1728,7 +1726,6 @@ _mesa_validated_drawrangeelements(struct gl_context *ctx, GLenum mode,
|
|||
struct gl_buffer_object *index_bo = ctx->Array.VAO->IndexBufferObj;
|
||||
|
||||
info.mode = mode;
|
||||
info.vertices_per_patch = ctx->TessCtrlProgram.patch_vertices;
|
||||
info.index_size = 1 << index_size_shift;
|
||||
/* Packed section begin. */
|
||||
info.primitive_restart = ctx->Array._PrimitiveRestart[index_size_shift];
|
||||
|
@ -2115,7 +2112,6 @@ _mesa_validated_multidrawelements(struct gl_context *ctx, GLenum mode,
|
|||
struct pipe_draw_info info;
|
||||
|
||||
info.mode = mode;
|
||||
info.vertices_per_patch = ctx->TessCtrlProgram.patch_vertices;
|
||||
info.index_size = 1 << index_size_shift;
|
||||
/* Packed section begin. */
|
||||
info.primitive_restart = ctx->Array._PrimitiveRestart[index_size_shift];
|
||||
|
|
|
@ -4799,8 +4799,9 @@ struct gl_driver_flags
|
|||
|
||||
/**
|
||||
* gl_context::TessCtrlProgram::patch_default_*
|
||||
* gl_context::TessCtrlProgram::patch_vertices
|
||||
*/
|
||||
uint64_t NewDefaultTessLevels;
|
||||
uint64_t NewTessState;
|
||||
|
||||
/**
|
||||
* gl_context::IntelConservativeRasterization
|
||||
|
|
|
@ -2760,6 +2760,16 @@ _mesa_CreateShaderProgramv(GLenum type, GLsizei count,
|
|||
}
|
||||
|
||||
|
||||
static void
|
||||
set_patch_vertices(struct gl_context *ctx, GLint value)
|
||||
{
|
||||
if (ctx->TessCtrlProgram.patch_vertices != value) {
|
||||
FLUSH_VERTICES(ctx, 0, GL_CURRENT_BIT);
|
||||
ctx->NewDriverState |= ctx->DriverFlags.NewTessState;
|
||||
ctx->TessCtrlProgram.patch_vertices = value;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* For GL_ARB_tessellation_shader
|
||||
*/
|
||||
|
@ -2767,8 +2777,8 @@ void GLAPIENTRY
|
|||
_mesa_PatchParameteri_no_error(GLenum pname, GLint value)
|
||||
{
|
||||
GET_CURRENT_CONTEXT(ctx);
|
||||
FLUSH_VERTICES(ctx, 0, GL_CURRENT_BIT);
|
||||
ctx->TessCtrlProgram.patch_vertices = value;
|
||||
|
||||
set_patch_vertices(ctx, value);
|
||||
}
|
||||
|
||||
|
||||
|
@ -2792,8 +2802,7 @@ _mesa_PatchParameteri(GLenum pname, GLint value)
|
|||
return;
|
||||
}
|
||||
|
||||
FLUSH_VERTICES(ctx, 0, GL_CURRENT_BIT);
|
||||
ctx->TessCtrlProgram.patch_vertices = value;
|
||||
set_patch_vertices(ctx, value);
|
||||
}
|
||||
|
||||
|
||||
|
@ -2812,13 +2821,13 @@ _mesa_PatchParameterfv(GLenum pname, const GLfloat *values)
|
|||
FLUSH_VERTICES(ctx, 0, 0);
|
||||
memcpy(ctx->TessCtrlProgram.patch_default_outer_level, values,
|
||||
4 * sizeof(GLfloat));
|
||||
ctx->NewDriverState |= ctx->DriverFlags.NewDefaultTessLevels;
|
||||
ctx->NewDriverState |= ctx->DriverFlags.NewTessState;
|
||||
return;
|
||||
case GL_PATCH_DEFAULT_INNER_LEVEL:
|
||||
FLUSH_VERTICES(ctx, 0, 0);
|
||||
memcpy(ctx->TessCtrlProgram.patch_default_inner_level, values,
|
||||
2 * sizeof(GLfloat));
|
||||
ctx->NewDriverState |= ctx->DriverFlags.NewDefaultTessLevels;
|
||||
ctx->NewDriverState |= ctx->DriverFlags.NewTessState;
|
||||
return;
|
||||
default:
|
||||
_mesa_error(ctx, GL_INVALID_ENUM, "glPatchParameterfv");
|
||||
|
|
|
@ -43,10 +43,12 @@ st_update_tess(struct st_context *st)
|
|||
const struct gl_context *ctx = st->ctx;
|
||||
struct pipe_context *pipe = st->pipe;
|
||||
|
||||
if (!pipe->set_tess_state)
|
||||
return;
|
||||
|
||||
if (pipe->set_tess_state) {
|
||||
pipe->set_tess_state(pipe,
|
||||
ctx->TessCtrlProgram.patch_default_outer_level,
|
||||
ctx->TessCtrlProgram.patch_default_inner_level);
|
||||
}
|
||||
|
||||
if (pipe->set_patch_vertices)
|
||||
pipe->set_patch_vertices(pipe, ctx->TessCtrlProgram.patch_vertices);
|
||||
}
|
||||
|
|
|
@ -487,7 +487,7 @@ st_init_driver_flags(struct st_context *st)
|
|||
f->NewRasterizerDiscard = ST_NEW_RASTERIZER;
|
||||
f->NewTileRasterOrder = ST_NEW_RASTERIZER;
|
||||
f->NewUniformBuffer = ST_NEW_UNIFORM_BUFFER;
|
||||
f->NewDefaultTessLevels = ST_NEW_TESS_STATE;
|
||||
f->NewTessState = ST_NEW_TESS_STATE;
|
||||
|
||||
/* Shader resources */
|
||||
f->NewTextureBuffer = ST_NEW_SAMPLER_VIEWS;
|
||||
|
|
|
@ -259,7 +259,6 @@ st_indirect_draw_vbo(struct gl_context *ctx,
|
|||
}
|
||||
|
||||
info.mode = translate_prim(ctx, mode);
|
||||
info.vertices_per_patch = ctx->TessCtrlProgram.patch_vertices;
|
||||
indirect.buffer = st_buffer_object(indirect_data)->buffer;
|
||||
indirect.offset = indirect_offset;
|
||||
|
||||
|
@ -300,7 +299,6 @@ st_draw_transform_feedback(struct gl_context *ctx, GLenum mode,
|
|||
util_draw_init_info(&info);
|
||||
info.max_index = ~0u; /* so that u_vbuf can tell that it's unknown */
|
||||
info.mode = translate_prim(ctx, mode);
|
||||
info.vertices_per_patch = ctx->TessCtrlProgram.patch_vertices;
|
||||
info.instance_count = num_instances;
|
||||
|
||||
/* Transform feedback drawing is always non-indexed. */
|
||||
|
|
|
@ -125,7 +125,6 @@ st_feedback_draw_vbo(struct gl_context *ctx,
|
|||
/* Initialize pipe_draw_info. */
|
||||
info.primitive_restart = false;
|
||||
info.take_index_buffer_ownership = false;
|
||||
info.vertices_per_patch = ctx->TessCtrlProgram.patch_vertices;
|
||||
info.restart_index = 0;
|
||||
info.view_mask = 0;
|
||||
|
||||
|
@ -459,7 +458,8 @@ st_feedback_draw_vbo(struct gl_context *ctx,
|
|||
info.max_index = d.start + d.count - 1;
|
||||
}
|
||||
|
||||
draw_vbo(draw, &info, prims[i].draw_id, NULL, &d, 1);
|
||||
draw_vbo(draw, &info, prims[i].draw_id, NULL, &d, 1,
|
||||
ctx->TessCtrlProgram.patch_vertices);
|
||||
}
|
||||
|
||||
/* unmap images */
|
||||
|
|
|
@ -330,9 +330,6 @@ vbo_exec_vtx_flush(struct vbo_exec_context *exec)
|
|||
printf("%s %d %d\n", __func__, exec->vtx.prim_count,
|
||||
exec->vtx.vert_count);
|
||||
|
||||
exec->vtx.info.vertices_per_patch =
|
||||
ctx->TessCtrlProgram.patch_vertices;
|
||||
|
||||
ctx->Driver.DrawGalliumMultiMode(ctx, &exec->vtx.info,
|
||||
exec->vtx.draw,
|
||||
exec->vtx.mode,
|
||||
|
|
|
@ -221,7 +221,6 @@ vbo_save_playback_vertex_list(struct gl_context *ctx, void *data, bool copy_to_c
|
|||
assert(ctx->NewState == 0);
|
||||
|
||||
struct pipe_draw_info *info = (struct pipe_draw_info *) &node->merged.info;
|
||||
info->vertices_per_patch = ctx->TessCtrlProgram.patch_vertices;
|
||||
void *gl_bo = info->index.gl_bo;
|
||||
if (node->merged.mode) {
|
||||
ctx->Driver.DrawGalliumMultiMode(ctx, info,
|
||||
|
|
Loading…
Reference in New Issue