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242 Commits

Author SHA1 Message Date
Marek Olšák 474468fbf9 radeonsi/gfx9: disable features that don't work 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 7695ea0c02 radeonsi/gfx9: add linear address computations for texture transfers 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 7d88233f84 radeonsi/gfx9: handle pitch and offset overrides for texture_from_handle 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák de55e57e29 radeonsi/gfx9: set/validate GFX9 BO metadata 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák bd1da6b339 radeonsi/gfx9: add radeon_surf.gfx9.surf_offset 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 405bacd820 radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blits 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 272b50a6f4 radeonsi/gfx9: do DCC clears on non-mipmapped textures only 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák aba8e0ea68 radeonsi/gfx9: update can_sample_z/s flags 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 054dcbe42c radeonsi/gfx9: pass correct parameters to buffer_get_handle 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 710aaed52b radeonsi/gfx9: update si_set_optimal_micro_tile_mode 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 7fcad40ca5 radeonsi/gfx9: don't check array_mode for allowing TC-compatible HTILE 
GFX9 supports this with all modes except linear.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 6f09b0d076 radeonsi/gfx9: update HTILE/CMASK/FMASK allocators 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák a0e8b73594 radeonsi/gfx9: update r600_print_texture_info 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák b25d7c2cbf gallium/radeon: move pre-GFX9 radeon_bo_metadata.* to u.legacy.* 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák ba2e7c68ce gallium/radeon: move pre-GFX9 radeon_surf.* members to radeon_surf.u.legacy.* 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 641b79774a radeonsi/gfx9: allow Z16_UNORM for TC-compatible HTILE 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 6d21fd51b6 radeonsi/gfx9: disable RB+ on Vega10 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-03-30 14:44:33 +02:00
Marek Olšák 04e6977e5d gallium/radeon: reference pipe_resource in pipe_transfer 
for threaded gallium

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2017-03-17 18:30:21 +01:00
Timothy Arceri 628e84a58f gallium/util: replace pipe_mutex_unlock() with mtx_unlock() 
pipe_mutex_unlock() was made unnecessary with fd33a6bcd7.

Replaced using:
find ./src -type f -exec sed -i -- \
's:pipe_mutex_unlock(\([^)]*\)):mtx_unlock(\&\1):g' {} \;

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2017-03-07 08:53:05 +11:00
Timothy Arceri ba72554f3e gallium/util: replace pipe_mutex_lock() with mtx_lock() 
replace pipe_mutex_lock() was made unnecessary with fd33a6bcd7.

Replaced using:
find ./src -type f -exec sed -i -- \
's:pipe_mutex_lock(\([^)]*\)):mtx_lock(\&\1):g' {} \;

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2017-03-07 08:52:38 +11:00
Marek Olšák 45240ce598 radeonsi: use R600_RESOURCE_FLAG_UNMAPPABLE where it's desirable 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-02-18 01:22:08 +01:00
Marek Olšák c196efcf03 gallium/radeon: add an assertion to texture_transfer_map for app bugs 
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
 2017-02-14 21:47:51 +01:00
Marek Olšák 43a2ba1b7d gallium/radeon: use staging for texture read mappings from GTT WC 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-02-10 11:27:50 +01:00
Marek Olšák f8bc628b2c gallium/radeon: merge dirty_fb_counter and dirty_tex_descriptor_counter 
to simplify things in draw_vbo a little

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-01-30 17:45:29 +01:00
Marek Olšák 7b32ae4df5 gallium/radeon: adjust the rule for using the LINEAR_ALIGNED layout 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-01-23 23:43:38 +01:00
Marek Olšák 9a3296bf1c radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VI 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-01-05 18:43:23 +01:00
Marek Olšák 49fa4a4e60 gallium/radeon: add RADEON_SURF_OPTIMIZE_FOR_SPACE 
FORCE_TILING should disable it. It has no effect now, but that may change
soon.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-21 21:44:35 +01:00
Marek Olšák ce3f453f01 radeonsi: fix r600_texture::tc_compatible_htile 
htile_size is now always non-zero if HTILE is allocated.

It seems to have caused no issues.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-10 18:34:55 +01:00
Marek Olšák 7786f8c635 gallium/radeon: add enum radeon_micro_mode 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-01 22:33:13 +01:00
Marek Olšák 1a4e0162fc gallium/radeon: make it clear that DRM 2.x.x fast clear constraint is CIK-only 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-01 22:33:13 +01:00
Marek Olšák e3697b4be6 gallium/radeon: remove r600_surface::level_info 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-01 22:33:13 +01:00
Marek Olšák bf4d102ea3 gallium/radeon: add radeon_surf::is_linear 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-01 22:33:13 +01:00
Marek Olšák e9c76eeeaa gallium/radeon: remove radeon_surf_level::pitch_bytes 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-01 22:33:13 +01:00
Marek Olšák c66a550385 gallium/radeon: don't call u_format helpers if we have that info already 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-01 22:33:13 +01:00
Marek Olšák 692f2640ab gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levels 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-11-01 22:33:13 +01:00
Marek Olšák 29144d0f34 gallium/radeon: stop using PIPE_BIND_CUSTOM 
it has no effect whatsoever

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák 3dc78c33a9 gallium/radeon: remove unused r600_cmask_info members 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák d18bf0b944 gallium/radeon: don't force the same tiling parameters for FMASK 
GCN can use a completely different tile mode for FMASK.

FMASK allocation now skips one unrelated amdgpu_surface_init codepath as
hinted by the assertion.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák 24faeb94be gallium/radeon: print tiling index when printing texture info 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák 2a2e537577 gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignment 
these names were misleading.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák 67a44c97af gallium/radeon: remove flags specific to libdrm_radeon from winsys interface 
These just say whether libdrm can assume that the latest radeon_surface
definition is used by Mesa.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák 7a706ad25c gallium/radeon: remove r600_htile_info 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák 7e73ff87c0 gallium/radeon: remove unnecessary fields from radeon_surf_level 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák d5c7ea3b83 gallium/radeon: decrease the size of radeon_surf 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák e9590d9092 gallium/radeon: pass pipe_resource and other params to surface_init directly 
This removes input-only parameters from the radeon_surf structure.

Some of the translation logic from pipe_resource to radeon_surf is moved to
winsys/radeon.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák ba174b8dff gallium/radeon: define RADEON_SURF_MODE_* as enums 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák b5118fe054 gallium/radeon: stop using some input fields from radeon_surface 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák 28d237d63d gallium/radeon: fold r600_setup_surface into r600_init_surface 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák 81a95946da gallium/radeon: fold radeon_winsys::surface_best into radeon/winsys 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00
Marek Olšák dce05b3423 gallium/radeon: make sure the address of separate CMASK is aligned properly 
This should fix random GPU hangs on Hawaii and Fiji.

Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2016-10-26 13:02:58 +02:00