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gallium/radeon: define RADEON_SURF_MODE_* as enums 

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-10-23 20:07:39 +02:00
parent b5118fe054
commit ba174b8dff
2 changed files with 14 additions and 9 deletions
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12
src/gallium/drivers/radeon/r600_texture.c
View File

@ -37,8 +37,9 @@
static void r600_texture_discard_cmask(struct r600_common_screen *rscreen,
struct r600_texture *rtex);
static unsigned r600_choose_tiling(struct r600_common_screen *rscreen,
const struct pipe_resource *templ);
static enum radeon_surf_mode
r600_choose_tiling(struct r600_common_screen *rscreen,
const struct pipe_resource *templ);
bool r600_prepare_for_dma_blit(struct r600_common_context *rctx,
@ -191,7 +192,7 @@ static unsigned r600_texture_get_offset(struct r600_texture *rtex, unsigned leve
static int r600_init_surface(struct r600_common_screen *rscreen,
struct radeon_surf *surface,
const struct pipe_resource *ptex,
unsigned array_mode,
enum radeon_surf_mode array_mode,
unsigned pitch_in_bytes_override,
unsigned offset,
bool is_imported,
@ -1200,8 +1201,9 @@ r600_texture_create_object(struct pipe_screen *screen,
return rtex;
}
static unsigned r600_choose_tiling(struct r600_common_screen *rscreen,
const struct pipe_resource *templ)
static enum radeon_surf_mode
r600_choose_tiling(struct r600_common_screen *rscreen,
const struct pipe_resource *templ)
{
const struct util_format_description *desc = util_format_description(templ->format);
bool force_tiling = templ->flags & R600_RESOURCE_FLAG_FORCE_TILING;

11
src/gallium/drivers/radeon/radeon_winsys.h
View File

@ -257,6 +257,12 @@ enum radeon_feature_id {
#define RADEON_SURF_MAX_LEVEL 32
enum radeon_surf_mode {
RADEON_SURF_MODE_LINEAR_ALIGNED = 1,
RADEON_SURF_MODE_1D = 2,
RADEON_SURF_MODE_2D = 3,
};
#define RADEON_SURF_TYPE_MASK 0xFF
#define RADEON_SURF_TYPE_SHIFT 0
#define RADEON_SURF_TYPE_1D 0
@ -267,9 +273,6 @@ enum radeon_feature_id {
#define RADEON_SURF_TYPE_2D_ARRAY 5
#define RADEON_SURF_MODE_MASK 0xFF
#define RADEON_SURF_MODE_SHIFT 8
#define RADEON_SURF_MODE_LINEAR_ALIGNED 1
#define RADEON_SURF_MODE_1D 2
#define RADEON_SURF_MODE_2D 3
#define RADEON_SURF_SCANOUT (1 << 16)
#define RADEON_SURF_ZBUFFER (1 << 17)
#define RADEON_SURF_SBUFFER (1 << 18)
@ -295,7 +298,7 @@ struct radeon_surf_level {
uint32_t nblk_y;
uint32_t nblk_z;
uint32_t pitch_bytes;
uint32_t mode;
enum radeon_surf_mode mode;
uint64_t dcc_offset;
uint64_t dcc_fast_clear_size;
bool dcc_enabled;