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gallium/radeon: don't force the same tiling parameters for FMASK 

GCN can use a completely different tile mode for FMASK.

FMASK allocation now skips one unrelated amdgpu_surface_init codepath as
hinted by the assertion.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-10-24 18:22:31 +02:00
parent ecf045b4f7
commit d18bf0b944
2 changed files with 12 additions and 8 deletions
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18
src/gallium/drivers/radeon/r600_texture.c
View File

@ -593,19 +593,21 @@ void r600_texture_get_fmask_info(struct r600_common_screen *rscreen,
templ.nr_samples = 1;
flags = rtex->surface.flags | RADEON_SURF_FMASK;
/* Use the same parameters and tile mode. */
fmask.bankw = rtex->surface.bankw;
fmask.bankh = rtex->surface.bankh;
fmask.mtilea = rtex->surface.mtilea;
fmask.tile_split = rtex->surface.tile_split;
if (rscreen->chip_class <= CAYMAN) {
/* Use the same parameters and tile mode. */
fmask.bankw = rtex->surface.bankw;
fmask.bankh = rtex->surface.bankh;
fmask.mtilea = rtex->surface.mtilea;
fmask.tile_split = rtex->surface.tile_split;
if (nr_samples <= 4)
fmask.bankh = 4;
}
switch (nr_samples) {
case 2:
case 4:
bpe = 1;
if (rscreen->chip_class <= CAYMAN) {
fmask.bankh = 4;
}
break;
case 8:
bpe = 4;

2
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
View File

@ -436,6 +436,8 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
* for shared resources. This is for 2D tiling only. */
if (AddrSurfInfoIn.tileMode >= ADDR_TM_2D_TILED_THIN1 &&
surf->bankw && surf->bankh && surf->mtilea && surf->tile_split) {
assert(!(flags & RADEON_SURF_FMASK));
/* If any of these parameters are incorrect, the calculation
* will fail. */
AddrTileInfoIn.banks = surf->num_banks;