Commit Graph

62 Commits

Author SHA1 Message Date
Marek Olšák 5bc871a4ca radeonsi: implement vertex color clamping
This is only supported in the compatibility profile (without GS and tess).

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák 208d1ed38d radeonsi: implement fragment color clamping
using the shader key for now.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák c4f086f399 radeonsi: remove an unused ctx parameter in si_shader_destroy
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-17 21:40:03 +02:00
Marek Olšák b3c55fc669 radeonsi: do force_persample_interp in shaders for non-trivial cases
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-10-03 22:06:09 +02:00
Marek Olšák c2a42d1f9f radeonsi: don't rebind GSVS ring buffers every draw call using GS
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2015-09-01 21:51:14 +02:00
Marek Olšák f6a10f60b7 radeonsi: optimize scissor states
- convert 16 states to 1 atom
- only emit 1 scissor if VIEWPORT_INDEX isn't written
- use only one packet when emitting consecutive scissors

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2015-09-01 21:51:13 +02:00
Marek Olšák 9b510a9652 radeonsi: fix a Unigine Heaven hang when drirc is missing
Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2015-09-01 21:51:13 +02:00
Marek Olšák 93d97db349 radeonsi: allow si_dump_key to write to a file
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-26 19:25:18 +02:00
Marek Olšák e7a52a5cb8 radeonsi: add support for gl_PrimitiveID in the fragment shader
It must be obtained from the VS.

The GS scenario A must be enabled for PrimID to be generated for the VS.

+ 4 piglits

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-13 01:25:26 +02:00
Dave Airlie 4b6c1efb22 radeonsi: split out interpolation input selection
This is prep work for using it in the interpolation code
later.

Also add storage for the input interpolation mode so we
can pick it up later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-25 01:06:41 +01:00
Marek Olšák ebfd9e0071 radeonsi: add tessellation shader states
ls_rsrc# will be emitted as part of the derived tessellation state

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák aa2fa6723a radeonsi: update si_get_vs_info and si_get_vs_state for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák fff16e4ad2 radeonsi: add shader code generation for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák 2ecb06b946 radeonsi: make ES2GS offset sgpr location dynamic
It will have a different location in the tessellation evaluation shader.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák 50a957c5de radeonsi: upload shader rodata after updating scratch relocations
Cc: 10.5 10.6 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00
Marek Olšák e4d738f6c6 radeonsi: remove redundant parameter in si_shader_binary_read
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:23 +02:00
Michel Dänzer 248b26429f radeonsi: Use param export count from si_llvm_export_vs in si_shader_vs
This eliminates the error prone logic in si_shader_vs recalculating this
value.

It also fixes TGSI_SEMANTIC_CLIPDIST outputs incorrectly not being
counted for VS exports. They need to be counted because they are passed
to the pixel shader as parameters as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91193
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-07-07 12:35:35 +09:00
Dave Airlie 556dd4af76 radeonsi: add support for geometry shader invocations.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-27 00:24:30 +01:00
Michel Dänzer d64adc3a79 radeonsi: Cache LLVMTargetMachineRef in context instead of in screen
Fixes a crash in genymotion with several threads compiling shaders
concurrently.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89746

Cc: 10.5 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-03-30 15:15:10 +09:00
Marek Olšák 303d23e10d radeonsi: add shader code for smoothing
The fragment shader multiplies the alpha channel with gl_SampleMaskIn.
If blending is enabled, it looks like MSAA.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-16 12:54:19 +01:00
Tom Stellard bbfa1c3239 radeonsi/compute: Use value from compiler for COMPUTE_PGM_RSRC1.FLOAT_MODE
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-03-09 13:53:33 +00:00
Marek Olšák 6c5af1dc4e radeonsi: implement polygon stippling
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-04 14:34:13 +01:00
Tom Stellard 2397a72129 radeonsi: Enable VGPR spilling for all shader types v5
v2:
  - Only emit write SPI_TMPRING_SIZE once per packet.
  - Use context global scratch buffer.

v3:
  - Patch shaders using WRITE_DATA packet instead of map/unmap.
  - Emit ICACHE_FLUSH, CS_PARTIAL_FLUSH, PS_PARTIAL_FLUSH, and
    VS_PARTIAL_FLUSH when patching shaders.

v4:
  - Code cleanups.
  - Remove unnecessary multiplies.

v5:
  - Patch shaders in system memory and re-upload to vram.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-01-28 21:03:47 +00:00
Tom Stellard 32206c5e56 radeonsi: Add radeon_shader_binary member to struct si_shader
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-01-28 21:03:46 +00:00
Marek Olšák 1829f9c928 radeonsi: enable LLVM optimizations that assume no NaNs for non-compute shaders
v2: complete rewrite

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-01-07 18:27:54 +01:00
Marek Olšák 15a7fff69a radeonsi: remove flatshade from the shader key
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-01-07 12:06:43 +01:00
Marek Olšák 161534737c radeonsi: get info about VS outputs from tgsi_shader_info
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-12-10 21:59:37 +01:00
Tom Stellard 1f4e48d5b5 radeonsi/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2
v2:
  - Drop dependency on LLVM >= 3.5.1
  - Rename si_create_shader() to si_shader_binary_read()
2014-10-31 15:24:00 -04:00
Marek Olšák 8067732740 radeonsi: remove shader->input[] and output[] arrays and dependencies
They were reinventing tgsi_shader_info. They are unused now.

radeon_llvm_context::load_input can be NULL if input fetching is implemented
in some other way.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:57 +02:00
Marek Olšák 8b057ddaea radeonsi: move param_offset out of shader->input[] and output[]
Those are going away.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:57 +02:00
Marek Olšák fa933438a2 radeonsi: use tgsi_shader_info in si_shader_ps
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:54 +02:00
Marek Olšák 34e8200599 radeonsi: don't recompile shaders when changing nr_cbufs from 0 to 1
Both cases are equivalent.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:52:07 +02:00
Marek Olšák 5e0fbe1b63 radeonsi: remove vs.ucps_enabled from the shader key
Written CLIPDIST outputs are simply disabled in PA_CL_VS_OUT_CNTL.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:52:02 +02:00
Marek Olšák a9592cd3ac radeonsi: assume ClipDistance usage mask is always 0xf
No code in Mesa sets the usage mask to any other value.
The final mask is AND'ed with enable bits from the rasterizer state anyway.

If somebody implements setting usage masks in st/mesa, we can use
tgsi_shader_info to get it more easily.

This is a prerequisite for the following commit.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:51:44 +02:00
Marek Olšák 1f6c0b55df radeonsi: set number of userdata SGPRs of GS copy shader to 4
It only needs the constant buffer with clip planes and read-write resources
for the GS->VS ring and streamout. That's 2 pointers.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-04 15:16:15 +02:00
Marek Olšák 91f1a79f78 radeonsi: make the vertex shader key smaller
We only support 16 vertex attribs, not 32.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-04 15:16:14 +02:00
Marek Olšák 10e386f4aa radeonsi: remove interp_at_sample from the key, use TGSI_INTERPOLATE_LOC_SAMPLE
st/mesa has the same flag in its shader key, we don't need to do it
in the driver anymore.

Instead, use TGSI_INTERPOLATE_LOC_SAMPLE, which is what st/mesa sets.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-04 15:16:14 +02:00
Marek Olšák 0a2d6f0c4e radeonsi: move geometry shader properties from si_shader to si_shader_selector
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-04 15:16:14 +02:00
Marek Olšák 6c9f61c97e radeonsi: remove unused variable si_shader::gs_input_prim
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-04 15:16:14 +02:00
Marek Olšák 8860584045 radeonsi: get fs_write_all from tgsi_shader_info directly
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-04 15:16:14 +02:00
Marek Olšák 5233568861 radeonsi: get tgsi_shader_info only once before compilation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-04 15:16:14 +02:00
Marek Olšák 1abb1a97b0 radeonsi: don't pass the context to the shader translator
This should prevent accessing context state there.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák e29353ff20 radeonsi: don't snoop currently-bound GS shader when compiling ES
Instead, pass the layout of GS inputs in memory to the ES using the shader
key. Only 64 bits are needed to represent the layout in the key.

Mixing and matching different VS and GS shaders should now always work.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák 2774abd4ce radeonsi: shorten si_pipe_* prefixes to si_*
This was the original naming convention in r600g and it somehow crept
into radeonsi.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák 8c37c16cbc radeonsi: merge si_pipe_shader into si_shader
One is part of the other anyway.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák dba4c5baf4 radeonsi: move DB_SHADER_CONTROL into db_render_state
I will need this for fixing sample shading with 1 sample.

The good news is that all shader pm4 states no longer use the current context
state, so we can generate the pm4 states outside of draw_vbo if needed.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák adc5797f54 radeonsi: set KILL_ENABLE during shader compilation, remove uses_kill flag
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák a34c9f70b1 radeonsi: remove shader.ps_conservative_z, set db_shader_control instead
Also set the field on SI too. It's not just specific to CIK.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák a768b43bc3 radeonsi: remove unused variable si_pipe_shader::sprite_coord_enable
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Tom Stellard b0f780345e radeonsi/compute: Add support scratch buffer support v2
The scratch buffer will be used for private memory and also register
spilling.

v2:
  - Code cleanups
2014-07-21 10:00:09 -04:00