radeonsi: remove vs.ucps_enabled from the shader key

Written CLIPDIST outputs are simply disabled in PA_CL_VS_OUT_CNTL.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák 2014-10-04 20:41:03 +02:00
parent a9592cd3ac
commit 5e0fbe1b63
3 changed files with 0 additions and 15 deletions

View File

@ -870,9 +870,6 @@ static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context * bld_base,
for (reg_index = 0; reg_index < 2; reg_index ++) {
LLVMValueRef *args = pos[2 + reg_index];
if (!(shader->key.vs.ucps_enabled & (1 << reg_index)))
continue;
shader->clip_dist_write |= 0xf << (4 * reg_index);
args[5] =
@ -1175,9 +1172,6 @@ handle_semantic:
param_count++;
break;
case TGSI_SEMANTIC_CLIPDIST:
if (!(si_shader_ctx->shader->key.vs.ucps_enabled &
(1 << semantic_index)))
continue;
shader->clip_dist_write |=
0xf << (semantic_index * 4);
target = V_008DFC_SQ_EXP_POS + 2 + semantic_index;

View File

@ -145,7 +145,6 @@ union si_shader_key {
/* The mask of "get_unique_index" bits, needed for ES,
* it describes how the ES->GS ring buffer is laid out. */
uint64_t gs_used_inputs;
unsigned ucps_enabled:2;
unsigned as_es:1;
} vs;
};

View File

@ -2193,14 +2193,6 @@ static INLINE void si_shader_selector_key(struct pipe_context *ctx,
struct si_context *sctx = (struct si_context *)ctx;
memset(key, 0, sizeof(*key));
if ((sel->type == PIPE_SHADER_VERTEX || sel->type == PIPE_SHADER_GEOMETRY) &&
sctx->queued.named.rasterizer) {
if (sctx->queued.named.rasterizer->clip_plane_enable & 0xf0)
key->vs.ucps_enabled |= 0x2;
if (sctx->queued.named.rasterizer->clip_plane_enable & 0xf)
key->vs.ucps_enabled |= 0x1;
}
if (sel->type == PIPE_SHADER_VERTEX) {
unsigned i;
if (!sctx->vertex_elements)