Commit Graph

6645 Commits

Author SHA1 Message Date
Nanley Chery 181b142fbd anv/device: Up device limits for 3D and array texture dimensions
The limit for these textures is 2048 not 1024.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-03-07 15:21:50 -08:00
Jason Ekstrand 428ffc9c13 anv/device: Actually free the CPU-side fence struct again
In 23de78768, when we switched from allocating individual BOs to using the
pool for fences, we accidentally deleted the free.
2016-03-07 14:50:52 -08:00
Kristian Høgsberg Kristensen 32aa01663f anv: Quiet pTessellationState warning
Some application pass a dummy for pTessellationState which results in a
lot of noise. Only warn if we're actually given tessellation shadear
stages.
2016-03-06 22:06:24 -08:00
Jason Ekstrand 23de78768b anv: Create fences from the batch BO pool
Applications may create a *lot* of fences, perhaps as much as one per
vkQueueSubmit.  Really, they're supposed to use ResetFence, but it's easy
enough for us to make them crazy-cheap so we might as well.
2016-03-06 14:26:52 -08:00
Jason Ekstrand 21ee5fd326 anv: Emit null render targets
v2 (Francisco Jerez): Add the state_offset to the surface state offset
2016-03-05 20:47:10 -08:00
Jason Ekstrand 8502794c12 anv/pipeline: Handle null wm_prog_data in 3DSTATE_CLIP 2016-03-05 14:42:16 -08:00
Kristian Høgsberg Kristensen 7b348ab8a0 anv: Fix rebase error 2016-03-05 14:33:50 -08:00
Kristian Høgsberg Kristensen 34326f46df anv: Turn pipeline cache on by default
Move the environment variable check to cache creation time so we block
both lookups and uploads if it's turned off.
2016-03-05 13:54:24 -08:00
Kristian Høgsberg Kristensen f2b37132cb anv: Check if shader if present before uploading to cache
Between the initial check the returns NO_KERNEL and compiling the
shader, other threads may have added the shader to the cache. Before
uploading the kernel, check again (under the mutex) that the compiled
shader still isn't present.
2016-03-05 13:54:24 -08:00
Kristian Høgsberg Kristensen 30bbe28b7e anv: Always use point size from the shader
There is no API for setting the point size and the shader is always
required to set it. Section 24.4:

   "If the value written to PointSize is less than or equal to zero, or
    if no value was written to PointSize, results are undefined."

As such, we can just always program PointWidthSource to Vertex. This
simplifies anv_pipeline a bit and avoids trouble when we enable the
pipeline cache and don't have writes_point_size in the prog_data.
2016-03-05 13:54:24 -08:00
Kristian Høgsberg Kristensen 6139fe9a77 anv: Also cache the struct anv_pipeline_binding maps
This is state the we generate when compiling the shaders and we need it
for mapping resources from descriptor sets to binding table indices.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen 584f39c65e anv: Don't re-upload shaders when merging
Using anv_pipeline_cache_upload_kernel() will re-upload the kernel and
prog_data when we merge caches. Since the kernel and prog_data is
already in the program_stream, use anv_pipeline_cache_add_entry()
instead to only add the entry to the hash table.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen 626559ed37 anv: Add anv_pipeline_cache_add_entry()
This function will grow the cache to make room and then add the entry.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen 07441c344c anv: Rename anv_pipeline_cache_add_entry() to 'set'
This function is a helper that unconditionally sets a hash table entry
and expects the cache to have enough room. Calling it 'add_entry'
suggests it will grow the cache as needed.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen 87967a2c85 anv: Simplify pipeline cache control flow a bit
No functional change, but the control flow around searching the cache
and falling back to compiling is a bit simpler.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen 2b29342fae anv: Store prog data in pipeline cache stream
We have to keep it there for the cache to work, so let's not have an
extra copy in struct anv_pipeline too.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen 37c5e70253 anv: Rename 'table' to 'hash_table' in anv_pipeline_cache
A little less ambiguous.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen c028ffea70 anv: Serialize as much pipeline cache as we can
We can serialize as much as the application asks for and just stop once
we run out of memory. This lets applications use a fixed amount of
space for caching and still get some benefit.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen cd812f086e anv: Use 1.0 pipeline cache header
The final version of the pipeline cache header adds a few more fields.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen 26ed943eb9 anv: Fix shader key hashing
This was copied from inline code to a helper and wasn't updated to hash
a pointer instead.
2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen 3baf8af947 anv: Remove excess whitespace 2016-03-05 13:50:07 -08:00
Kristian Høgsberg Kristensen ab36eae5e7 anv: Remove left-over bits of sparse-descriptor code 2016-03-05 13:50:07 -08:00
Jason Ekstrand 1afdfc3e6e anv/pipeline: Implement the depth compare EQUAL workaround on gen8+ 2016-03-05 09:59:28 -08:00
Jason Ekstrand 7c1660aa14 anv: Don't allow D16_UNORM to be combined with stencil
Among other things, this can cause the depth or stencil test to spurriously
fail when the fragment shader uses discard.
2016-03-05 09:59:28 -08:00
Jason Ekstrand 9a90176d48 anv/pipeline: Calculate the correct max_source_attr for 3DSTATE_SBE 2016-03-05 09:59:28 -08:00
Jordan Justen 81f30e2f50 anv/hsw: Move query code to genX file for Haswell
This fixes many CTS cases, but will require an update to the kernel
command parser register whitelist. (The CS GPRs and TIMESTAMP
registers need to be whitelisted.)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-05 01:08:07 -08:00
Nanley Chery 4e75f9b219 anv: Implement VK_REMAINING_{MIP_LEVELS,ARRAY_LAYERS}
v2: Subtract the baseMipLevel and baseArrayLayer (Jason)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-04 21:25:23 -08:00
Jason Ekstrand c1436e80ef anv/meta_clear: Set the right number of dynamic states 2016-03-04 19:18:20 -08:00
Jason Ekstrand cc57efc67a anv/pipeline: Fix depthBiasEnable on gen7
The first time I tried to fix this, I set the wrong fields.
2016-03-04 17:56:12 -08:00
Jason Ekstrand 653261285e anv/cmd_buffer: Reset the state streams when resetting the command buffer 2016-03-04 17:54:29 -08:00
Jason Ekstrand f700d16a89 anv/cmd_buffer: Include Haswell in set_subpass 2016-03-04 17:54:29 -08:00
Nanley Chery a6fb62a864 isl: Fix RenderTargetViewExtent for mipmapped 3D surfaces
Match the comment stated above the assignment.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-04 13:20:44 -08:00
Nanley Chery b80c8ebc45 isl: Get rid of isl_surf_fill_state_info::level0_extent_px
This field is no longer needed.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-04 13:20:03 -08:00
Jason Ekstrand d154a5ebd6 anv/cmd_buffer: Let the pipeline set StencilBufferWriteEnable on gen9 2016-03-04 12:23:01 -08:00
Jason Ekstrand f374765ce6 anv/cmd_buffer: Mask stencil reference values 2016-03-04 12:22:32 -08:00
Jason Ekstrand d61dcec64d anv/clear: Pull the stencil write mask from the pipeline
The stencil write mask wasn't getting set at all so we were using whatever
write mask happend to be left over by the application.
2016-03-04 12:03:00 -08:00
Jason Ekstrand ec18fef88d anv/pipeline: Set StencilBufferWriteEnable from the pipeline
The hardware docs say that StencilBufferWriteEnable should only be set if
StencilTestEnable is set.  It seems reasonable to set them together.
2016-03-04 12:03:00 -08:00
Jason Ekstrand fcd8e57185 anv/pipeline: More competent gen8 clipping 2016-03-04 12:03:00 -08:00
Jason Ekstrand a8afd29653 anv/pipeline: Use the right provoking vertex for triangle fans 2016-03-04 12:03:00 -08:00
Jason Ekstrand fa8539dd6b anv/pipeline: Respect pRasterizationState->depthBiasEnable 2016-03-04 12:03:00 -08:00
Kenneth Graunke 9d7faadd8a anv: Fix backwards shadow comparisons
sample_c is backwards from what GL and Vulkan expect.

See intel_state.c in i965.

v2: Drop unused vk_to_gen_compare_op.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-03-04 11:35:46 -08:00
Kenneth Graunke 3ed260f54c hack to make dota 2 menus work 2016-03-03 16:21:09 -08:00
Jason Ekstrand 56ba13c994 isl/surface_state: Set L2 bypass disable for certain BC* formats 2016-03-03 16:16:57 -08:00
Kenneth Graunke 623ce595a9 anv: Compile shader stages in pipeline order.
Instead of the arbitrary order modules might be specified in.

Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:36:19 -08:00
Nanley Chery 8dddc3fb1e anv/meta: Delete unused functions
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:26:44 -08:00
Nanley Chery d20f6abc85 anv/meta: Use blitter API for state-handling in Buffer Update/Copy
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:26:42 -08:00
Nanley Chery 318b67d157 anv/meta: Use blitter API in do_buffer_copy()
v2: Keep pitch in units of bytes (Jason)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:26:36 -08:00
Nanley Chery 96ff4d0679 anv/meta: Use blitter API in anv_CmdCopyImage()
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:26:35 -08:00
Nanley Chery 9b6c95d46e anv/meta: Use blitter API for copies between Images and Buffers
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:25:20 -08:00
Nanley Chery 91640c34c6 anv/meta: Add function which copies between Buffers and Images
v2: Keep pitch in units of bytes (Jason)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:25:15 -08:00
Nanley Chery 61ad78d0d1 anv/meta: Add function to create anv_meta_blit2d_surf from anv_image
v2: Keep pitch in units of bytes (Jason)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:25:10 -08:00
Nanley Chery 2e9b08b9b8 anv/meta: Implement the blitter API functions
Most of the code in anv_meta_blit2d() is borrowed from do_buffer_copy().

Create an image and image view for each rectangle.
Note: For tiled RGB images, ISL will align the image's row_pitch up to
the nearest tile width.

v2 (Jason):
    Keep pitch in units of bytes
    Make src_format and dst_format variables
    s/dest/dst/ in every usage
v3: Fix dst_image width

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:25:04 -08:00
Nanley Chery 032bf172b4 anv/meta: Modify blitter API fields
Some fields are unnecessary. The variables "pitch" and "bs" are used
for consistency with ISL.

v2: Keep pitch in units of bytes (Jason)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:24:53 -08:00
Jason Ekstrand 654f79a045 anv/meta: Add the beginnings of a blitter API
This API is designed to be an abstraction that sits between the VkCmdCopy
commands and the hardware.  The idea is that it is simple enough that it
*should* be implementable using the blitter but with enough extra data that
we can implement it with the 3-D pipeline efficiently.  One design
objective is to allow the user to supply enough information that we can
handle most blit operations with a single draw call even if they require
copying multiple rectangles.
2016-03-03 11:24:45 -08:00
Nanley Chery d1e48b9945 anv/meta: Remove redundancies in do_buffer_copy()
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:24:42 -08:00
Nanley Chery cfe7036750 anv/meta: Replace copy_format w/ block size in do_buffer_copy()
This is a preparatory commit that will simplify the future usage of
this function.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:24:38 -08:00
Nanley Chery d50ff250ec anv/meta: Add missing command to exit meta in anv_CmdUpdateBuffer()
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:24:21 -08:00
Nanley Chery 1d9d90d9a6 anv/image: Create a linear image when requested
If a linear image is requested, the only possible result should be a
linearly-tiled surface.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:24:17 -08:00
Nanley Chery 091f1da902 isl: Don't filter tiling flags if a specific tiling bit is set
If a specific bit is set, the intention to create a surface with a
specific tiling format should be respected.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:23:40 -08:00
Nanley Chery 456f5b0314 isl: Add function to get intratile offsets from x/y offsets
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 10:56:15 -08:00
Jason Ekstrand 206414f92e anv/util: Fix vector resizing
It wasn't properly handling the fact that wrap-around in the source may not
translate to wrap-around in the destination.  This really needs unit tests.
2016-03-03 08:17:36 -08:00
Jordan Justen 98cdce1ce4 anv/gen7: Use predicated rendering for indirect compute
For OpenGL, see commit 9a939ebb47.

Fixes:
 * dEQP-VK.compute.indirect_dispatch.upload_buffer.empty_command
 * dEQP-VK.compute.indirect_dispatch.gen_in_compute.empty_command

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-02 12:03:05 -08:00
Jordan Justen da4745104c anv: Save batch to local variable for indirect compute
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-02 12:03:05 -08:00
Jason Ekstrand b0867ca4b2 anv: Fix make check 2016-03-02 11:45:29 -08:00
Jason Ekstrand 2168082a48 isl: Fix make check 2016-03-02 11:31:22 -08:00
Jason Ekstrand 8f5a64e44f gen8/cmd_buffer: Properly return flushed push constant stages
This is required on SKL so that we can properly re-emit binding table
pointers commands.
2016-03-02 10:48:40 -08:00
Jason Ekstrand 5b70aa11ee anv/meta_blit: Use unorm formats for 8 and 16-bit RGB and RGBA values
While Broadwell is very good about UINT formats, HSW is more restrictive.
Neither R8G8B8_UINT nor R16G16B16_UINT really exist on HSW.  It should be
safe to just use the unorm formats.
2016-03-01 21:45:20 -08:00
Kenneth Graunke 89e421369c Merge remote-tracking branch 'origin/master' into vulkan 2016-03-01 17:11:29 -08:00
Jason Ekstrand e941fd8470 genxml: Make the border color pointer consistent across gens 2016-03-01 14:43:05 -08:00
Jason Ekstrand eecd1f8001 gen7/pipeline: Add competent blending
This is mostly a copy-and-paste from gen8.  Blending still isn't 100% but
it fixes about 1100 CTS blend tests on HSW.
2016-03-01 13:51:58 -08:00
Jason Ekstrand 8b091deb5e anv: Unify gen7 and gen8 state
Now that we've pulled surface state setup into ISL, there's not much to do
here.
2016-03-01 12:17:23 -08:00
Jason Ekstrand 6e20c1e058 anv/cmd_buffer: Look at both sides for stencil enable
Now it's all consistent with gen9
2016-03-01 11:03:29 -08:00
Jason Ekstrand 4cfdd16500 anv/cmd_buffer: Clean up stencil state setup on gen7 2016-03-01 11:02:21 -08:00
Jason Ekstrand bb08d86efe anv/cmd_buffer: Clean up stencil state setup on gen8 2016-03-01 10:58:43 -08:00
Kristian Høgsberg Kristensen 22d8666d74 anv: Add in image->offset when setting up depth buffer
Fix from Neil Roberts.

https://bugs.freedesktop.org/show_bug.cgi?id=94348
2016-03-01 09:19:39 -08:00
Jason Ekstrand 38f4c11c2f anv/pipeline: Pull 3DSTATE_SBE into a shared helper 2016-03-01 08:46:32 -08:00
Jason Ekstrand 3f8df795c1 genxml: Break output detail of 3DSTATE_SBE on gen7 into a struct
This makes it work like 3DSTATE_SBE_SWIZ on gen8+ which is much more
convenient.
2016-02-29 16:47:42 -08:00
Jason Ekstrand 097564bb8e anv/cmd_buffer: Dirty push constants when changing pipelines. 2016-02-29 14:36:24 -08:00
Jason Ekstrand d29fd1c7cb anv/cmd_buffer: Re-emit push constants packets for all stages 2016-02-29 14:36:24 -08:00
Jason Ekstrand 9715724015 anv/pipeline: Follow push constant alignment restrictions on BDW+ and HSW gt3 2016-02-29 14:36:24 -08:00
Jason Ekstrand 6986ae35ad anv/pipeline: Avoid a division by zero 2016-02-29 14:36:24 -08:00
Jason Ekstrand 51b618285d anv/pipeline: Use dynamic checks for max push constants
The GEN_GEN macros aren't available in anv_pipeline since it only gets
compiled once for the whold driver.
2016-02-29 14:36:24 -08:00
Nanley Chery 74b7b59db5 isl/surface_state: Fix array spacing on Gen7
v2: Don't cast the enum to a boolean (Jason)

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-02-29 11:43:33 -08:00
Kristian Høgsberg Kristensen 9d8bae6137 anv: Don't advertise pipelineStatisticsQuery
We don't support that just yet.

Reported-by: Jacek Konieczny <jajcus@jajcus.net>
2016-02-29 10:55:39 -08:00
Jordan Justen 635c0e92b7 anv: Set CURBEAllocationSize in MEDIA_VFE_STATE
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-02-28 11:54:49 -08:00
Jordan Justen 1af5dacd76 anv/gen7: Enable SLM in L3 cache control register
Port 1983003 to gen7.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-02-28 11:54:49 -08:00
Jordan Justen 72efb68d48 anv/pipeline: Set URB offset to zero if size is zero
After 3ecd357d81, it may be possible for
the VS to get assigned all of the URB space.

On Ivy Bridge, this will cause the offset for the other stages to be
16, which cannot be packed into the ConstantBufferOffset field of
3DSTATE_PUSH_CONSTANT_ALLOC_*.

Instead we can set the offset to zero if the stage size is zero.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-02-28 10:51:38 -08:00
Jordan Justen ef06ddb08a anv/pipeline: Set FS URB space to zero if the FS is unused
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-02-28 10:51:38 -08:00
Jordan Justen 45d8ce07a5 anv/pipeline: Set stage URB size to zero if it is unused
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-02-28 10:49:39 -08:00
Jason Ekstrand 46b7c242da anv/gen7: Clean up the dummy PS case
Fix whitespace and remove dead comments
2016-02-27 11:24:09 -08:00
Jason Ekstrand e18a2f037a anv/gen7: Set MaximumNumberofThreads in the dummy PS packet 2016-02-27 11:23:56 -08:00
Jason Ekstrand ad50896c87 anv/gen7: Only try to get the depth format the surface has depth 2016-02-27 11:23:18 -08:00
Jason Ekstrand 4b34f2ccb8 anv/image: Use isl for filling brw_image_param 2016-02-27 10:26:14 -08:00
Jason Ekstrand bd6470fa6c isl: Add helpers for filling out brw_image_param 2016-02-27 10:26:14 -08:00
Jason Ekstrand 7363024cbd anv: Fill out image_param structs at view creation time 2016-02-27 10:26:14 -08:00
Jason Ekstrand e9d126f23b anv/image: Add a ussage_mask field to image_view_init
This allows us to avoid doing some unneeded work on the meta paths where we
know that the image view will be used for exactly one thing.  The meta
paths also sometimes do things that aren't quite valid like setting the
array slice on a 3-D texture and we want to limit the number of paths that
need to be able to sensibly handle the lies.
2016-02-27 10:26:14 -08:00
Jason Ekstrand b4c16fd01a isl: Move isl_image.c to isl_storage_image.c 2016-02-27 10:26:14 -08:00
Jason Ekstrand eb19d640eb anv: Use isl to fill buffer surface states 2016-02-27 10:26:14 -08:00
Jason Ekstrand a0cd20eb7f isl: Add a helper for filling a buffer surface state 2016-02-27 10:26:14 -08:00
Jason Ekstrand 9d5b8f7709 anv: Remove unneeded fiels from anv_image_view 2016-02-27 10:26:14 -08:00
Jason Ekstrand b70a8d40fa anv/state: Remove unused fill_surface_state functions 2016-02-27 10:26:14 -08:00
Jason Ekstrand ded57c3cca anv: Use ISL to fill out surface states 2016-02-27 10:26:14 -08:00
Jason Ekstrand 4a9b805ce5 anv/device: Store the default MOCS in the device 2016-02-27 10:26:13 -08:00
Jason Ekstrand d798762cdb isl: Add a function for filling out a surface state 2016-02-27 10:26:13 -08:00
Jason Ekstrand 6b06072ba8 isl: Create per-gen helper libraries for gens 7, 8, and 9 2016-02-27 10:26:13 -08:00
Jason Ekstrand 82d2db80bb genxml: Add MOCS fields to RENDER_SURFACE_STATE
This allows us to set MOCS as a single uint32_t on all platforms.
2016-02-27 10:26:13 -08:00
Jason Ekstrand 452782f68b gen/genX_pack: Add genxml to the pack header path
If you have an out-of-tree build, gen8_pack.h and friends will not be in
the same folder as genX_pack.h so this will be a problem.  We fixed
out-of-tree earlier by adding the genxml folder to the includes for the
vulkan driver.  However, this is not a good long-term solution because we
want to use it in ISL as well.
2016-02-27 10:26:13 -08:00
Nanley Chery 265d4c415c isl: Fix isl_surf_get_image_intratile_offset_el()
Consecutive tiles are separated by the size of the tile, not by the
logical tile width.

v2: Remove extra subtraction (Ville)
    Add parenthesis (Jason)
v3: Update the unit tests for the function

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-02-26 16:59:36 -08:00
Thomas Hindoe Paaboel Andersen 6bb6b5c341 anv: remove stray ; after if
Both logic and indentation suggests that the ; were not intended here.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-02-26 16:05:28 -08:00
Jason Ekstrand b7bc52b5b1 anv/gen8: Emit the 3DSTATE_PS_BLEND packet 2016-02-26 16:04:48 -08:00
Jason Ekstrand c32273d246 anv/device: Properly handle apiVersion == 0
From the Vulkan 1.0 spec section 3.2:

"If apiVersion is 0 the implementation must ignore it"
2016-02-25 08:52:37 -08:00
Kristian Høgsberg Kristensen 25c2470b24 anv: Set max_hs_threads/max_ds_threads 2016-02-24 12:21:26 -08:00
Kenneth Graunke 3ecd357d81 anv: Allocate more push constant space.
Previously we allocated 4kB of push constant space for VS, GS, and PS
(for a total of 12kB) no matter what.  This works, but doesn't fully
utilize the space - we have 16kB or 32kB of space.

This makes anv use the same method as brw - divide up the space evenly
among all active shader stages.  This means HS and DS would get space,
if those shader stages existed.

In the future, we can probably do better by inspecting how many push
constants each shader stage uses, and weight things accordingly.  But
this is strictly better than the old code, and ideally we'd justify
a fancier solution with actual performance data.
2016-02-24 11:22:05 -08:00
Kenneth Graunke 3f11517730 anv: Properly size the push constant L3 area.
We were assuming it was 32kB everywhere, reducing the available URB
space.  It's actually 16kB on Ivybridge, Baytrail, and Haswell GT1-2.
2016-02-24 11:13:08 -08:00
Kenneth Graunke 7f9b03cc8b anv: Emit 3DSTATE_PUSH_CONSTANT_ALLOC_* via a loop.
Now we're emitting HS and DS packets as well.
2016-02-24 11:13:08 -08:00
Kenneth Graunke 1024a66fc4 anv: Emit 3DSTATE_URB_* via a loop.
Rather than keeping separate {vs,hs,ds,gs}_start fields, we now store an
array indexed by the shader stage (MESA_SHADER_*).  The 3DSTATE_URB_*
commands are also sequentially numbered.  This makes it easy to just
emit them in a loop.

This simplifies the code a little, and also will make it easier to add
more credible HS and DS code later.
2016-02-24 11:13:02 -08:00
Jason Ekstrand f0f7cc22f3 anv/descriptor_set: Use the correct size for the descriptor pool
The descriptor sizes array gives the total number of each type of
descriptor that will ever be allocated from the pool, not the total amount
that may be in any particular set.  In our case, this simply means that we
have to sum a bunch of things up and there we go.
2016-02-23 21:25:37 -08:00
Jason Ekstrand bd3db3d665 anv/meta: Allocate descriptor pools on-the-fly
We can't use a global descriptor pool like we were because it's not
thread-safe.  For now, we'll allocate them on-the-fly and that should work
fine.  At some point in the future, we could do something where we
stack-allocate them or allocate them out of one of the state streams.
2016-02-23 17:04:19 -08:00
Jason Ekstrand bfbb238dea anv/descriptor_set: Set descriptor type for immuatable samplers 2016-02-22 21:39:14 -08:00
Jason Ekstrand 64e1c84059 intel/genxml: Update macro documentation 2016-02-22 21:20:04 -08:00
Jason Ekstrand ae619a0355 anv/state: Replace a bunch of ANV_GEN with GEN_GEN 2016-02-22 19:19:00 -08:00
Jason Ekstrand 442dff8cf4 anv/descriptor_set: Stop marking everything as having dynamic offsets 2016-02-22 17:23:29 -08:00
Kristian Høgsberg Kristensen 2570a58bcd anv: Implement descriptor pools
Descriptor pools are an optimization that lets applications allocate
descriptor sets through an externally synchronized object (that is,
unlocked).  In our case it's also plugging a memory leak, since we
didn't track all allocated sets and failed to free them in
vkResetDescriptorPool() and vkDestroyDescriptorPool().
2016-02-22 17:13:51 -08:00
Kristian Høgsberg Kristensen 353d5bf286 anv/x11: Free swapchain images and memory on destroy 2016-02-22 16:23:47 -08:00
Mark Janes 08b408311c vulkan: fix out-of-tree builds 2016-02-22 11:31:15 -08:00
Kristian Høgsberg Kristensen f843aabdd4 intel/genxml: Add README
I've had people ask about the design of the pack functions, for example,
why aren't we using bitfields. I wrote up a bit of background on why and
how we ended up with the current design and we might as well keep that
with the code.
2016-02-22 09:14:25 -08:00
Nanley Chery 7b2c63a53c anv/meta_blit: Handle compressed textures in anv_CmdCopyImage
As with anv_CmdCopyBufferToImage, compressed textures require special
handling during copies.

Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2016-02-22 09:04:28 -08:00
Jason Ekstrand f1dddeadc2 anv: Fix a typo in apply_dynamic_offsets
shader->num_uniforms is in terms of bytes in i965.
2016-02-20 21:24:31 -08:00
Jason Ekstrand b5868d2343 anv: Zero out the WSI array when initializing the instance 2016-02-20 19:30:14 -08:00
Jason Ekstrand bc696f1db6 isl: Stop including mesa/main/imports.h
It pulls in all sorts of stuff we don't want.
2016-02-20 10:35:25 -08:00
Jason Ekstrand 853fc3e431 genxml: Add mote includes in the generated headers 2016-02-20 09:33:20 -08:00
Jason Ekstrand 1f1cf6fcb0 anv: Get rid of GENX_FUNC
It was a bad idea.
2016-02-20 09:12:38 -08:00
Jason Ekstrand 371b4a5b33 anv: Switch over to the macros in genxml 2016-02-20 09:09:28 -08:00
Jason Ekstrand 0d76aa9485 intel/genxml: Add a couple of helper headers 2016-02-20 08:35:36 -08:00
Jason Ekstrand 2b85807458 genxml: Stop using unicode in the pack generator
This causes python problems and problems when people don't have a locale
set properly in their shell.
2016-02-19 08:05:35 -08:00
Dave Airlie 1375cb3c27 anv: fix warning about unused width variable.
We don't use width outside the debug clause here.
2016-02-19 08:01:54 -08:00
Jason Ekstrand 698ea54283 anv/pipeline: Fix a typo in the pipeline layout code 2016-02-18 13:55:57 -08:00
Jason Ekstrand d5bb23156d anv/allocator: Set is_winsys_bo to false for block pool BOs 2016-02-18 13:55:57 -08:00
Mark Janes 1b37276467 vulkan: fix out-of-tree build
We need to be able to find the generated gen*pack.h headers.

Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-02-18 12:30:27 -08:00
Jason Ekstrand e0565f40ea anv/pipeline: Use nir's num_images for allocating image_params 2016-02-18 11:44:26 -08:00
Jason Ekstrand e881c73975 anv/pipeline: Don't leak the binding map 2016-02-18 11:09:30 -08:00
Jason Ekstrand 8c23392c26 anv/formats: Don't use a compound literal to initialize a const array
Doing so makes older versions of GCC rather grumpy.  Newere GCC fixes this,
but using a compound literal isn't really gaining us anything anyway.
2016-02-18 10:44:08 -08:00
Jason Ekstrand 9851c8285f Move the intel vulkan driver to src/intel/vulkan 2016-02-18 10:37:59 -08:00
Jason Ekstrand 47b8b08612 Move isl to src/intel 2016-02-18 10:34:47 -08:00
Jason Ekstrand f6d9587688 vulkan: Move XML and generator into src/intel/genxml 2016-02-18 10:30:29 -08:00