anv/image: Use isl for filling brw_image_param
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@ -630,8 +630,9 @@ anv_image_view_init(struct anv_image_view *iview,
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iview->bo->size - iview->offset, 1);
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}
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anv_image_view_fill_image_param(device, iview,
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&iview->storage_image_param);
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isl_surf_fill_image_param(&device->isl_dev,
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&iview->storage_image_param,
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&surface->isl, &isl_view);
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if (!device->info.has_llc)
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anv_state_clflush(iview->storage_surface_state);
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@ -737,8 +738,9 @@ anv_CreateBufferView(VkDevice _device,
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(storage_format == ISL_FORMAT_RAW ? 1 :
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format->isl_layout->bs));
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anv_buffer_view_fill_image_param(device, view,
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&view->storage_image_param);
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isl_buffer_fill_image_param(&device->isl_dev,
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&view->storage_image_param,
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view->format, view->range);
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} else {
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view->storage_surface_state = (struct anv_state){ 0 };
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}
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@ -817,110 +819,3 @@ anv_image_get_surface_for_aspect_mask(struct anv_image *image, VkImageAspectFlag
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return NULL;
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}
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}
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static void
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image_param_defaults(struct brw_image_param *param)
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{
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memset(param, 0, sizeof *param);
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/* Set the swizzling shifts to all-ones to effectively disable swizzling --
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* See emit_address_calculation() in brw_fs_surface_builder.cpp for a more
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* detailed explanation of these parameters.
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*/
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param->swizzling[0] = 0xff;
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param->swizzling[1] = 0xff;
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}
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void
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anv_image_view_fill_image_param(struct anv_device *device,
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struct anv_image_view *view,
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struct brw_image_param *param)
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{
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image_param_defaults(param);
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const struct isl_surf *surf = &view->image->color_surface.isl;
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const int cpp = isl_format_get_layout(surf->format)->bs;
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const struct isl_extent3d image_align_sa =
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isl_surf_get_image_alignment_sa(surf);
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param->size[0] = view->extent.width;
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param->size[1] = view->extent.height;
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if (surf->dim == ISL_SURF_DIM_3D) {
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param->size[2] = view->extent.depth;
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} else {
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param->size[2] = surf->logical_level0_px.array_len - view->base_layer;
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}
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isl_surf_get_image_offset_el(surf, view->base_mip, view->base_layer, 0,
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¶m->offset[0], ¶m->offset[1]);
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param->stride[0] = cpp;
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param->stride[1] = surf->row_pitch / cpp;
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if (device->info.gen < 9 && surf->dim == ISL_SURF_DIM_3D) {
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param->stride[2] = util_align_npot(param->size[0], image_align_sa.w);
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param->stride[3] = util_align_npot(param->size[1], image_align_sa.h);
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} else {
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param->stride[2] = 0;
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param->stride[3] = isl_surf_get_array_pitch_el_rows(surf);
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}
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switch (surf->tiling) {
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case ISL_TILING_LINEAR:
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/* image_param_defaults is good enough */
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break;
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case ISL_TILING_X:
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/* An X tile is a rectangular block of 512x8 bytes. */
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param->tiling[0] = util_logbase2(512 / cpp);
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param->tiling[1] = util_logbase2(8);
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if (device->isl_dev.has_bit6_swizzling) {
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/* Right shifts required to swizzle bits 9 and 10 of the memory
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* address with bit 6.
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*/
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param->swizzling[0] = 3;
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param->swizzling[1] = 4;
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}
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break;
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case ISL_TILING_Y0:
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/* The layout of a Y-tiled surface in memory isn't really fundamentally
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* different to the layout of an X-tiled surface, we simply pretend that
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* the surface is broken up in a number of smaller 16Bx32 tiles, each
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* one arranged in X-major order just like is the case for X-tiling.
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*/
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param->tiling[0] = util_logbase2(16 / cpp);
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param->tiling[1] = util_logbase2(32);
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if (device->isl_dev.has_bit6_swizzling) {
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/* Right shift required to swizzle bit 9 of the memory address with
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* bit 6.
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*/
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param->swizzling[0] = 3;
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param->swizzling[1] = 0xff;
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}
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break;
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default:
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assert(!"Unhandled storage image tiling");
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}
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/* 3D textures are arranged in 2D in memory with 2^lod slices per row. The
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* address calculation algorithm (emit_address_calculation() in
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* brw_fs_surface_builder.cpp) handles this as a sort of tiling with
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* modulus equal to the LOD.
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*/
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param->tiling[2] = (device->info.gen < 9 && surf->dim == ISL_SURF_DIM_3D ?
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view->base_mip : 0);
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}
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void
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anv_buffer_view_fill_image_param(struct anv_device *device,
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struct anv_buffer_view *view,
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struct brw_image_param *param)
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{
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image_param_defaults(param);
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param->stride[0] = isl_format_layouts[view->format].bs;
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param->size[0] = view->range / param->stride[0];
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}
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