Commit Graph

62410 Commits

Author SHA1 Message Date
Michel Dänzer 6ac5a5e383 r600g/radeonsi: Map transfer staging texture unsynchronized when possible
The transfer staging texture is always freshly allocated, so for write-only
transfers we don't need to explicitly wait for the BO to become idle.

Squeezes a few hundered MB/s more out of x11perf -shmput500 with glamor.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-04-16 12:11:27 +09:00
Matt Turner 9fed627234 Revert "i965/fs: Only sweep NOPs if register coalescing made progress."
This reverts commit f092e8951c.

Didn't mean to push this...
2014-04-15 17:27:55 -07:00
Matt Turner f092e8951c i965/fs: Only sweep NOPs if register coalescing made progress.
Otherwise there's nothing to do.
2014-04-15 16:28:04 -07:00
Eric Anholt 7ae870211d i965: Fix buffer overruns in MSAA MCS buffer clearing.
This manifested as rendering failures or sometimes GPU hangs in
compositors when they accidentally got MSAA visuals due to a bug in the X
Server.  Today we decided that the problem in compositors was equivalent
to a corruption bug we'd noticed recently in resizing MSAA-visual
glxgears, and debugging got a lot easier.

When we allocate our MCS MT, libdrm takes the size we request, aligns it
to Y tile size (blowing it up from 300x300=900000 bytes to 384*320=122880
bytes, 30 pages), then puts it into a power-of-two-sized BO (131072 bytes,
32 pages).  Because it's Y tiled, we attach a 384-byte-stride fence to it.
When we memset by the BO size in Mesa, between bytes 122880 and 131072 the
data gets stored to the first 20 or so scanlines of each of the 3 tiled
pages in that row, even though only 2 of those pages were allocated by
libdrm.  In the glxgears case, the missing 3rd page happened to
consistently be the static VBO that got mapped right after the first MCS
allocation, so corruption only appeared once window resize made us throw
out the old MCS and then allocate the same BO to back the new MCS.

Instead, just memset the amount of data we actually asked libdrm to
allocate for, which will be smaller (more efficient) and not overrun.
Thanks go to Kenneth for doing most of the hard debugging to eliminate a
lot of the search space for the bug.

Cc: "10.0 10.1" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77207
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 14:34:47 -07:00
Eric Anholt e5b86cb64b meta: Add support for MSAA resolves from 2D_MS_ARRAY textures.
We don't have any piglit tests for this currently.

v2: Use vec3s for the texcoords so it has some hope of working.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 14:34:45 -07:00
Eric Anholt 234db60954 meta: Add an accelerated glCopyTexSubImage using glBlitFramebuffer.
You'll note from the previous commits that there's something of a loop
here: You call CTSI, which calls BlitFB, then if things go wrong that
falls back to CTSI.  As a result, meta CTSI reaches over into blitfb to
tell it "no, don't try that fallback".

v2: Drop the _mesa_update_state(), which was only necessary due to use of
    _mesa_clip_blit() in _mesa_meta_BlitFramebuffer() in another patch
    series.
v3: Drop an _EXT suffix I copy-and-pasted.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v2)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 14:34:22 -07:00
Eric Anholt 70961c032f meta: Add support for CUBE_MAP_ARRAY to generatemipmap.
I added support to bind_fbo_image in the process of building meta
CopyTexSubImage, and found that it broke generatemipmap because previously
we would just throw a GL error there and then end up with an incomplete
FBO and fallback.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 14:34:22 -07:00
Eric Anholt bb3f983d10 meta: Infer bind_fbo_image parameters from an incoming image.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 14:34:22 -07:00
Eric Anholt cd808ac848 meta: Move bind_fbo_image() code back to meta.c, to reuse it elsewhere.
I need to do the same code again for CopyTexSubImage().

v2: Drop incorrect, not-terribly-useful comment (review by Ken)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 14:34:22 -07:00
Eric Anholt 4cc42805e7 meta: Refactor the BlitFramebuffer depth CopyTexImage fallback.
This avoids a ReadPixels() if there's accelerated CopyTexImage present.
It now requires GLSL as opposed to just fragment programs, but we don't
have any drivers that do ARB_fp but not GLSL.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 14:34:22 -07:00
Eric Anholt b702233f53 meta: Refactor the BlitFramebuffer color CopyTexImage fallback.
There shouldn't be anything special about copying out a subset of the src
rb to a temp before texturing from it, so just do it when we're figuring
out our src texture binding.

This drops Anuj's change to copy an extra border of 1 pixel around the src
area.  I can't see how that change could be valid, and presumably if
there's some filtering problem at edges we just need to set the right
wrap mode.

v2: Don't fall back to swrast on non-2D/RECT/2D_MS textures when we can
    still CopyTexSubImage.  Fixes a segfault regression on i965 with
    gl-3.2-layered-rendering-blit.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-04-15 14:34:06 -07:00
Eric Anholt 4e43299633 meta: Drop blit src size fallback.
I think we can assert that renderbuffer size is <= maximum 2D texture
size.  Our source coordinates should have already been clipped to the src
renderbuffer size, but haven't actually (so we could potentially have
trouble if there's scaling, and we're in the CopyTexImage path that tries
to use src size).  However, this texture size dependency was blocking the
next refactors, so I'm not sure if we want to go ahead with this series
before we get the clipping sorted out or not.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 12:27:37 -07:00
Mike Stroyan 602510395a i965: Avoid dependency hints on math opcodes
Putting NoDDClr and NoDDChk dependency control on instruction
sequences that include math opcodes can cause corruption of channels.
Treat math opcodes like send opcodes and suppress dependency hinting.

Signed-off-by: Mike Stroyan <mike@LunarG.com>
Tested-by: Tony Bertapelli <anthony.p.bertapelli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-15 10:31:46 -07:00
Matt Turner ad48a9a319 i965: Expand INTEL_DEBUG to uint64_t.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 10:29:00 -07:00
Matt Turner 58db339599 dri: Expand driParseDebugString return value to uint64_t.
Users will downcast if they don't have >32 debug flags.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-15 10:28:57 -07:00
Matt Turner 73400d8f70 i965/fs: Remove dead_code_eliminate_local().
Subsumed by the new dead_code_eliminate() function. No shader-db
changes.

Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-15 09:25:47 -07:00
Matt Turner 18d12336b9 i965/fs: Clear variable from live-set if it's completely overwritten.
One program affected:

instructions in affected programs:     246 -> 244 (-0.81%)

Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-15 09:25:44 -07:00
Matt Turner f34f39330b i965/fs: Reimplement dead_code_elimination().
total instructions in shared programs: 1653399 -> 1651790 (-0.10%)
instructions in affected programs:     92157 -> 90548 (-1.75%)
GAINED:                                2
LOST:                                  2

Also significantly reduces the number of optimization loop iterations:

total loop iterations in shared programs: 39724 -> 31651 (-20.32%)
loop iterations in affected programs:     21617 -> 13544 (-37.35%)

Including some great pathological cases, like 29 -> 3 in Strike Suit
Zero and 24 -> 3 in Dota2.

Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-15 09:25:11 -07:00
Matt Turner 596737ee91 i965/vec4: Let DCE eliminate dead writes in other basic blocks.
We previously stopped searching for unread writes after encountering
control flow, but we can instead just search backwards until we hit
control flow.

instructions in affected programs:     22854 -> 22194 (-2.89%)
2014-04-15 09:24:09 -07:00
Matt Turner 4dcfb92417 i965/gs: Add dummy source to prepare_channel_masks instruction.
The generator uses its destination as a source implicitly, which breaks
some assumptions in dead code elimination. Giving the instruction a
source allows us to reason about it better.
2014-04-15 09:24:09 -07:00
Matt Turner d877c643be glsl: Use M_PI_* macros.
Notice our multiple values for M_PI_2, which rounded ...32 up to
...4 and ...5.
2014-04-15 09:24:09 -07:00
Kenneth Graunke 4f20b7d3dd i965: Disable Z16 in all APIs.
We originally thought that GL 3.0 required GL_DEPTH_COMPONENT16 to map
exactly to Z16.  However, we misread the specification, thanks in part
to LaTeX reordering the tables in the PDF.

Page 180 of the GL 3.0 specification (glspec30.20080923.pdf) says:
"[...] memory allocation per texture component is assigned by the GL to
match the allocations listed in tables 3.16-3.18 as closely as possible.
[...]

Required Texture Formats
[...]
In addition, implementations are required to support the following sized
internal formats.  Requesting one of these internal formats for any
texture type will allocate exactly the internal component sizes and
types shown for that format in tables 3.16-3.17:"

Notably, however, GL_DEPTH_COMPONENT16 does /not/ appear in table 3.16
or table 3.17.  It appears in table 3.18, where the "exact" rule doesn't
apply, and it falls back to the "closely as possible" rule.

The confusing part is that the ordering of the tables in the PDF is:

Table 3.16 (pages 182-184)
Table 3.18 (bottom of page 184 to top of 185)
Table 3.17 (page 185)

Presumably, people saw table 3.16, then saw the table immediately
following with DEPTH_COMPONENT* formats, and assumed it was 3.17.

Based on a patch by Chia-I Wu, but without the driconf option to force
Z16 to be used.  It's not required, and there's apparently no benefit
to actually using it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chia-I Wu <olv@lunarg.com>
2014-04-15 02:15:11 -07:00
Kenneth Graunke be000b4d19 i965: Update comments about Z16 being slow.
We've learned a few things since we originally disabled Z16; this attempts
to summarize the issue.  I am no expert on this subject, though, so the
comment may not be totally accurate.

I did some benchmarking on GM45 and Ironlake, and discovered that for
GLBenchmark 2.7 EgyptHD, using Z16 was 3% slower on GM45 (n=15), and
4.5% slower on Ironlake (n=95).  So, we can drop the "on Ivybridge"
aspect of the comment - it's always slower.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chia-I Wu <olv@lunarg.com>
2014-04-15 02:15:11 -07:00
Michel Dänzer 313104e8d5 r600g/radeonsi: Use caching buffer manager for textures as well
Significantly reduces BO allocation / destruction overhead for transfers,
e.g. measurable via x11perf -shm{ge,pu}t* with glamor.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-04-15 11:34:56 +09:00
Jordan Justen 24c773fb06 i965/gen8: add debug code to show FS disasm with jump locations
Copied from similar code in gen8_vec4_generator.cpp.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-14 10:32:42 -07:00
Chia-I Wu 73a4761058 ilo: remove GPE state size estimation
Use size defines from genhw.
2014-04-14 20:45:04 +08:00
Chia-I Wu 8fa8e9b1b8 ilo: remove GPE command size estimation
Use size defines from genhw.
2014-04-14 20:45:04 +08:00
Chia-I Wu bdd0546d7c ilo: remove unused headers
Remove intel_*.h.  brw_*.h is still needed by the state dumper and
disassembler.
2014-04-14 20:45:04 +08:00
Chia-I Wu e55e1610e5 ilo: use only defines from genhw headers
Stop including classic driver headers in genhw.h, with some formatting fixes.
2014-04-14 20:45:04 +08:00
Chia-I Wu 6c6bd796ad ilo: scripted conversion to genhw headers
Hopefully my four hundred line sed script is correct.
2014-04-14 20:45:04 +08:00
Chia-I Wu 01e3e82a56 ilo: add genhw headers
All except genhw.h are generated by https://github.com/olvaffe/envytools/.
intel_chipset.h is deprecated.
2014-04-14 20:45:03 +08:00
Chia-I Wu d75a8799fd ilo: avoid brw_wm_barycentric_interp_mode in compiler
In preparation for genhw.
2014-04-14 20:45:03 +08:00
Chia-I Wu ad39b991ce ilo: add TOY_OPCODE_DO
We used to give BRW_OPCODE_DO a special meaning, while we should have used
TOY_OPCODE_DO.
2014-04-14 20:45:03 +08:00
Vinson Lee 36fb36aa36 gtest: Update to 1.7.0.
This patch fixes gtest build errors on Mac OS X 10.9.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73106
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
2014-04-14 00:06:53 -07:00
Chris Forbes 936dda08ee mesa: Consider gl_VertexID and gl_InstanceID active attribs
Fixes piglit's spec/gl-3.2/get-active-attrib-returns-all-inputs.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-13 19:27:01 +12:00
Chris Forbes ca5c8d6cd4 mesa: Extract is_active_attrib() in shaderapi
The rules are about to get a bit more complex to account for
gl_InstanceID and gl_VertexID, which are system values.

Extracting this first avoids introducing duplication.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-13 19:26:56 +12:00
Chris Forbes aeb03f8aea glsl: Fix typo in interface block comment
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
2014-04-13 17:02:11 +12:00
Simone Scanzoni c3b701d63c egl-static: fix build after recent radeon winsys changes
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-04-13 02:37:36 +02:00
Chris Forbes b92e7f2da9 mesa: Fix typo in error message
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
2014-04-13 12:38:24 +12:00
Iago Toral Quiroga a5957f7bc5 i965: glClearBuffer() should only clear a single buffer.
glClearBuffer() is currently clearing all active draw color buffers (all
buffers that have not been set to GL_NONE when calling glDrawBuffers) instead
of only clearing the one it receives as parameter. Altough brw_clear()
receives a bit mask indicating the color buffers that should be cleared,
this mask is ignored when calling brw_blorp_clear_color().

This was breaking the 'fbo-drawbuffers-none glClearBuffer' piglit test.

The patch provides the bit mask to brw_blorp_clear_color() so it can limit
clearing to the color buffers present in the mask.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76832
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-13 12:28:25 +12:00
Chris Forbes 26224d3e00 i965: Add comment to explain the weird-looking shadow compares.
This always looks crazy when I stumble across it, until I remember
what the hardware is doing. Describing it ought to short-circuit
that process next time :)

V2: Fix indents to 6 spaces, not 7.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-13 08:51:46 +12:00
Kenneth Graunke 857f3a68ea glsl: Ignore loop-too-large heuristic if there's bad variable indexing.
Many shaders use a pattern such as:

for (int i = 0; i < NUM_LIGHTS; i++) {
   ...access a uniform array, or shader input/output array...
}

where NUM_LIGHTS is a small constant (such as 2, 4, or 8).

The expectation is that the compiler will unroll those loops, turning
the array access into constant indexing, which is more efficient, and
which may enable array splitting and other optimizations.

In many cases, our heuristic fails - either there's another tiny nested
loop inside, or the estimated number of instructions is just barely
beyond the threshold.  So, we fail to unroll the loop, leaving the
variable indexing in place.

Drivers which don't support the particular flavor of variable indexing
will call lower_variable_index_to_cond_assign(), which generates piles
and piles of immensely inefficient code.  We'd like to avoid generating
that.

This patch detects unsupported forms of variable-indexing in loops, where
the array index is a loop induction variable.  In that case, it bypasses
the loop-too-large heuristic and forces unrolling.

Improves performance in various microbenchmarks: Gl32PSBump8 by 47%,
Gl32ShMapVsm by 80%, and Gl32ShMapPcf by 27%.  No changes in shader-db.

v2: Check ir->array for being an array or matrix, rather than the
    ir_dereference_array itself.
v3: Fix and expand statistics in commit message.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-11 17:41:43 -07:00
Kenneth Graunke 2231db5598 glsl: Rename loop_unroll_count::fail to "nested_loop."
The "fail" flag is set if loop_unroll_count encounters a nested loop;
calling the flag "nested_loop" is a bit clearer.

The original reasoning was that count is inaccurate (too small) if there
are nested loops, as we don't do any sort of analysis on the inner loop.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-11 17:41:41 -07:00
Kenneth Graunke 8268a2f347 glsl: Pass gl_shader_compiler_optimizations to unroll_loops().
Loop unrolling will need to know a few more options in the future.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-11 17:41:39 -07:00
Kenneth Graunke da22221aa3 glsl: Drop do_common_optimization's max_unroll_iterations parameter.
Now that we pass in gl_shader_compiler_options, it makes sense to just
use options->MaxUnrollIterations, rather than passing a separate
parameter.

Half of the invocations already passed options->MaxUnrollIterations,
while the other half passed in a hardcoded value of 32.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-11 17:41:37 -07:00
Kenneth Graunke f00a6483e9 i965: Use EmitNoIndirect flags in lower_variable_index_to_cond_assign.
This will prevent the two from getting out of sync again.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-11 17:41:36 -07:00
Kenneth Graunke 320e0c5205 i965: Correct EmitNoIndirect shader compiler option flags.
These were out of sync with the flags used to control
lower_variable_index_to_cond_assign in brw_shader.cpp.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-11 17:41:25 -07:00
Matt Turner 509b2a6523 i965/fs: Reset reg_from when we can't coalesce.
Not setting this would prevented coalescing after a failed attempt if
the sources for both MOVs were the same.

total instructions in shared programs: 1654531 -> 1650224 (-0.26%)
instructions in affected programs:     423167 -> 418860 (-1.02%)
GAINED:                                2
LOST:                                  0

Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-11 15:27:46 -07:00
Eric Anholt 7e034a8d77 i965: Fill in a bunch of gen7/hsw data cache-related disasm.
This gets us disasm of atomic ops.

v2: Fix fallthrough on pre-gen7.  (bug caught by Ilia Mirkin).

Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-11 13:38:53 -07:00
Eric Anholt 99442bc7b2 i965: Stop setting up a 1:1 "attrib" member in our vertex inputs.
It's just the array index, so we can just go look at the array and see
which element we are.

No significant performance difference (n=140)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-04-11 13:38:53 -07:00