Commit Graph

66530 Commits

Author SHA1 Message Date
Brian Paul a9408f3ca1 mesa: remove _mesa_get_tex_unit_err() and fix error handling
This helper was only called from _mesa_BindTextureUnit().  It's simpler
to just inline it.

The error check / code / message in the helper was incorrect.  It was
written for glBindTextures(), not glBindTextureUnit().  The correct
error for a bad texture unit number is GL_INVALID_VALUE.  The error
message now reports the unit number rather than a GL_TEXTUREi enum.

Fixes a failure in piglit's arb_direct_state_access-bind-texture-unit test.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:43 -06:00
Brian Paul c277fa3940 mesa: consolidate texture binding code
Before, we were doing the actual _mesa_reference_texobj() call and
ctx->Driver.BindTexture() and misc housekeeping in three different
places.  This consolidates the common code in a new bind_texture()
function.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:43 -06:00
Brian Paul 78f908c54b mesa: fix indentation in _mesa_create_nameless_texture() 2015-10-01 07:45:43 -06:00
Brian Paul aa249190a5 st/mesa: clean up #includes in st_draw.c
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:43 -06:00
Brian Paul 82e3d8ba8b mesa: clean up #includes in sampler.cpp
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:43 -06:00
Brian Paul 32a4999ee7 mesa: clean up #includes in ir_to_mesa.cpp
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:43 -06:00
Brian Paul b9b13d873a mesa: clean up #includes in uniforms.h
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:43 -06:00
Brian Paul e13b515044 mesa: clean up #includes in uniform_query.cpp
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:42 -06:00
Brian Paul 85ea125620 mesa: clean up #includes in pipelineobj.c
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:42 -06:00
Brian Paul 1a22550725 mesa: clean up #includes in ff_fragment_shader.cpp
Get rid of "../glsl/" paths.  Sort alphabetically.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 07:45:42 -06:00
Iago Toral Quiroga 7455324030 main: Fix block index when mixing UBO and SSBO blocks
Since we store both in UniformBlocks, we can't just compute the index by
subtracting the array address start, we need to count the number of
buffers of the approriate type.

v2:
  - Just fall back to calc_resource_index (Tapani)

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-10-01 09:25:30 +02:00
Tapani Pälli ca2e16d26e mesa: use strtok_s for strtok_r on windows
https://msdn.microsoft.com/en-us/library/ftsafwz3.aspx

v2: use _WIN32 instead of _MSC_VER (Brian Paul)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92183
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-10-01 08:01:03 +03:00
Ian Romanick 9bd9cf1fa4 meta: Handle array textures in scaled MSAA blits
The old code had some significant problems with respect to
sampler2DArray textures.  The biggest problem was that some of the code
would use vec3 for the texture coordinate type, and other parts of the
code would use vec2.  The resulting shader would not even compile.
Since there were not tests for this path, nobody noticed.

The input to the fragment shader is always treated as a vec3.  If the
source data is only vec2, the vertex puller will supply 0 for the .z
component.  The texture coordinate passed to the fragment shader is
always a vec2 that comes from the .xy part of the vertex shader input.
The layer, taken from the .z of the vertex shader input is passed
separately as a flat integer.  If the generated fragment shader does not
use the layer integer, the GLSL linker will eliminate all the dead code
in the vertex shader.

Fixes the new piglit tests "blit-scaled samples=2 with
gl_texture_2d_multisample_array", etc. on i965.

Note for stable maintainer: This patch may depend on 46037237, and that
patch should be safe for stable.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
2015-09-30 16:22:56 -07:00
Chad Versace b217e6f035 i965/miptree: Add PRM references for most struct members (v2)
Add comments that link the driver's miptree structures to the hardware
structures documented in the PRM.  This provides sorely needed
orientation to developers new to the miptree code. And for miptree
veterans, this clarifies some of the more obscure miptree data.

For each driver struct field that closely corresponds to a
hardware struct field, add a PRM reference to that hardware field's
name. For example,

    struct intel_mipmap_tree {
       ...
       /**
        * @brief One of GL_TEXTURE_2D, GL_TEXTURE_2D_ARRAY, etc.
        *
        * @see RENDER_SURFACE_STATE.SurfaceType
        * @see RENDER_SURFACE_STATE.SurfaceArray
        * @see 3DSTATE_DEPTH_BUFFER.SurfaceType
        */
       GLenum target;
       ...
    };

Also annotate the INTEL_MSAA_LAYOUT_* enums with the name of the PRM
sections that documents the layout.

v2: Replace "2D subimage" with "slice", and define what a "slice" is.
    For Ben.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com> (v1)
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
2015-09-30 15:32:03 -07:00
Chad Versace f7fe9fb0f1 i965/miptree: Rename align_w,align_h -> halign,valign
The values of intel_mipmap_tree::align_w and ::align_h correspond to the
hardware enums HALIGN_* and VALIGN_*.

See the confusion?
    align_h != HALIGN
    align_h == VALIGN

Reduce the confusion by renaming the variables to match the hardware
enum names:
    git ls-files |
    xargs sed -i -e 's/align_w/halign/g' \
                 -e 's/align_h/valign/g'

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-09-30 15:31:06 -07:00
Chad Versace 56367b0290 i965/miptree: Rename intel_miptree_map::mt -> ::linear_mt (v2)
Because that's what it is. It's an untiled, *linear* miptree.

v2:
  - Add space after /*.
  - Use one comment per function argument.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Ben Widawsky <benjamin.widawsky@intel.com>
2015-09-30 15:31:04 -07:00
Chad Versace b7882ae677 i965/miptree: Fix comments for map mode
The comment for intel_miptree_map::mode claimed that it was a bitmask of
GL_MAP_{READ,WRITE,INVALIDATE}_BIT. In reality, the bitmask may include
any of {GL,BRW}_MAP_*_BIT.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Ben Widawsky <benjamin.widawsky@intel.com>
2015-09-30 15:31:03 -07:00
Chad Versace bd191b7cc6 i965/miptree: More comments for BRW_MAP_DIRECT_BIT (v2)
Clarify that this bit extends the set of GL_MAP_*_BIT enums.
Also fix typo of "temporary".

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Ben Widawsky <benjamin.widawsky@intel.com>
2015-09-30 15:30:55 -07:00
Kenneth Graunke 651395b6e8 i965: Remove duplicate copy of is_scalar_shader_stage().
Jason open coded this in 60befc63 when cleaning up some ugly code;
using our existing helper tidies it up a bit more.

v2: Drop inline (suggested by Matt).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-30 13:56:24 -07:00
Ville Syrjälä a1a3f0961b i915: Remember to call intel_prepare_render() before blitting
Bring over the following fix from i965:
 commit fb3d62fe3d
 Author: Kenneth Graunke <kenneth@whitecape.org>
 Date:   Tue Aug 6 14:36:09 2013 -0700

    i965: Remember to call intel_prepare_render() before blitting.

Fixes a crash in the following piglit tests:
 bin/fbo-sys-blit -auto
 bin/fbo-sys-sub-blit -auto

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
2015-09-30 13:10:03 -07:00
Ville Syrjälä c349031c27 i915: Fix texcoord vs. varying collision in fragment programs
i915 fragment programs utilize the texture coordinate registers
for both texture coordinates and varyings. Unfortunately the
code doesn't check if the same index might be in use for both.
It just naively uses the index to pick a texture unit, which
could lead to collisions.

Add an extra mapping step to allocate non conflicting texture
units for both uses.

The issue can be reproduced with a pair of simple shaders like
these:
 attribute vec4 in_mod;
 varying vec4 mod;
 void main() {
   mod = in_mod;
   gl_TexCoord[0] = gl_MultiTexCoord0;
   gl_Position = gl_ModelViewProjectionMatrix * gl_Vertex;
 }

 varying vec4 mod;
 uniform sampler2D tex;
 void main() {
   gl_FragColor = texture2D(tex, vec2(gl_TexCoord[0])) * mod;
 }

Fixes many piglit tests on i915:

    glsl-link-varyings-2
    glsl-orangebook-ch06-bump
    interpolation-none-gl_frontcolor-smooth-fixed
    interpolation-none-gl_frontcolor-smooth-none
    interpolation-none-gl_frontcolor-smooth-vertex
    interpolation-none-gl_frontsecondarycolor-smooth-fixed
    interpolation-none-gl_frontsecondarycolor-smooth-vertex
    interpolation-none-gl_frontsecondarycolor-smooth-none
    interpolation-none-other-flat-fixed
    interpolation-none-other-flat-none
    interpolation-none-other-flat-vertex
    interpolation-none-other-smooth-fixed
    interpolation-none-other-smooth-none
    interpolation-none-other-smooth-vertex

v2 [idr]: Minor formatting tweaks.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
2015-09-30 13:10:03 -07:00
Ville Syrjälä 9504740f3e i830: Fix collision between I830_UPLOAD_RASTER_RULES and I830_UPLOAD_TEX(0)
I830_UPLOAD_RASTER_RULES and I830_UPLOAD_TEX(0) are trying to occupy
the same bit. Move the texture bits upwards a bit to make room for
I830_UPLOAD_RASTER_RULES.

Now the driver will actually upload the raster rules which is rather
important to get the provoking vertex right. Fixes the appearance
of glxgears teeth on gen2.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
2015-09-30 12:49:28 -07:00
Jordan Justen 7b391142e9 i965/cs: Upload UBO/SSBO surfaces
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-09-30 11:28:12 -07:00
Rhys Kidd 83018f5c20 mesa: Fix format specifier warning in mesa_DispatchComputeIndirect()
Commit 1665d29ee3 introduced an incorrect
format specifier that operates on GLintptr indirect within the function
_mesa_DispatchComputeIndirect().

This patch mitigates the introduced GCC warning:

src/mesa/main/compute.c: In function '_mesa_DispatchComputeIndirect':
src/mesa/main/compute.c:53:7: warning: format '%d' expects argument of type 'int', but argument 3 has type 'GLintptr' [-Wformat=]
       _mesa_debug(ctx, "glDispatchComputeIndirect(%d)\n", indirect);
           ^

v2: Amend for Boyan Ding <boyan.j.ding@gmail.com> feedback.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-09-30 10:13:41 -07:00
Jason Ekstrand 3948ac19a4 i965: Get rid of prog_data compare functions
They are no longer used.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-09-30 08:35:32 -07:00
Jason Ekstrand bfdc76c133 i965/state_cache: Remove the aux_compare fields
They haven't been used since 1bba29ed40 so
there's no good reason to keep them around.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-09-30 08:35:32 -07:00
Jason Ekstrand a4734b34b3 i965/copy_image: Fix a copy+past error
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-09-30 08:35:32 -07:00
Chris Wilson 70e91d61fd i965: Remove early release of DRI2 miptree
intel_update_winsys_renderbuffer_miptree() will release the existing
miptree when wrapping a new DRI2 buffer, so we can remove the early
release and so prevent a NULL mt dereference should importing the new
DRI2 name fail for any reason. (Reusing the old DRI2 name will result
in the rendering going astray, to a stale buffer, and not shown on the
screen, but it allows us to issue a warning and not crash much later in
innocent code.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86281
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-30 10:52:30 +03:00
Samuel Iglesias Gonsalvez e21bb9e7bd glsl: assert base_alignment > 0 for records
From GLSL 1.50 spec, section 4.1.8 "Structures":

"Structures must have at least one member declaration."

So the base_alignment should be higher than zero.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-09-30 08:13:07 +02:00
Samuel Iglesias Gonsalvez f3afcbecc6 util: use strnlen() in strndup() implementations
If the string being copied is not NULL-terminated the result of
strlen() is undefined.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-09-30 08:13:07 +02:00
Samuel Iglesias Gonsalvez 023165a734 i965/vec4/nir: add nir_intrinsic_memory_barrier support
Fix OpenGL ES 3.1 conformance tests: advanced-readWrite-case1-vsfs
and advanced-matrix-vsfs.

v2:
- Fix SHADER_OPCODE_MEMORY_FENCE emission and the allocation of 'tmp'
  (Francisco).

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-09-30 08:13:07 +02:00
Samuel Iglesias Gonsalvez f24e5e68d6 glsl: apply shader storage block member rules when adding program resources
From ARB_program_interface_query:

"For an active shader storage block member declared as an array, an
 entry will be generated only for the first array element, regardless
 of its type. For arrays of aggregate types, the enumeration rules are
 applied recursively for the single enumerated array element."

v2:
- Simplify 'if' conditions and return true if it is not a buffer
  variable, because these rules only apply to buffer variables (Timothy).

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-09-30 08:13:07 +02:00
Jordan Justen 4810d02112 nir: Don't set dest in SSBO store glsl_to_nir conversion
This matches the function signature created in
lower_ubo_reference_visitor::ssbo_store which has a void return.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-09-29 17:17:20 -07:00
Kenneth Graunke 476e6d732f nir: Use a system value for gl_PrimitiveIDIn.
At least on Intel hardware, gl_PrimitiveIDIn comes in as a special part
of the payload rather than a normal input.  This is typically what we
use system values for.  Dave and Ilia also agree that a system value
would be nicer.

At some point, we should change it at the GLSL IR level as well.  But
that requires changing most of the drivers.  For now, let's at least
make NIR do the right thing, which is easy.

v2: Add a comment about not creating a temporary (suggested by Iago).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-09-29 14:19:32 -07:00
Brian Paul cb758b892a st/mesa: try PIPE_BIND_RENDER_TARGET when choosing float texture formats
For 8-bit RGB(A) texture formats we set the PIPE_BIND_RENDER_TARGET flag
to try to get a hardware format which also supports rendering (for FBO
textures).  Do the same thing for floating point formats.

This allows the Redway3D Flat demo to run.

Cc: 10.6 11.0 <mesa-stable@lists.freedesktop.org>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-29 11:52:22 -06:00
Brian Paul daf23bd4cb st/mesa: add some debugging code in st_ChooseTextureFormat()
I've temporarily added code like this many times.  Wrap it in a
conditional that can be enabled when needed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-09-29 11:52:03 -06:00
Brian Paul 7147f7098e mesa: clean up #includes in shaderapi.c
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-29 11:51:56 -06:00
Brian Paul b24c6d3fef mesa: clean up the #includes in shader_query.cpp
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-29 11:51:51 -06:00
Brian Paul 3bbff1e26e mesa: remove an extern "C" wrapper in shader_query.cpp
The shaderapi.h header already has the extern "C" wrapper.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-29 11:51:38 -06:00
Jordan Justen 681b4badae i965/cs: Generate code to load gl_NumWorkGroups
This code also sets cs_prog_data->uses_num_work_groups which is later
used by state setup to indicate that the gl_NumWorkGroups surface
needs to be setup.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 4c6ddd3397 nir: Convert SYSTEM_VALUE_NUM_WORK_GROUPS to a nir intrinsic
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen f6ae914069 glsl/cs: Add gl_NumWorkGroups as a system value
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 63d7b33f51 i965/cs: Setup surface binding for gl_NumWorkGroups
This will only be setup when the prog_data uses_num_work_groups
boolean is set.

At this point nothing will set uses_num_work_groups, but soon code
will set it when emitting code for the intrinsic that loads
gl_NumWorkGroups.

We can't emit this surface information earlier at the start of the
DispatchCompute* call because we may not have generated the program
yet. Until we generate the program, we don't know if the
gl_NumWorkGroups variable is accessed.

We also can't emit the surface as part of the brw_cs_state atom,
because we might not need the surface if gl_NumWorkGroups is not used
by the program.

Lastly, we cannot emit the surface later (after state upload) in the
DispatchCompute* call, because it needs to be run before the
brw_cs_state atom is emitted, since it changes the surface state.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen d1be9d2126 i965/cs: Add a binding table entry for gl_NumWorkGroups
If glDispatchComputeIndirect is used, then the value for this variable
must be read from the indirect BO.

To allow the same generated code to support indirect and
glDispatchCompute, we will also setup a BO for the number of work
groups using the intel_upload_data mechanism. This will only be
required if the gl_NumWorkGroups variable is accessed.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen d57a85f32b i965/cs: Store compute invocation information in brw context
We will need this in an atom to setup a surface to read the
gl_NumWorkGroups values from.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 60cf84dea7 i965/cs: Re-emit cs_state when surfaces have changed
Unlike rendering (BINDING_TABLE_POINTERS_*S), compute doesn't have a
binding table pointers command. Instead it is part of the
MEDIA_INTERFACE_DESCRIPTOR structure loaded by the brw_cs_state atom.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 2ec5f3e1d5 i965/cs: Re-emit push constants and cs_state on new batches
We need to re-emit push constansts when a new batch is started since
the push constants are stored in the batch. We also need to re-emit
the MEDIA_INTERFACE_DESCRIPTOR (in brw_cs_state) since it is stored in
the batch.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jordan Justen 1665d29ee3 mesa/cs: Add MESA_VERBOSE=api support in DispatchCompute*
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 08:23:47 -07:00
Jose Fonseca 952366a60e util: Fix strndup prototype on C++.
Trivial.
2015-09-29 16:01:56 +01:00
Tapani Pälli c0722be9f5 mesa: fix ARRAY_SIZE query for GetProgramResourceiv
Patch also refactors name length queries which were using array size
in computation, this has to be done in same time to avoid regression in
arb_program_interface_query-resource-query Piglit test.

Fixes rest of the failures with
   ES31-CTS.program_interface_query.no-locations

v2: make additional check only for GS inputs
v3: create helper function for resource name length
    so that it gets calculated only in one place

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-09-29 12:46:28 +03:00
Iago Toral Quiroga 12d510ab74 glsl: Fix forward NULL dereference coverity warning
The comment says that it should be impossible for decl_type to be NULL
here, so don't try to handle the case where it is, simply add an assert.

>>>     CID 1324977:  Null pointer dereferences  (FORWARD_NULL)
>>>     Comparing "decl_type" to null implies that "decl_type" might be null.

No piglit regressions observed.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-09-29 10:53:08 +02:00
Iago Toral Quiroga 1dc2db7a4d glsl: Fix null return coverity warning
Add an assert on the result of as_dereference() not being NULL:

>>>     CID 1324978:  Null pointer dereferences  (NULL_RETURNS)
>>>     Dereferencing a null pointer "deref_record->record->as_dereference()".

Since we are introducing a new variable to hold the result of
as_dereference(), take the opportunity to rename deref_record_type to
interface_type and just name the new variable interface_deref, which is
less confusing.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 10:53:08 +02:00
Iago Toral Quiroga 6bf718fec2 glsl: Fix unused value warning reported by Coverity
We don't use param in this part of the code, so no point in advancing
the pointer forward:

>>>     CID 1324983:  Code maintainability issues  (UNUSED_VALUE)
>>>     Assigning value from "param->get_next()" to "param" here, but that stored value is overwritten before it can be used.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 10:53:08 +02:00
Samuel Iglesias Gonsalvez bea66d22f2 util: implement strndup for WIN32
v2:
- Add strndup.h to Makefile.sources (Emil)
- Use calloc instead of malloc (Emil).
- Check if allocation fails (Emil, Jose)
- Add '#pragma once' and include stdlib.h to strndup.h (Jose)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92124
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-09-29 10:03:47 +02:00
Samuel Iglesias Gonsalvez 7efb235019 glsl: use correct number of uniform blocks in error message
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-09-29 10:03:47 +02:00
Samuel Iglesias Gonsalvez 6668eb5a45 mesa: rename gl_shader_program's NumUniformBlocks to NumBufferInterfaceBlocks
Because it counts shader storage blocks too.

v2:
- Use NumBufferInterfaceBlocks instead (Jordan).

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-09-29 10:03:47 +02:00
Samuel Iglesias Gonsalvez 38004eb17c main: fix ACTIVE_UNIFORM_BLOCKS value
NumUniformBlocks also counts shader storage blocks.
NumUniformBlocks variable will be renamed in a later patch to avoid
misunderstandings.

v2:

- Modify the condition to use !IsShaderStorage and the list of
  uniform blocks (Timothy)

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-09-29 10:03:47 +02:00
Anuj Phogat 945592f92c i965/gen9: Add a condition for starting pixel in fast copy blit
This condition restricts the use of fast copy blit to cases
where starting pixel of src and dst is oword (16 byte) aligned.

Many piglit tests (if using fast copy blit in Mesa) failed earlier
because I missed adding this condition.Fast copy blit is currently
enabled for use only with Yf/Ys tiling.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 15:00:53 -07:00
Ilia Mirkin 1d8cba9b51 nouveau: wait to unref the transfer's bo until it's no longer used
The bo will often come from a slab in which case it doesn't matter. But
for larger allocations this will be in its own bo, and we have to make
sure to wait until it's no longer used in order for it to be freed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marcin Ślusarz <marcin.slusarz@gmail.com>
2015-09-28 17:28:54 -04:00
Ilia Mirkin 3a6b9a7830 nouveau: delay deleting buffer with unflushed fence
If there is an unflushed fence on the bo, then the resource may still be
used in commands built up in the local pushbuf. Flushing can cause all
sorts of unwanted effects, so just free the bo when the relevant fence
is hit.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marcin Ślusarz <marcin.slusarz@gmail.com>
2015-09-28 17:28:54 -04:00
Ilia Mirkin d4e650b07b nouveau: be more careful about freeing temporary transfer buffers
Deleting a buffer does not flush the command stream. Make sure that we
wait for the copies to finish before deleting the temporary bo.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Marcin Ślusarz <marcin.slusarz@gmail.com>
2015-09-28 17:28:54 -04:00
Anuj Phogat 4c5308bbf4 i965: Rename intel_miptree_get_dimensions_for_image()
This function isn't specific to miptrees. So, drop the "miptree"
from function name.

V3: Add a comment explaining how the 1D Array texture height and
    depth is interpreted by Intel hardware.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 0bfd914f9f i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLT
I misinterpreted the alignmnet restriction in XY_FAST_COPY_BLT earlier.
Instead of checking pitch for 64KB alignmnet we need to check it for
tile widh alignment.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 0fa39bff19 i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT
Current code checks the alignment restrictions only for Y tiling.
From Broadwell PRM vol 10:

 "pitch is of 512Byte granularity for Tile-X: This means the tiled-x
  surface pitch can be (512, 1024, 1536, 2048...)/4 (in Dwords)."

This patch adds the restriction for X tiling as well.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat e83b07aa7b i965: Move conversion of {src, dst}_pitch to dwords outside if/else
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 485285498f i965: Delete temporary variable 'src_pitch'
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat bbbc9fd8e5 i965: Use helper function intel_get_tile_dims() in surface setup
It takes care of using the correct tile width if we later use other
tiling patterns for aux miptree.

V2: Remove the comment about using Yf for aux miptree.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 1dc41be9eb i965: Use intel_get_tile_dims() to get tile masks
This will require change in the parameters passed to
intel_miptree_get_tile_masks().

V2: Rearrange the order of parameters. (Ben)
    Change the name to intel_get_tile_masks(). (Topi)

V3: Use temporary variables in intel_get_tile_masks()
    for clarity. Fix mask_y computation.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Anuj Phogat 21fdc59d34 i965: Add a helper function intel_get_tile_dims()
V2:
- Do the tile width/height computations in the new helper
  function and use it later in intel_miptree_get_tile_masks().
- Change the name to intel_get_tile_dims().

V3: Return the tile_h in number of rows in place of bytes.
    Document the units of tile_w, tile_h parameters.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2015-09-28 12:43:43 -07:00
Eduardo Lima Mitev 5edd9961c1 mesa: Use the effective internal format instead for validation
When validating format+type+internalFormat for texture pixel operations
on GLES3, the effective internal format should be used if the one
specified is an unsized internal format. Page 127, section "3.8 Texturing"
of the GLES 3.0.4 spec says:

    "if internalformat is a base internal format, the effective internal
     format is a sized internal format that is derived from the format and
     type for internal use by the GL. Table 3.12 specifies the mapping of
     format and type to effective internal formats. The effective internal
     format is used by the GL for purposes such as texture completeness or
     type checks for CopyTex* commands. In these cases, the GL is required
     to operate as if the effective internal format was used as the
     internalformat when specifying the texture data."

v2: Per the spec, Luminance8Alpha8, Luminance8 and Alpha8 should not be
considered sized internal formats. Return the corresponding unsize format
instead.

v4: * Improved comments in
      _mesa_es3_effective_internal_format_for_format_and_type().
    * Splitted patch to separate chunk about reordering of
      error_check_subtexture_dimensions() error check, which is not directly
      related with this patch.
v5: Dropped the splitted patch because it was actually a work around 3
    dEQP tests that are buggy:

    dEQP-GLES2.functional.negative_api.texture.texsubimage2d_neg_offset
    dEQP-GLES2.functional.negative_api.texture.texsubimage2d_offset_allowed
    dEQP-GLES2.functional.negative_api.texture.texsubimage2d_neg_wdt_hgt

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2015-09-28 11:39:53 -07:00
Eduardo Lima Mitev c6bf1cd146 mesa: Move _mesa_base_tex_format() from teximage to glformats files
This function will be needed as part of validating the combination of format,
type and internal format of texture pixel operations, which happens in
glformats files. Specifically, we want to be able to obtain the base format
of a resolved effective internal format, to compare it with the original
internal format passed.

Also, since this function deals solely with GL formats, it fits better in
glformats where the rest of similar format functionality rests.

The function is moved as-is, without any modification.

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2015-09-28 11:39:53 -07:00
Eduardo Lima Mitev 15ab968f62 mesa: Fix order of format+type and internal format checks for glTexImageXD ops
The more specific GLES constrains should be checked after the general
validation performed by _mesa_error_check_format_and_type(). This is also
for consistency with the error checks order of glTexSubImage ops.

v3: The change of order uncovered a bug that regresses a couple of piglit
tests written against OpenGL-ES 1.1 spec, which expects an INVALID_VALUE
instead of the INVALID_ENUM returned by _mesa_error_check_format_and_type()
when an invalid format is passed to glTexImage2D. This version of the patch
accounts for those cases.

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.texture.teximage2d

Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2015-09-28 11:39:53 -07:00
Alexander von Gluck IV 7cdd818d2a egl: Fix missing Haiku include path 2015-09-28 13:58:25 -04:00
Alexander von Gluck IV 255a225265 state_trackers/hgl: Fix missing include path 2015-09-28 13:58:24 -04:00
Francisco Jerez b61292296b i965/fs: Fix hang on IVB and VLV with image format mismatch.
IVB and VLV hang sporadically when an untyped surface read or write
message is used to access a surface of format other than RAW, as may
happen when there is a mismatch between the format qualifier of the
image uniform and the format of the actual image bound to the
pipeline.  According to the spec this condition gives undefined
results but may not lead to program termination (which is one of the
possible outcomes of the hang).  Fix it by checking at runtime whether
the surface is of the right type.

Fixes the "arb_shader_image_load_store.invalid/format mismatch" piglit
subtest.

Reported-by: Mark Janes <mark.a.janes@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91718
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-09-28 18:10:39 +03:00
Serge Martin 2518645f63 clover: Implement clCreateImage?D w/ clCreateImage.
Remplace clCreateImage2D and clCreateImage3D implementation with call
to clCreateImage.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-09-28 18:10:39 +03:00
Serge Martin f2c52e392b clover: Implement CL1.2 clCreateImage().
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-09-28 18:10:39 +03:00
Francisco Jerez 92666b90c0 clover: Move down canonicalization of memory object flags into validate_flags().
This will be used to share the same logic between buffer and image
creation.

v2: Make memory flag set constants local to validate_flags. (Serge
    Martin)
2015-09-28 18:10:39 +03:00
Iago Toral Quiroga e7ae6d9e14 glsl: revert "glsl: atomic counters can be declared as buffer-qualified variables"
This reverts commit 586142658e.

The specs are not explicit about any restrictions related to the types allowed
on buffer variables, however, the description of opaque types (like atomic
counters) is in conclict with the purpose of buffer variables:

"The opaque types declare variables that are effectively opaque
 handles to other objects. These objects are
 accessed through built-in functions, not through direct reading or
 writing of the declared variable.
 (...)
 Opaque variables cannot be treated as l-values;(...)"

Also, Mesa is already disallowing opaque types in interface blocks anyway, so
that commit was not really achieving anything.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-09-28 14:23:26 +02:00
Ilia Mirkin 5bff12ecb4 gallium/util: avoid unreferencing random memory on buffer alloc failure
Found by Coverity

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Albert Freeman <albertwdfreeman@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-09-28 02:38:58 -04:00
Ilia Mirkin 6dd059fefe mesa: don't leak interface_name
Found by Coverity

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-09-28 02:38:58 -04:00
Timothy Arceri e413d2fbc4 glsl: fix component size calculation for tessellation and geom shaders
Broken in commit abdab88b30 when adding arrays of arrays support

Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-09-28 11:31:50 +10:00
Kenneth Graunke d6a41b5f70 i965/gs: Optimize away the EOT write on Gen8+ with static vertex count.
With static vertex counts, the final EOT write doesn't actually write
any data - it's just there to end the thread.  Typically, the last
thing before ending the thread will be an EmitVertex() call, resulting
in a URB write.  We can just set EOT on that.

Note that this isn't always possible - there might be an intervening
SSBO write/image store, or the URB write may have been in a loop.

shader-db statistics for geometry shaders only:

total instructions in shared programs: 3173 -> 3149 (-0.76%)
instructions in affected programs:     176 -> 152 (-13.64%)
helped:                                8

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-26 12:02:34 -07:00
Kenneth Graunke 08fe5799e6 i965/gs: Allow src0 immediates in GS_OPCODE_SET_WRITE_OFFSET.
GS_OPCODE_SET_WRITE_OFFSET is a MUL with a constant src[1] and special
strides.  We can easily make the generator handle constant src[0]
arguments by instead generating a MOV with the product of both operands.

This isn't necessarily a win in and of itself - instead of a MUL, we
generate a MOV, which should be basically the same cost.  However, we
can probably avoid the earlier MOV to put src[0] into a register.

shader-db statistics for geometry shaders only:

total instructions in shared programs: 3207 -> 3173 (-1.06%)
instructions in affected programs:     3207 -> 3173 (-1.06%)
helped:                                11

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-26 12:02:31 -07:00
Kenneth Graunke f0a618ee7c i965: Implement "Static Vertex Count" geometry shader optimization.
Broadwell's 3DSTATE_GS contains new "Static Output" and "Static Vertex
Count" fields, which control a new optimization.  Normally, geometry
shaders can output arbitrary numbers of vertices, which means that
resource allocation has to be done on the fly.  However, if the number
of vertices is statically known, the hardware can pre-allocate resources
up front, which is more efficient.

Thanks to the new NIR GS intrinsics, this is easy.  We just call the
function introduced in the previous commit to get the vertex count.
If it obtains a count, we stop emitting the extra 32-bit "Vertex Count"
field in the VUE, and instead fill out the 3DSTATE_GS fields.

Improves performance of Gl32GSCloth by 5.16347% +/- 0.12611% (n=91)
on my Lenovo X250 laptop (Broadwell GT2) at 1024x768.

shader-db statistics for geometry shaders only:

total instructions in shared programs: 3227 -> 3207 (-0.62%)
instructions in affected programs:     242 -> 222 (-8.26%)
helped:                                10

v2: Don't break non-NIR paths (just skip this optimization).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-09-26 12:01:58 -07:00
Kenneth Graunke bcef2abad7 i965: Move GS_THREAD_END mlen calculations out of the generator.
The visitor was setting a mlen that was wrong for Broadwell, but the
generator was ignoring it and doing the right thing regardless.  We may
as well move the logic fully into the visitor.  This will be useful in
the next commit as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-09-26 12:01:57 -07:00
Kenneth Graunke 02530c5dc5 nir: Add a function to count the number of vertices a GS emits.
Some hardware (such as Broadwell) can run geometry shaders more
efficiently when the number of vertices emitted is statically known.

This pass provides a way to obtain the constant vertex count, or
-1 indicating that the vertex count is unknown/non-constant.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-09-26 12:01:53 -07:00
Kenneth Graunke df221f65e2 i965: Simplify handling of VUE map changes.
The old code was disasterously complex - spread across multiple atoms
which may not even run, inspecting the dirty bits to try and decide
whether it was necessary to do checks...storing VS information in
brw_context...extra flagging...

This code tripped me and Carl up very badly when working on the
shader cache code.  It's very fragile and hard to maintain.

Now that geometry shaders only depend on their inputs and don't have
to worry about the VS VUE map, we can dramatically simplify this:
just compute the VUE map coming out of the geometry shader stage
in brw_upload_programs.  If it changes, flag it.  Done.

v2: Also check vue_map.separable.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-09-26 11:59:56 -07:00
Kenneth Graunke 6301af22bb i965/gs: Remove the dependency on the VS VUE map.
Because we only support geometry shaders in core profile, we can safely
ignore any driver-extending of VS outputs.

Those are:
- Legacy userclipping (doesn't exist in core profile)
- Edgeflag copying (Gen4-5 only, no GS support)
- Point coord replacement (Gen4-5 only, no GS support)
- front/back color hacks (Gen4-5 only, no GS support)

v2: Rebase; leave a comment about why SSO works.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-09-26 11:59:56 -07:00
Kenneth Graunke 99df02ca26 i965: Don't re-layout varyings for separate shader programs.
Previously, our VUE map code always assigned slots to varyings
sequentially, in one contiguous block.

This was a bad fit for separate shaders - the GS input layout depended
or the VS output layout, so if we swapped out vertex shaders, we might
have to recompile the GS on the fly - which rather defeats the point of
using separate shader objects.  (Tessellation would suffer from this
as well - we could have to recompile the HS, DS, and GS.)

Instead, this patch makes the VUE map for separate shaders use a fixed
layout, based on the input/output variable's location field.  (This is
either specified by layout(location = ...) or assigned by the linker.)
Corresponding inputs/outputs will match up by location; if there's a
mismatch, we're allowed to have undefined behavior.

This may be less efficient - depending what locations were chosen, we
may have empty padding slots in the VUE.  But applications presumably
use small consecutive integers for locations, so it hopefully won't be
much worse in practice.

3% of Dota 2 Reborn shaders are hurt, but only by 2 instructions.
This seems like a small price to pay for avoiding recompiles.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-09-26 11:59:56 -07:00
Kenneth Graunke 1e5180316c i965/vue: Make assign_vue_map() take an explicit slot.
Our plan of assigning consecutive slots doesn't work properly for
separate shader objects - at least, if we want to avoid recompiling them
whenever the interface changes.

As a first step, make assign_vue_map take an explicit slot parameter,
rather than implicitly incrementing it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-09-26 11:59:56 -07:00
Kenneth Graunke 268008f98c i965: Initialize unused VUE map slots to BRW_VARYING_SLOT_PAD.
Nothing actually relies on unused slots being initialized to
BRW_VARYING_SLOT_COUNT.  Soon, we're going to have VUE maps with holes
in them, at which point pre-filling with BRW_VARYING_SLOT_PAD make a lot
more sense.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-09-26 11:59:56 -07:00
Kenneth Graunke 39d4b553a8 i965: Fix BRW_VARYING_SLOT_PAD handling in the scalar VS backend.
We can't just break for padding slots.  Instead, treat them like
unwritten output variables, so we handle flushing and incrementing
urb_offset correctly.

Paul introduced the concept of padding slots back in 2011, but we've
never actually used them for anything.  So it's unsurprising that the
scalar VS backend didn't handle them quite right.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-09-26 11:59:56 -07:00
Samuel Iglesias Gonsalvez 511a86383b main/tests: Enable glShaderStorageBlockBinding() check in dispatch_sanity test
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-09-26 16:54:02 +02:00
Timothy Arceri abdab88b30 glsl: calculate component size for arrays of arrays when varying packing disabled
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-09-26 22:48:49 +10:00
Timothy Arceri 1d401f9ce4 glsl: validate binding qualifier for AoA
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-09-26 22:28:05 +10:00
Timothy Arceri 9bad7afbc2 glsl: add helper for calculating size of AoA
V2: return 0 if not array rather than -1

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-09-26 22:27:47 +10:00
Timothy Arceri 776a3845d6 glsl: clean-up link uniform code
These changes are also needed to allow linking of
struct and interface arrays of arrays.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2015-09-26 22:27:24 +10:00
Marek Olšák 9932142192 radeonsi: add scratch buffer to the buffer list when it's re-allocated
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2015-09-26 01:51:05 +02:00
Leo Liu 1e97b41893 radeon/vce: fix vui time_scale zero error
if app pass 0 as frame_rate_num, it should not be encoded to the VUI.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
2015-09-25 18:47:14 -04:00