3657cdafd6
amd: require amdgpu DRM 3.2.0 from April 2016
...
This removes an early bug workaround.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
ff19666a0d
ac/gpu_info: remove redundant vcn_encode
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
89113c0338
ac/gpu_info: remove redundant vce_encode
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
9cbbdc6583
ac/gpu_info: remove redundant uvd_encode
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
2972ceccfd
ac/gpu_info: remove redundant jpeg_decode
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
a0d2e16c91
ac/gpu_info: remove redundant uvd_decode
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
12c5d64fae
ac/gpu_info: remove vram_size and gtt_size in favor of *_kb variants
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
983223de5d
ac/gpu_info: use the kernel-reported GFX IP version to set gfx_level
...
hopefully this won't break the world.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
6504d7172c
ac/gpu_info: use hw_ip::ip_discovery_version to set IP versions
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
9552da66cc
ac/gpu_info: rework and extend device info to be more informative
...
This is the result with AMD_DEBUG=info:
Device info:
name = NAVI23
marketing_name = AMD Radeon RX 6600
num_se = 2
num_rb = 8
num_cu = 28
max_gpu_freq = 2750 MHz
max_gflops = 9856 GFLOPS
l0_cache_size = 16 KB
l1_cache_size = 128 KB
l2_cache_size = 2048 KB
l3_cache_size = 32 MB
memory_channels = 8 (TCC blocks)
memory_size = 8 GB (8192 MB)
memory_freq = 14 GHz
memory_bus_width = 128 bits
memory_bandwidth = 224 GB/s
clock_crystal_freq = 100000 KHz
IP GFX 10.3 queues:1
IP COMP 10.3 queues:4
IP SDMA 5.2 queues:2
IP VCN_DEC 3.0 queues:1
IP VCN_ENC 3.0 queues:1
IP VCN_JPG 3.0 queues:1
It might not be 100% correct with other chips.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
dd6b001775
ac/gpu_info: remove tabs
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
f218c3d795
ac/gpu_info: rename info fields to num_cu, memory_bus_width, memory_freq_mhz
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411 >
2022-07-27 05:01:38 +00:00
1c06565026
radv: expose disjoint image support
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16510 >
2022-07-26 19:50:58 +00:00
27a24cb382
radv: implement disjoint memory for multiplane images
...
For descriptor binding, we need to allow up to three buffers to be
referenced by any image.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16510 >
2022-07-26 19:50:58 +00:00
6a77ecbe6f
radv: consolidate descriptor set buffer counts
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16510 >
2022-07-26 19:50:57 +00:00
72625bea5f
radv: refactor image binding into struct
...
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16510 >
2022-07-26 19:50:57 +00:00
5dab077824
aco: Add a note about G16 without A16 to README-ISA.md.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16979 >
2022-07-26 16:54:08 +00:00
7fa9b25c2f
radv: Fold 16bit tex sources.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16979 >
2022-07-26 16:54:08 +00:00
f5f73db846
aco: Support 16bit sources for texture ops.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16979 >
2022-07-26 16:54:08 +00:00
c1cf0688c9
aco: Add G16 opcodes.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16979 >
2022-07-26 16:54:08 +00:00
Konstantin Seurer
2861d1ff8a
radv: Fix out of bounds access in RTPSO creation
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17723 >
2022-07-24 14:59:44 +00:00
5b196716cf
radv/rt: simplify lower_rt_instructions()
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17301 >
2022-07-22 15:31:23 +00:00
f7c318901d
radv/rt: fix nir_builder cursor in lower_rt_instructions()
...
Fixes: 207ce6d658https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17301 >
2022-07-22 15:31:23 +00:00
c0945f70df
radv/rt: Don't load ClosestHit SBT on every hit, but only once after traversal
...
Quake II RTX:
Totals from 7 (0.01% of 134913) affected shaders:
CodeSize: 217592 -> 215956 (-0.75%)
Instrs: 39468 -> 39341 (-0.32%)
Latency: 761581 -> 746802 (-1.94%)
InvThroughput: 507721 -> 497870 (-1.94%)
Copies: 4621 -> 4585 (-0.78%)
Branches: 1598 -> 1584 (-0.88%)
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17301 >
2022-07-22 15:31:23 +00:00
c39cccec9c
radv/rt: use stage ID as handle for general and closestHit shaders
...
This avoids some code duplication and divergence.
Quake II RTX:
Totals from 7 (0.01% of 134913) affected shaders:
CodeSize: 218880 -> 217592 (-0.59%)
Instrs: 39692 -> 39468 (-0.56%)
Latency: 789091 -> 761581 (-3.49%)
InvThroughput: 526061 -> 507721 (-3.49%)
VClause: 1202 -> 1188 (-1.16%)
Copies: 4649 -> 4621 (-0.60%)
Branches: 1605 -> 1598 (-0.44%)
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17301 >
2022-07-22 15:31:23 +00:00
3750663c72
radv/rt: use derefs for the traversal stack
...
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17301 >
2022-07-22 15:31:23 +00:00
076ea8b35a
radv: create RT traversal as separate shader
...
This will help in future to keep the main shader slim
when we have actual function calls.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17301 >
2022-07-22 15:31:23 +00:00
8e056af399
radv: Only create noop-fs for graphics pipelines
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17301 >
2022-07-22 15:31:23 +00:00
8d7ca7783b
ac/nir/ngg: Remember proper bit sizes of GS output variables.
...
The LLVM backend keeps track of 16-bit output variables and it will
miscompile shaders when these outputs aren't the correct bitsize.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17706 >
2022-07-22 08:17:39 +00:00
e60fbb4dc9
ac/nir/ngg: Copy comment about LDS layout for NGG GS.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17706 >
2022-07-22 08:17:39 +00:00
b5abf4fb3d
ac/llvm: Use gs_prim_id for NGG VS.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17706 >
2022-07-22 08:17:39 +00:00
1e2663b62c
ac/llvm: Add LLVM bug workaround to ac_build_mbcnt_add.
...
LLVM always believes that this instruction's upper bound is the wave
size, regardless of ac_set_range_metadata and regardless of whether
the add source is used.
As a workaround, emit an extra add instruction.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17706 >
2022-07-22 08:17:39 +00:00
c9f8be9d58
ac/llvm: Implement load_num_subgroups for NGG shaders.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17706 >
2022-07-22 08:17:39 +00:00
Konstantin Seurer
1a95d43e55
radv: Simplify the meta init fail path
...
Move most of the the cleanup into radv_device_init_meta.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17652 >
2022-07-22 07:51:14 +00:00
Konstantin Seurer
b06e5535c0
radv: Use RADV_META_SUSPEND_PREDICATING
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17625 >
2022-07-22 07:25:09 +00:00
Konstantin Seurer
fdeca2ca0b
radv: Add meta saving/restoring for predicating
...
There are a bunch of places, where this is done manually.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17625 >
2022-07-22 07:25:09 +00:00
dd781c1ccb
ac/nir/ngg: Create output variable for primitive ID export.
...
This makes the RADV/LLVM backend happy and mitigates a crash.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17581 >
2022-07-21 21:53:29 +00:00
22796d91ea
aco: Remove hack for primitive ID export.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17581 >
2022-07-21 21:53:29 +00:00
b0a7db1d3b
ac/nir/ngg: Move primitive ID workgroup barrier to proper place.
...
Previously, it was in a divergent branch, therefore
it could hang the GPU when a workgroup had a primitive-only wave.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17581 >
2022-07-21 21:53:29 +00:00
754e43369d
ac/nir/ngg: Decouple primitive ID store and primitive export.
...
There's no dependency between them.
This can simplify the compiler backend translation by
always storing prim id before vertex export, which also
benefits the LLVM backend in latter changes.
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17581 >
2022-07-21 21:53:29 +00:00
87e3277b82
nir: Rewrite and merge 16bit tex folding pass with 16bit image folding pass.
...
Allow folding constants/undef sources by sharing more code with the image_store
16bit folding pass.
Allow more than one set of sources because RADV wants two, one for
G16 (ddx/ddy) and one for A16 (all other sources).
Allow folding cube sampling destination conversions on radeonsi/radv because
I think the limitation only applies to sources.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978 >
2022-07-21 19:15:03 +00:00
Konstantin Seurer
7e7e01fe0c
radv: Use desc->format
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490 >
2022-07-21 12:48:01 +00:00
Konstantin Seurer
ae67294479
radv: Remove format desc null checks
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490 >
2022-07-21 12:48:01 +00:00
85e859ac5f
radv: only force 1x sample for Bresenham lines when pipeline draws lines
...
Otherwise, this would affect non-line draws. While we are at it,
adjust a comment.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6303
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17657 >
2022-07-21 08:05:35 +02:00
4eb7e53963
radv: Enable task shader feature for NV_mesh_shader.
...
Still hidden behind RADV_PERFTEST=nv_ms but now advertises
task shader support too.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531 >
2022-07-20 19:00:31 +00:00
28db493cdc
radv: Copy BO list to ACE internal CS.
...
This is necessary to make sure the ACE internal cmdbuf
can access the same memory as the GFX cmdbuf.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531 >
2022-07-20 19:00:30 +00:00
5a1cbafd9d
radv: Submit internal compute cmdbuf.
...
Use scheduled dependencies to create two submissions:
first we submit ACE then GFX.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531 >
2022-07-20 19:00:30 +00:00
eeb8366bbd
radv: Workaround MEC taskmesh dispatch hang when count buffer has zero.
...
The DISPATCH_TASKMESH_INDIRECT_MULTI_ACE packet has a firmware bug,
it hangs the GPU when the draw count is zero.
This commit adds a workaround sequence using COND_EXEC packets
which make sure that this indirect packet is never executed when
the draw count is zero.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531 >
2022-07-20 19:00:30 +00:00
7b8f087f6b
radv: Support task shaders in secondary cmd buffers.
...
Special consideration is needed to keep ACE and GFX in sync.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531 >
2022-07-20 19:00:30 +00:00
4c6f83006d
radv: Synchronization for task shaders.
...
Add a separate flush_bits field for tracking cache
flushes in the ACE internal cmdbuf.
In barriers and image transitions we add these flush bits to ACE.
Create a semaphore in the upload BO which makes it possible
for ACE to wait for GFX for the purpose of synchronization.
This is necessary when a barrier needs to block task shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531 >
2022-07-20 19:00:30 +00:00
Marek Olšák
Benjamin Cheng
Georg Lehmann
Konstantin Seurer
Daniel Schürmann
Timur Kristóf
Qiang Yu
Samuel Pitoiset