radv/rt: simplify lower_rt_instructions()
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17301>
This commit is contained in:
Daniel Schürmann
Marge Bot
parent
f7c318901d
commit
5b196716cf
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@ -417,17 +417,19 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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nir_foreach_instr_safe (instr, block) {
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switch (instr->type) {
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case nir_instr_type_intrinsic: {
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b_shader.cursor = nir_before_instr(instr);
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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nir_ssa_def *ret = NULL;
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switch (intr->intrinsic) {
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case nir_intrinsic_rt_execute_callable: {
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uint32_t size = align(nir_intrinsic_stack_size(intr), 16) + RADV_MAX_HIT_ATTRIB_SIZE;
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uint32_t ret = call_idx_base + nir_intrinsic_call_idx(intr) + 1;
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b_shader.cursor = nir_instr_remove(instr);
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uint32_t ret_idx = call_idx_base + nir_intrinsic_call_idx(intr) + 1;
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nir_store_var(
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&b_shader, vars->stack_ptr,
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nir_iadd_imm(&b_shader, nir_load_var(&b_shader, vars->stack_ptr), size), 1);
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nir_store_scratch(&b_shader, nir_imm_int(&b_shader, ret),
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nir_store_scratch(&b_shader, nir_imm_int(&b_shader, ret_idx),
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nir_load_var(&b_shader, vars->stack_ptr), .align_mul = 16);
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nir_store_var(&b_shader, vars->stack_ptr,
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@ -444,13 +446,12 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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}
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case nir_intrinsic_rt_trace_ray: {
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uint32_t size = align(nir_intrinsic_stack_size(intr), 16) + RADV_MAX_HIT_ATTRIB_SIZE;
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uint32_t ret = call_idx_base + nir_intrinsic_call_idx(intr) + 1;
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b_shader.cursor = nir_instr_remove(instr);
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uint32_t ret_idx = call_idx_base + nir_intrinsic_call_idx(intr) + 1;
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nir_store_var(
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&b_shader, vars->stack_ptr,
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nir_iadd_imm(&b_shader, nir_load_var(&b_shader, vars->stack_ptr), size), 1);
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nir_store_scratch(&b_shader, nir_imm_int(&b_shader, ret),
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nir_store_scratch(&b_shader, nir_imm_int(&b_shader, ret_idx),
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nir_load_var(&b_shader, vars->stack_ptr), .align_mul = 16);
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nir_store_var(&b_shader, vars->stack_ptr,
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@ -483,7 +484,6 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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}
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case nir_intrinsic_rt_resume: {
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uint32_t size = align(nir_intrinsic_stack_size(intr), 16) + RADV_MAX_HIT_ATTRIB_SIZE;
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b_shader.cursor = nir_instr_remove(instr);
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nir_store_var(
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&b_shader, vars->stack_ptr,
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@ -491,8 +491,6 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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break;
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}
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case nir_intrinsic_rt_return_amd: {
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b_shader.cursor = nir_instr_remove(instr);
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if (shader->info.stage == MESA_SHADER_RAYGEN) {
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nir_store_var(&b_shader, vars->idx, nir_imm_int(&b_shader, 0), 1);
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break;
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@ -501,39 +499,30 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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break;
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}
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case nir_intrinsic_load_scratch: {
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b_shader.cursor = nir_before_instr(instr);
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nir_instr_rewrite_src_ssa(
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instr, &intr->src[0],
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nir_iadd(&b_shader, nir_load_var(&b_shader, vars->stack_ptr), intr->src[0].ssa));
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break;
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continue;
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}
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case nir_intrinsic_store_scratch: {
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b_shader.cursor = nir_before_instr(instr);
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nir_instr_rewrite_src_ssa(
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instr, &intr->src[1],
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nir_iadd(&b_shader, nir_load_var(&b_shader, vars->stack_ptr), intr->src[1].ssa));
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break;
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continue;
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}
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case nir_intrinsic_load_rt_arg_scratch_offset_amd: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->arg);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->arg);
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break;
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}
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case nir_intrinsic_load_shader_record_ptr: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->shader_record_ptr);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->shader_record_ptr);
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break;
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}
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case nir_intrinsic_load_ray_launch_id: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_global_invocation_id(&b_shader, 32);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_global_invocation_id(&b_shader, 32);
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break;
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}
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case nir_intrinsic_load_ray_launch_size: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *launch_size_addr =
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nir_load_ray_launch_size_addr_amd(&b_shader);
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@ -547,74 +536,53 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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nir_channel(&b_shader, xy, 1),
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z,
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};
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, nir_vec(&b_shader, xyz, 3));
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ret = nir_vec(&b_shader, xyz, 3);
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break;
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}
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case nir_intrinsic_load_ray_t_min: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->tmin);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->tmin);
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break;
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}
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case nir_intrinsic_load_ray_t_max: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->tmax);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->tmax);
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break;
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}
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case nir_intrinsic_load_ray_world_origin: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->origin);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->origin);
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break;
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}
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case nir_intrinsic_load_ray_world_direction: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->direction);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->direction);
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break;
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}
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case nir_intrinsic_load_ray_instance_custom_index: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->custom_instance_and_mask);
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ret = nir_load_var(&b_shader, vars->custom_instance_and_mask);
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ret = nir_iand_imm(&b_shader, ret, 0xFFFFFF);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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break;
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}
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case nir_intrinsic_load_primitive_id: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->primitive_id);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->primitive_id);
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break;
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}
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case nir_intrinsic_load_ray_geometry_index: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->geometry_id_and_flags);
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ret = nir_load_var(&b_shader, vars->geometry_id_and_flags);
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ret = nir_iand_imm(&b_shader, ret, 0xFFFFFFF);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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break;
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}
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case nir_intrinsic_load_instance_id: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->instance_id);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->instance_id);
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break;
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}
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case nir_intrinsic_load_ray_flags: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->flags);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->flags);
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break;
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}
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case nir_intrinsic_load_ray_hit_kind: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->hit_kind);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->hit_kind);
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break;
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}
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case nir_intrinsic_load_ray_world_to_object: {
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unsigned c = nir_intrinsic_column(intr);
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *instance_node_addr = nir_load_var(&b_shader, vars->instance_addr);
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nir_ssa_def *wto_matrix[3];
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nir_build_wto_matrix_load(&b_shader, instance_node_addr, wto_matrix);
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@ -623,18 +591,15 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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for (unsigned i = 0; i < 3; ++i)
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vals[i] = nir_channel(&b_shader, wto_matrix[i], c);
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nir_ssa_def *val = nir_vec(&b_shader, vals, 3);
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ret = nir_vec(&b_shader, vals, 3);
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if (c == 3)
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val = nir_fneg(&b_shader,
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nir_build_vec3_mat_mult(&b_shader, val, wto_matrix, false));
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, val);
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ret = nir_fneg(&b_shader,
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nir_build_vec3_mat_mult(&b_shader, ret, wto_matrix, false));
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break;
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}
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case nir_intrinsic_load_ray_object_to_world: {
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unsigned c = nir_intrinsic_column(intr);
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *instance_node_addr = nir_load_var(&b_shader, vars->instance_addr);
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nir_ssa_def *val;
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if (c == 3) {
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nir_ssa_def *wto_matrix[3];
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nir_build_wto_matrix_load(&b_shader, instance_node_addr, wto_matrix);
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@ -643,16 +608,14 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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for (unsigned i = 0; i < 3; ++i)
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vals[i] = nir_channel(&b_shader, wto_matrix[i], c);
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val = nir_vec(&b_shader, vals, 3);
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ret = nir_vec(&b_shader, vals, 3);
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} else {
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val = nir_build_load_global(
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ret = nir_build_load_global(
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&b_shader, 3, 32, nir_iadd_imm(&b_shader, instance_node_addr, 92 + c * 12));
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}
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, val);
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break;
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}
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case nir_intrinsic_load_ray_object_origin: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *instance_node_addr = nir_load_var(&b_shader, vars->instance_addr);
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nir_ssa_def *wto_matrix[] = {
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nir_build_load_global(&b_shader, 4, 32,
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@ -664,35 +627,27 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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nir_build_load_global(&b_shader, 4, 32,
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nir_iadd_imm(&b_shader, instance_node_addr, 48),
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.align_mul = 64, .align_offset = 48)};
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nir_ssa_def *val = nir_build_vec3_mat_mult_pre(
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ret = nir_build_vec3_mat_mult_pre(
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&b_shader, nir_load_var(&b_shader, vars->origin), wto_matrix);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, val);
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break;
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}
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case nir_intrinsic_load_ray_object_direction: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *instance_node_addr = nir_load_var(&b_shader, vars->instance_addr);
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nir_ssa_def *wto_matrix[3];
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nir_build_wto_matrix_load(&b_shader, instance_node_addr, wto_matrix);
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nir_ssa_def *val = nir_build_vec3_mat_mult(
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ret = nir_build_vec3_mat_mult(
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&b_shader, nir_load_var(&b_shader, vars->direction), wto_matrix, false);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, val);
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break;
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}
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case nir_intrinsic_load_intersection_opaque_amd: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->opaque);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->opaque);
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break;
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}
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case nir_intrinsic_load_cull_mask: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_ssa_def *ret = nir_load_var(&b_shader, vars->cull_mask);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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ret = nir_load_var(&b_shader, vars->cull_mask);
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break;
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}
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case nir_intrinsic_ignore_ray_intersection: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_store_var(&b_shader, vars->ahit_accept, nir_imm_false(&b_shader), 0x1);
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/* The if is a workaround to avoid having to fix up control flow manually */
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@ -702,7 +657,6 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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break;
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}
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case nir_intrinsic_terminate_ray: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_store_var(&b_shader, vars->ahit_accept, nir_imm_true(&b_shader), 0x1);
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nir_store_var(&b_shader, vars->ahit_terminate, nir_imm_true(&b_shader), 0x1);
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@ -713,7 +667,6 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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break;
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}
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case nir_intrinsic_report_ray_intersection: {
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b_shader.cursor = nir_instr_remove(instr);
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nir_push_if(
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&b_shader,
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nir_iand(
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@ -729,8 +682,12 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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break;
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}
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default:
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break;
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continue;
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}
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if (ret)
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, ret);
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nir_instr_remove(instr);
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break;
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}
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case nir_instr_type_jump: {
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