Commit Graph

87633 Commits

Author SHA1 Message Date
Rob Clark 832dddcf91 freedreno/ir3: rework varying slots (maybe??)
See:
dEQP-GLES2.functional.shaders.swizzles.vector_swizzles.mediump_vec2_yyyy_fragment

if we only access (in FS) varying.y then it ends up in slot zero..  I'm
not sure the hw likes that..

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-30 13:49:57 -05:00
Ilia Mirkin 36c648b894 spirv: always expose SpvCapabilityStorageImageExtendedFormats
I forgot to do this in commit 76b97d544e ("anv: enable storage image
extended formats"). Since both drivers support this now, no need for the
conditional enable.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-29 22:09:58 -05:00
Ilia Mirkin c633f228b4 anv: add support for extended texture gather
Now that the SPIR-V -> NIR translation is in place, no additional logic
is required.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-12-29 20:43:33 -05:00
Dave Airlie 80bafc0c11 radv: only allow cmask/dcc in color optimal.
I had this on transfers due to the clear color cmd, but
it seems like that path shouldn't get fast clears.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-30 00:04:16 +00:00
Dave Airlie 1814df7ea7 radv: only allow cmask/dcc on exclusive or concurrent with graphics queue.
Otherwise we don't get the barriers to flush dcc etc.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-30 00:04:01 +00:00
Jason Ekstrand a4d1eb443e nir: Rewrite lower_regs_to_ssa to use the phi builder
This keeps some of Connor's original code.  However, while I was at it,
I updated this very old pass to a bit more modern NIR.
2016-12-29 16:02:44 -08:00
Jason Ekstrand 67a70889f6 nir/phi-builder: Set the value in the block when creating a phi
After we figure out the value that we are going to return, we have a
loop that walks up the dominance tree and sets the value in each of the
blocks that doesn't have one yet.  In the case of the phi, the def is
set to NEEDS_PHI not NULL, so the last one where the phi node actually
goes never gets filled out.  This can lead to duplicating the phi node
unnecessarily.
2016-12-29 16:02:44 -08:00
Jason Ekstrand baf1aa1334 nir: Add foreach_register helper macros 2016-12-29 16:02:44 -08:00
Jason Ekstrand fb181196de nir: Rename convert_to_ssa lower_regs_to_ssa
This matches the naming of nir_lower_vars_to_ssa, the other to-SSA pass.
2016-12-29 16:02:44 -08:00
Timothy Arceri 194537ebe4 mesa/glsl/i965: remove Driver.NewShader()
After removing brw_shader in the previous commit this is no longer
needed.

V2: remove use in src/compiler/glsl/test_optpass.cpp

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:17 +11:00
Timothy Arceri 718a0cf49f i965: move compiled_once flag to brw_program
This allows us to delete brw_shader and removes the last use of
gl_linked_shader in the codegen paths.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 8417bf528e mesa/glsl: move BlendSupport bitfield to gl_program
This will let us to make _CurrentFragmentProgram a gl_program pointer
allowing for simpilifications to be made.

We also need to add a field to gl_shader to hold it during parsing.

In gl_program we put it inside a union in anticipation of moving
more fields here that can be only fs or vertex stage fields.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 3177eef392 mesa: store gl_program in gl_transform_feedback_object rather than gl_shader_program
This will allow us to make the CurrentProgram array store gl_program which allows
us to do a bunch of simplifications.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 700bc94dce mesa/glsl: move LinkedTransformFeedback from gl_shader_program to gl_program
This will help allow us to store gl_program in the CurrentProgram array rather
than gl_shader_program which will allow a bunch of simplifications.

Note that we make LinkedTransformFeedback a pointer so we don't waste
memory creating a struct for each stage. We also store a pointer to
the gl_program that will contain the pointer in gl_shader_program so
we can get easy access to the correct stage.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 31c04e4e22 i965: get LinkedTransformFeedback from gl_transform_feedback_object
We have already set the gl_shader_program pointer to the correct
shader program in _mesa_BeginTransformFeedback() so use it.

This is more consistent with how we do it for gen7.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 29d70f5de9 mesa: move _Used to gl_program
We no longer need to initialise it because gl_program is never reused.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 8a69ae5345 mesa/compiler: add local_size_variable to shader_info
This will be used in api_validate.c in a following patch when we
switch to using gl_program pointers for the pipelines CurrentProgram
array.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 9ea513e226 mesa: pass gl_program to _mesa_append_uniforms_to_file()
This now contains everything we need.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri b51bfbdd85 glsl/mesa: set separate_shader directly in shader_info
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 41dd6c3539 mesa/glsl: move subroutine metadata to gl_program
This will allow us to store gl_program rather than gl_shader_program
as the current program perstage which allows us to simplify code
that makes use of the CurrentProgram list.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:16 +11:00
Timothy Arceri 0de6f6223a mesa/compiler: add stage to shader_info
This will allow us to simplify the current program logic for SSO.

Also since we aim to detach shader_info from nir_shader this will come
in handy avoiding passing nir_shader around just to keep track of
the stage we are dealing with.

V2: set stage for arb asm programs also.

Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-30 10:57:15 +11:00
Eric Anholt 88b41239f9 vc4: Rework scheduling of thread switch to cut one more NOP.
Jonas's patch got us most of the benefit of scheduling instructions into
the delay slots of thread switch, but if there had been nothing to pair
the thrsw with, it would move the thrsw up and leave a NOP where the thrsw
was.

Instead, don't pair anything with thrsw through the normal scheduling
path, and have a separate helper function that inserts the thrsw earlier
if possible and inserts any necessary NOPs.

total instructions in shared programs: 93027 -> 92643 (-0.41%)
instructions in affected programs:     14952 -> 14568 (-2.57%)
2016-12-29 15:22:54 -08:00
Jonas Pfeil d82dbc4cde vc4: Fill thread switching delay slots
Scan for instructions without a signal set in front of the switching
instruction and move the signal up there.

shader-db results:

total instructions in shared programs: 94494 -> 93027 (-1.55%)
instructions in affected programs:     23545 -> 22078 (-6.23%)

v2: Fix re-emitting of the instruction in the loop trying to emit NOPs,
    drop a scheduling change from branch delay slots. (by anholt)

Signed-off-by: Jonas Pfeil <pfeiljonas@gmx.de>
2016-12-29 14:41:09 -08:00
Eric Anholt 63e7671c7e vc4: Enable NIR-based loop unrolling.
This successfully unrolls a new shader in GLB2.7, which also gets that
shader to successfully compile in multithreaded mode.
2016-12-29 14:41:09 -08:00
Timothy Arceri 5f323198ea nir: stop gcc warning about uninitialised variables
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-12-29 13:47:11 +11:00
Dave Airlie 44f833ab18 radv: denote support for extended storage image formats.
I'm sure anv has support for these as well, but this is just
a first use of the interface to allow different supported spir-v
features.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-28 22:44:40 +00:00
Dave Airlie de7dd4d621 spirv: add interface for drivers to define support extensions.
I expect over time the struct contents will change as all
drivers support stuff etc, but for now this should be a good
starting point.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-28 22:43:17 +00:00
Chad Versace 464b23b1f2 mesa/shaderobj: Fix races on refcounts
Use atomic ops when updating gl_shader::RefCount.

Fixes intermittent failures and crashes in
'dEQP-EGL.functional.sharing.gles2.multithread.*'.
All tests in that group now pass except
'dEQP-EGL.functional.sharing.gles2.multithread.simple_egl_server_sync.textures.copyteximage2d_texsubimage2d_render'.

Tested with:
  mesa: branch 'master' at d6545f2
  deqp: branch 'nougat-cts-dev' at 4acf725 with additional local fixes
  DEQP_TARGET: x11_egl
  hw: Intel Broadwell 0x1616

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99085
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Cc: Mark Janes <mark.a.janes@intel.com>
Cc: Haixia Shi <hshi@chromium.org>
2016-12-28 11:10:43 -08:00
Rob Clark ec01ef2db1 freedreno/ir3: fix linkage::var size
It should actually be 32 for a4xx/a5xx.. we still only advertise 16 but
for a5xx the linkage map includes position/psize.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-27 16:54:01 -05:00
Rob Clark c416ea31cf freedreno/ir3: treat clipvertex like a normal varying
We need this in case it is streamed out.  Not sure why we were treating
it specially before.  Having it as a VS out is harmless if FS doesn't
have a matching input.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-27 16:54:01 -05:00
Rob Clark d10c5a2481 freedreno/a5xx: transform-feedback support
We'll need to revisit when adding hw binning pass support, whether we
can still do this in main draw step, as we do w/ a3xx/a4xx, or if we
needed to move it to the binning stage.

Still some failing piglits but most tests pass and the common cases seem
to work.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-27 16:54:01 -05:00
Rob Clark 928e9bd602 freedreno: update generated headers
Pull in a5xx streamout related regs.  Also fixes a couple incorrect
register definitions.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-27 16:54:01 -05:00
Rob Clark 6d77ceb701 freedreno/ir3: UBO support for 64b GPUs (a5xx)
Update address calculation to support 64b addresses.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-27 16:54:01 -05:00
Rob Clark fc10dc9fde freedreno/ir3: rework location of driver constants
Rework how we lay out driver constants (driver-params, UBO/TFBO buffer
addresses, immediates) for more flexibility.  For a5xx+ we need to deal
with the fact that gpu ptrs are 64b instead of 32b, which makes the
fixed offset scheme not work so well.  While we are dealing with that
we might also make the layout more dynamic to account for varying # of
UBOs, etc.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-27 16:54:01 -05:00
Rob Clark 09202cde7e freedreno/a5xx: fix emit for bo addresses
Reloc for the buffer address is two dwords on 64b devices (a5xx+)

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-27 16:54:01 -05:00
Rob Clark f043904080 freedreno/a5xx: texture layout
Seems to be imilar to a4xx, and sampler state "array-pitch" needs
to be aligned to page size.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-12-27 16:54:01 -05:00
Rob Clark 859cb24d94 ttn: set ->info->num_ubos
For dealing w/ 32b vs 64b gpu addresses, I need to rework how we pass
UBO buffer addresses to shader, and knowing up front the # of UBOs is
useful.  But I noticed ttn wasn't setting this.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-12-27 16:54:01 -05:00
Chad Versace d6545f2345 anv: Handle vkGetPhysicalDeviceQueueFamilyProperties with count == 0
The spec implicitly allows the incoming count to be 0. From the Vulkan
1.0.38 spec, Section 4.1 Physical Devices:

    If the value referenced by pQueueFamilyPropertyCount is not 0 [then
    do stuff].

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-12-27 12:31:34 -08:00
Chad Versace b85c0b569f egl: Emit correct error when robust context creation fails
Fixes dEQP-EGL.functional.create_context_ext.robust_*
on Intel with GBM.

If the user sets the EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR in
EGL_CONTEXT_FLAGS_KHR when creating an OpenGL ES context, then
EGL_KHR_create_context spec requires that we unconditionally emit
EGL_BAD_ATTRIBUTE because that flag does not exist for OpenGL ES. When
creating an OpenGL context, the spec requires that we emit EGL_BAD_MATCH
if we can't support the request; that error is generated in the egl_dri2
layer where the driver capability is actually checked.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99188
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2016-12-27 10:21:29 -08:00
Damien Grassart 75252826e8 anv: return count of queue families written
The Vulkan spec indicates that
vkGetPhysicalDeviceQueueFamilyProperties() should overwrite
pQueueFamilyPropertyCount with the number of structures actually
written to pQueueFamilyProperties.

Signed-off-by: Damien Grassart <damien@grassart.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: mesa-stable@lists.freedesktop.org
2016-12-27 10:15:47 -08:00
Chad Versace e2d69d5e2d i965: Allow import/export of ARGB1555 images
To my knowledge, this fixes no tests. I simply wrote the patch for
completeness as a follow-up to the previous two patches.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2016-12-27 09:14:04 -08:00
Chad Versace f3739810e3 mesa/texformat: Handle GL_RGBA + GL_UNSIGNED_SHORT_5_5_5_1
_mesa_choose_tex_format() already handles GL_RGBA + GL_UNSIGNED_SHORT_1_5_5_5_REV
by converting it to MESA_FORMAT_B5G5R5A1_UNORM. Teach it do the same for
the non-reversed type. Otherwise, the switch's fallthrough converts it
to an 8888 format, which has incompatible precision in the alpha
channel.

Patch 2/2 to fix dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8
on Intel.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99185
Cc: Haixia Shi <hshi@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-12-27 09:14:00 -08:00
Chad Versace 9aa6ab0748 dri: Add __DRI_IMAGE_FORMAT_ARGB1555
This allows eglCreateImage() to accept textures of said format.

Patch 1/2 to fix
dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8
on Intel.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99185
Cc: Haixia Shi <hshi@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-12-27 09:13:43 -08:00
Tapani Pälli 4d6d4f939e egl/dri2: implement query surface hook
This makes better guarantee that the values we return are
in sync what the underlying drawable currently has.

Together with dEQP change in bug #98327 this fixes following test:

   dEQP-EGL.functional.resize.surface_size.grow

v2: avoid unnecessary x11 roundtrips (Chad Versace)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98327
2016-12-27 08:01:08 +02:00
Dave Airlie d8423772ca radv: add some asserts for operations on general queue
These might be useful in the future, or not.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-27 03:27:14 +00:00
Bas Nieuwenhuizen 059af2515a radv: Also skip DCC clear flushes for compute.
(airlied: fixes DOOM hang with compute queue enabled)
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
2016-12-27 03:27:13 +00:00
Dave Airlie 3fd306b423 radv: handle queue present directly to winsys
Don't call the QueueSubmit interface, just call direct to the
winsys, so we can pass the wait semaphores.

Noticed while debugging doom, doesn't fix anything.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-26 22:20:35 +00:00
Jordan Justen 097c9dc2d4 intel/blorp_blit: Fix max blit size for gen6
Fixes ES3-CTS.gtf.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_stencil_blit

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-12-26 08:50:21 -08:00
Dave Airlie b5bb8b54cf radv: fix rendering to b10g11r11_ufloat_pack32
doom was causing a printf about an illegal color, it was due the
non-void returning -1, and the other function checking for 4,
align these.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-26 10:31:20 +10:00
Dave Airlie 4813c9ade7 radv: handle multi-component shared load/stores.
This was seen in doom shaders, so handle it properly.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave AIrlie <airlied@redhat.com>
2016-12-26 10:31:20 +10:00