freedreno: update generated headers
Pull in a5xx streamout related regs. Also fixes a couple incorrect register definitions. Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark
parent
6d77ceb701
commit
928e9bd602
|
|
@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
|
|||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 22914 bytes, from 2016-12-12 16:26:45)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110765 bytes, from 2016-11-26 23:01:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 96819 bytes, from 2016-12-15 15:23:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 99224 bytes, from 2016-12-26 18:40:41)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00)
|
||||
|
||||
Copyright (C) 2013-2016 by the following authors:
|
||||
|
|
|
|||
|
|
@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
|
|||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 22914 bytes, from 2016-12-12 16:26:45)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110765 bytes, from 2016-11-26 23:01:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 96819 bytes, from 2016-12-15 15:23:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 99224 bytes, from 2016-12-26 18:40:41)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00)
|
||||
|
||||
Copyright (C) 2013-2016 by the following authors:
|
||||
|
|
|
|||
|
|
@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
|
|||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 22914 bytes, from 2016-12-12 16:26:45)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110765 bytes, from 2016-11-26 23:01:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 96819 bytes, from 2016-12-15 15:23:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 99224 bytes, from 2016-12-26 18:40:41)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00)
|
||||
|
||||
Copyright (C) 2013-2016 by the following authors:
|
||||
|
|
@ -3024,12 +3024,11 @@ static inline uint32_t A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val)
|
|||
static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_1(uint32_t i0) { return 0x0000220b + 0x4*i0; }
|
||||
|
||||
static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_2(uint32_t i0) { return 0x0000220c + 0x4*i0; }
|
||||
#define A4XX_VFD_FETCH_INSTR_2_SIZE__MASK 0xfffffff0
|
||||
#define A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT 4
|
||||
#define A4XX_VFD_FETCH_INSTR_2_SIZE__MASK 0xffffffff
|
||||
#define A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT 0
|
||||
static inline uint32_t A4XX_VFD_FETCH_INSTR_2_SIZE(uint32_t val)
|
||||
{
|
||||
assert(!(val & 0xf));
|
||||
return ((val >> 4) << A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_2_SIZE__MASK;
|
||||
return ((val) << A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_2_SIZE__MASK;
|
||||
}
|
||||
|
||||
static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_3(uint32_t i0) { return 0x0000220d + 0x4*i0; }
|
||||
|
|
|
|||
|
|
@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
|
|||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 22914 bytes, from 2016-12-12 16:26:45)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110765 bytes, from 2016-11-26 23:01:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 96819 bytes, from 2016-12-15 15:23:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 99224 bytes, from 2016-12-26 18:40:41)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00)
|
||||
|
||||
Copyright (C) 2013-2016 by the following authors:
|
||||
|
|
@ -2910,29 +2910,64 @@ static inline uint32_t A5XX_VPC_PACK_NUMNONPOSVAR(uint32_t val)
|
|||
|
||||
#define REG_A5XX_VPC_FS_PRIMITIVEID_CNTL 0x0000e2a0
|
||||
|
||||
#define REG_A5XX_UNKNOWN_E2A1 0x0000e2a1
|
||||
#define REG_A5XX_VPC_SO_BUF_CNTL 0x0000e2a1
|
||||
#define A5XX_VPC_SO_BUF_CNTL_BUF0 0x00000001
|
||||
#define A5XX_VPC_SO_BUF_CNTL_BUF1 0x00000008
|
||||
#define A5XX_VPC_SO_BUF_CNTL_BUF2 0x00000040
|
||||
#define A5XX_VPC_SO_BUF_CNTL_BUF3 0x00000200
|
||||
#define A5XX_VPC_SO_BUF_CNTL_ENABLE 0x00008000
|
||||
|
||||
#define REG_A5XX_VPC_SO_OVERRIDE 0x0000e2a2
|
||||
#define A5XX_VPC_SO_OVERRIDE_SO_DISABLE 0x00000001
|
||||
|
||||
#define REG_A5XX_VPC_SO_BUFFER_BASE_LO_0 0x0000e2a7
|
||||
#define REG_A5XX_VPC_SO_CNTL 0x0000e2a3
|
||||
#define A5XX_VPC_SO_CNTL_ENABLE 0x00010000
|
||||
|
||||
#define REG_A5XX_VPC_SO_BUFFER_BASE_HI_0 0x0000e2a8
|
||||
#define REG_A5XX_VPC_SO_PROG 0x0000e2a4
|
||||
#define A5XX_VPC_SO_PROG_A_BUF__MASK 0x00000003
|
||||
#define A5XX_VPC_SO_PROG_A_BUF__SHIFT 0
|
||||
static inline uint32_t A5XX_VPC_SO_PROG_A_BUF(uint32_t val)
|
||||
{
|
||||
return ((val) << A5XX_VPC_SO_PROG_A_BUF__SHIFT) & A5XX_VPC_SO_PROG_A_BUF__MASK;
|
||||
}
|
||||
#define A5XX_VPC_SO_PROG_A_OFF__MASK 0x000007fc
|
||||
#define A5XX_VPC_SO_PROG_A_OFF__SHIFT 2
|
||||
static inline uint32_t A5XX_VPC_SO_PROG_A_OFF(uint32_t val)
|
||||
{
|
||||
assert(!(val & 0x3));
|
||||
return ((val >> 2) << A5XX_VPC_SO_PROG_A_OFF__SHIFT) & A5XX_VPC_SO_PROG_A_OFF__MASK;
|
||||
}
|
||||
#define A5XX_VPC_SO_PROG_A_EN 0x00000800
|
||||
#define A5XX_VPC_SO_PROG_B_BUF__MASK 0x00003000
|
||||
#define A5XX_VPC_SO_PROG_B_BUF__SHIFT 12
|
||||
static inline uint32_t A5XX_VPC_SO_PROG_B_BUF(uint32_t val)
|
||||
{
|
||||
return ((val) << A5XX_VPC_SO_PROG_B_BUF__SHIFT) & A5XX_VPC_SO_PROG_B_BUF__MASK;
|
||||
}
|
||||
#define A5XX_VPC_SO_PROG_B_OFF__MASK 0x007fc000
|
||||
#define A5XX_VPC_SO_PROG_B_OFF__SHIFT 14
|
||||
static inline uint32_t A5XX_VPC_SO_PROG_B_OFF(uint32_t val)
|
||||
{
|
||||
assert(!(val & 0x3));
|
||||
return ((val >> 2) << A5XX_VPC_SO_PROG_B_OFF__SHIFT) & A5XX_VPC_SO_PROG_B_OFF__MASK;
|
||||
}
|
||||
#define A5XX_VPC_SO_PROG_B_EN 0x00800000
|
||||
|
||||
#define REG_A5XX_VPC_SO_BUFFER_SIZE_0 0x0000e2a9
|
||||
static inline uint32_t REG_A5XX_VPC_SO(uint32_t i0) { return 0x0000e2a7 + 0x7*i0; }
|
||||
|
||||
#define REG_A5XX_UNKNOWN_E2AB 0x0000e2ab
|
||||
static inline uint32_t REG_A5XX_VPC_SO_BUFFER_BASE_LO(uint32_t i0) { return 0x0000e2a7 + 0x7*i0; }
|
||||
|
||||
#define REG_A5XX_VPC_SO_FLUSH_BASE_LO_0 0x0000e2ac
|
||||
static inline uint32_t REG_A5XX_VPC_SO_BUFFER_BASE_HI(uint32_t i0) { return 0x0000e2a8 + 0x7*i0; }
|
||||
|
||||
#define REG_A5XX_VPC_SO_FLUSH_BASE_HI_0 0x0000e2ad
|
||||
static inline uint32_t REG_A5XX_VPC_SO_BUFFER_SIZE(uint32_t i0) { return 0x0000e2a9 + 0x7*i0; }
|
||||
|
||||
#define REG_A5XX_UNKNOWN_E2AE 0x0000e2ae
|
||||
static inline uint32_t REG_A5XX_VPC_SO_NCOMP(uint32_t i0) { return 0x0000e2aa + 0x7*i0; }
|
||||
|
||||
#define REG_A5XX_UNKNOWN_E2B2 0x0000e2b2
|
||||
static inline uint32_t REG_A5XX_VPC_SO_BUFFER_OFFSET(uint32_t i0) { return 0x0000e2ab + 0x7*i0; }
|
||||
|
||||
#define REG_A5XX_UNKNOWN_E2B9 0x0000e2b9
|
||||
static inline uint32_t REG_A5XX_VPC_SO_FLUSH_BASE_LO(uint32_t i0) { return 0x0000e2ac + 0x7*i0; }
|
||||
|
||||
#define REG_A5XX_UNKNOWN_E2C0 0x0000e2c0
|
||||
static inline uint32_t REG_A5XX_VPC_SO_FLUSH_BASE_HI(uint32_t i0) { return 0x0000e2ad + 0x7*i0; }
|
||||
|
||||
#define REG_A5XX_PC_PRIMITIVE_CNTL 0x0000e384
|
||||
#define A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__MASK 0x0000007f
|
||||
|
|
|
|||
|
|
@ -741,14 +741,14 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
|
|||
OUT_RING(ring, 0x000000ff); /* VPC_FS_PRIMITIVEID_CNTL */
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_OVERRIDE, 1);
|
||||
OUT_RING(ring, 0x00000001); /* VPC_SO_OVERRIDE */
|
||||
OUT_RING(ring, A5XX_VPC_SO_OVERRIDE_SO_DISABLE);
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO_0, 3);
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO(0), 3);
|
||||
OUT_RING(ring, 0x00000000); /* VPC_SO_BUFFER_BASE_LO_0 */
|
||||
OUT_RING(ring, 0x00000000); /* VPC_SO_BUFFER_BASE_HI_0 */
|
||||
OUT_RING(ring, 0x00000000); /* VPC_SO_BUFFER_SIZE_0 */
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_FLUSH_BASE_LO_0, 2);
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_FLUSH_BASE_LO(0), 2);
|
||||
OUT_RING(ring, 0x00000000); /* VPC_SO_FLUSH_BASE_LO_0 */
|
||||
OUT_RING(ring, 0x00000000); /* VPC_SO_FLUSH_BASE_HI_0 */
|
||||
|
||||
|
|
@ -776,10 +776,10 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
|
|||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E29A, 1);
|
||||
OUT_RING(ring, 0x00ffff00); /* UNKNOWN_E29A */
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E2A1, 1);
|
||||
OUT_RING(ring, 0x00000000); /* UNKNOWN_E2A1 */
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_BUF_CNTL, 1);
|
||||
OUT_RING(ring, 0x00000000); /* VPC_SO_BUF_CNTL */
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E2AB, 1);
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(0), 1);
|
||||
OUT_RING(ring, 0x00000000); /* UNKNOWN_E2AB */
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E389, 1);
|
||||
|
|
@ -794,12 +794,12 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
|
|||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1);
|
||||
OUT_RING(ring, 0x00000000); /* UNKNOWN_E5C2 */
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E2AE, 3);
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO(1), 3);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E2B2, 6);
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(1), 6);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
|
|
@ -807,7 +807,7 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
|
|||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E2B9, 6);
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(2), 6);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
|
|
@ -815,7 +815,7 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
|
|||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
|
||||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E2C0, 3);
|
||||
OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(3), 3);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
OUT_RING(ring, 0x00000000);
|
||||
|
|
|
|||
|
|
@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
|
|||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 22914 bytes, from 2016-12-12 16:26:45)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110765 bytes, from 2016-11-26 23:01:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 96819 bytes, from 2016-12-15 15:23:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 99224 bytes, from 2016-12-26 18:40:41)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00)
|
||||
|
||||
Copyright (C) 2013-2016 by the following authors:
|
||||
|
|
|
|||
|
|
@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from are:
|
|||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 22914 bytes, from 2016-12-12 16:26:45)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110765 bytes, from 2016-11-26 23:01:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 96819 bytes, from 2016-12-15 15:23:48)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 99224 bytes, from 2016-12-26 18:40:41)
|
||||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00)
|
||||
|
||||
Copyright (C) 2013-2016 by the following authors:
|
||||
|
|
@ -67,6 +67,10 @@ enum vgt_event_type {
|
|||
PERFCOUNTER_STOP = 24,
|
||||
VS_FETCH_DONE = 27,
|
||||
FACENESS_FLUSH = 28,
|
||||
FLUSH_SO_0 = 17,
|
||||
FLUSH_SO_1 = 18,
|
||||
FLUSH_SO_2 = 19,
|
||||
FLUSH_SO_3 = 20,
|
||||
UNK_19 = 25,
|
||||
UNK_1C = 28,
|
||||
UNK_1D = 29,
|
||||
|
|
|
|||
Loading…
Reference in New Issue