Commit Graph

71789 Commits

Author SHA1 Message Date
Matt Turner 5f247a9656 glx: Use _mesa_lroundevenf() in glPixelStoref().
Functional change in which way half-way cases are rounded from towards
positive-infinity to even. The spec says "the passed value is rounded to
the nearest integer". Removes another case of bad half-up rounding.
2015-08-04 10:33:16 -07:00
Matt Turner 680de24545 util: Use SSE intrinsics in _mesa_lroundeven{f,}.
gcc actually generates this for us now that we use -fno-math-errno
(which is weird, since lrintf()/lrint() don't set errno) but clang still
does not. Presumably helps MSVC as well.

Reduced .text size by 8.5k with gcc before -fno-math-errno.

   text     data      bss      dec      hex  filename
4935850   195136    26192  5157178   4eb13a  i965_dri.so before
4927225   195128    26192  5148545   4e8f81  i965_dri.so after

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-08-04 10:33:13 -07:00
Matt Turner 3c050222b0 mesa: Use _mesa_lroundevenf() in some more places. 2015-08-04 10:32:39 -07:00
Vinson Lee 996349cb19 vl/mpeg12: Silence GCC unused-variable warning.
vl/vl_mpeg12_bitstream.c: In function 'decode_slice':
vl/vl_mpeg12_bitstream.c:928:19: warning: unused variable 'extra' [-Wunused-variable]
          unsigned extra = vl_vlc_get_uimsbf(&bs->vlc, 1);
                   ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-03 23:09:03 -07:00
Alejandro Seguí e23cbaadaa glsl: replace old hash table with new and faster one
The util/hash_table was intended to be a fast hash table
replacement for the program/hash_table see 35fd61bd99 and
72e55bb688.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-08-04 12:31:05 +10:00
Ian Romanick 7ac946e546 glsl: Add constuctors for the common cases of glsl_struct_field
Fixes a giant pile of GCC warnings:

builtin_types.cpp:60:1: warning: missing initializer for member 'glsl_struct_field::stream' [-Wmissing-field-initializers]

I had to add a default constructor because a non-default constructor
was added.  Otherwise the only constructor would be the one with
parameters, and all the plases like

    glsl_struct_field foo;

would fail to compile.

I wanted to do this in two patches.  All of the initializers of
glsl_struct_field structures had to be converted to use the
constructor because C++ apparently forces you to do one or the other:

builtin_types.cpp:61:1: error: could not convert '{glsl_type::float_type, "near", -1, 0, 0, 0, GLSL_MATRIX_LAYOUT_INHERITED, 0, -1}' from '<brace-enclosed initializer list>' to 'glsl_struct_field'

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:07:04 -07:00
Ian Romanick 93977d3a15 i965: Make gen7_upload_ps_state static
It is only ever called from within the same file.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:05:00 -07:00
Ian Romanick 7a12e646d3 i965: Remove extern declaration for nonexistent state atom
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:58 -07:00
Ian Romanick d302f51a1e i965: Trivial formatting changes in gen7_vs_state.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:56 -07:00
Ian Romanick f917a65b3e i965: Trivial formatting changes in gen6_multisample_state.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:53 -07:00
Ian Romanick 07433760e3 i965: Trivial formatting changes in brw_misc_state.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:51 -07:00
Ian Romanick 680d09b072 i965: Trivial formatting changes in brw_draw_upload.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:49 -07:00
Ian Romanick 5b6218395c i965: Trivial formatting changes in brw_draw.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:47 -07:00
Ian Romanick 2b81cefb3f i965: Trivial formatting changes in brw_wm.c
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2015-08-03 11:04:20 -07:00
Iago Toral Quiroga da1b1bf85c i965/nir: Do not scalarize phis in non-scalar setups
Significantly reduces register pressure in some piglit tests.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:51 -07:00
Antia Puentes 34d162260f i965/vec4: Handle uniform and GRF array access on vertex programs (NIR)
When the NIR-vec4 pass is enabled, handles uniform and GRF array access
on ARB_vertex_program like it is done on vertex shaders.

When the old IR-vec4 pass is used, emit_program_code() emits pull constant
loads directly instead of using relative addressing, hence to call to
move_uniform_array_access_to_pull_constants() is not needed and it is enough
to call to split_uniform_registers().

The patch also calls to move_grf_array_access_to_scratch() like it is
done for shaders, however I suspect this is a no-op for vertex programs and
we could remove it.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:51 -07:00
Antia Puentes 82f2e706bf i965/nir/vec4: Handle uniforms on vertex programs
The implementation takes into account that on ARB_vertex_program
only a single nir variable is generated to support all the uniform data.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:51 -07:00
Antia Puentes 90825e3ca9 i965/vec4: Enable NIR-vec4 pass on ARB_vertex_programs
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:51 -07:00
Iago Toral Quiroga 287b006a67 i965/nir/gs: Implement support for gl_InvocationID system value
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Samuel Iglesias Gonsalvez 7eced3aa86 i965/gs/gen6: Refactor ir_emit_vertex and ir_end_primitive for gen6
So the implementation is independent of GLSL IR and the visit methods of the
gen6 GS visitor. This way we will be able to reuse that implementation directly
from the NIR vec4 backend.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Iago Toral Quiroga 1836201fde i965/nir/gs: Implement EmitVertex and EndPrimitive
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Iago Toral Quiroga 551af29d2d i965/nir/gs: Handle geometry shaders inputs
Outputs from the vertex shader become array inputs in the geomtry shader,
but the arrays are interleaved, so we need to map our inputs accordingly.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Iago Toral Quiroga 7ade42755f i965/gs: Refactor ir_emit_vertex and ir_end_primitive
So the implementation is independent of GLSL IR and the visit methods of the
vec4 visitor. This way we will be able to reuse that implementation directly
from the NIR vec4 backend.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Iago Toral Quiroga 38fc4a91cd i965/nir: Enable NIR-vec4 pass on geometry shaders
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Samuel Iglesias Gonsalvez 418c004f80 nir: Fix output swizzle in get_mul_for_src
Avoid copying an overwritten swizzle, use the original values.

Example:

   Former swizzle[] = xyzw
   src->swizzle[] = zyxx

The expected output swizzle = zyxx but if we reuse swizzle in the loop,
then output swizzle would be zyzz.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Alejandro Piñeiro 19cf934f7f i965/nir/vec4: Add implementation of nir_emit_texture()
Uses the nir structure to get all the info needed (sources,
dest reg, etc), and then it uses the common
vec4_visitor::emit_texture to emit the final code.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Alejandro Piñeiro 1343f403b2 i965/ir/vec4: Refactor visit(ir_texture *ir)
Splitted in two. The emission is moved to a new vec4_visitor
method, vec4_visitor::emit_texture, ir order to be reused
on the nir path.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Alejandro Piñeiro 0d43d27df7 i965/vec4: Add a new dst_reg constructor accepting a brw_reg_type
This is useful for the upcoming texture support in NIR->vec4 pass,
as we found several cases where the brw_type is available, but not
the glsl_type.

Without this new constructor, the alternative would be:
dst_reg reg(MRF, <reg>)
reg.type = <brw_type>
reg.writemask = <mask>

Adding a new constructor makes code easier to read.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Alejandro Piñeiro c15eea2afa i965/vec4: Change vec4_visitor::swizzle_result() method to allow reuse
This patch changes the signature of swizzle_result() to accept lower
level arguments. The purpose is to reuse it in the upcoming NIR->vec4
pass.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev 57182332b8 i965/vec4: Change vec4_visitor::gather_channel() method to allow reuse
This patch changes the signature of gather_channel() to accept the gather
component directly instead of fetching it internally from ir_texture.
This will allow reuse in the upcoming NIR->vec4 pass.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev 72c8d7721f i965/vec4: Change vec4_visitor::emit_mcs_fetch() method to allow reuse
This patch changes the signature of emit_mcs_fetch() to accept lower level
arguments. The purpose is to reuse it in the upcoming NIR->vec4 pass.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev 434481f315 i965/vec4: Move is_high_sample() method to vec4_visitor class
The is_high_sample() method is currently accessible only in the implementation of
vec4_visitor. Since we need to reuse it in the upcoming NIR->vec4 pass, lets make
it a method of the class instead.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev db8a6de571 i965/nir: Add new utility method brw_glsl_base_type_for_nir_type()
This method returns the glsl_base_type corresponding to a nir_alu_type.
It will factorize code currently present in fs_nir, that can be reused
in vec4_nir on its upcoming emit_texture support.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Eduardo Lima Mitev 583c1c6170 i965/nir/vec4: Implement nir_emit_jump
This implementation is taken as-is from fs_nir.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Antia Puentes 9b4a6fa4c0 i965/nir/vec4: Mark as unreachable ops that should be already lowered
NIR ALU operations:
   * nir_op_fabs
   * nir_op_iabs
   * nir_op_fneg
   * nir_op_ineg
   * nir_op_fsat
        should be lowered by lower_source mods

   * nir_op_fdiv
        should be lowered in the compiler by DIV_TO_MUL_RCP.

   * nir_op_fmod
        should be lowered in the compiler by MOD_TO_FLOOR.

   * nir_op_fsub
   * nir_op_isub
        should be handled by ir_sub_to_add_neg.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:50 -07:00
Antia Puentes 16072834ba i965/nir/vec4: Implement vector "any" operation
Adds NIR ALU operations:
   * nir_op_bany2
   * nir_op_bany3
   * nir_op_bany4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes fa4e3c3c9f i965/nir/vec4: Implement the dot product operation
Adds NIR ALU operations:
   * nir_op_fdot2
   * nir_op_fdot3
   * nir_op_fdot4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes 96106e2a9f i965/nir/vec4: Implement conditional select
Adds NIR ALU operations:
   * nir_op_bcsel

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes b38fcd0aea i965/nir/vec4: Implement linear interpolation
Adds NIR ALU operation:
   * nir_op_flrp

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes 314474872b i965/vec4: Return the emitted instruction in emit_lrp()
Needed in the NIR backend to set the "saturate" value of the
instruction.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes b64bd1fdc3 i965/nir/vec4: Implement floating-point fused multiply-add
Adds NIR ALU operation:
   * nir_op_ffma

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes d12e165dbb i965/nir/vec4: Implement "shift" operations
Adds NIR ALU operations:
   * nir_op_ishl
   * nir_op_ishr
   * nir_op_ushr

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes 798cb33a25 i965/nir/vec4: Implement the "sign" operation
Follows the vec4_visitor IR implementation but
sets the saturate value in addition.

Adds NIR ALU operations:
   * nir_op_fsign
   * nir_op_isign

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes 8e1e6facbf i965/nir/vec4: Implement bit operations
Same implementation than the IR case.

Adds NIR ALU operations:
   * nir_op_bitfield_reverse
   * nir_op_bit_count
   * nir_op_ufind_msb
   * nir_op_ifind_msb
   * nir_op_find_lsb
   * nir_op_ubitfield_extract
   * nir_op_ibitfield_extract
   * nir_op_bfm
   * nir_op_bfi
   * nir_op_bitfield_insert

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes 0e874985ce i965/nir/vec4: Implement pack/unpack operations
* Lowered floating-point pack and unpack operations are not valid in VS.

* Pack and unpack 2x16 operations should be handled by lower_packing_builtins.

* Adds NIR ALU operations:
   * nir_op_pack_half_2x16
   * nir_op_unpack_half_2x16
   * nir_op_unpack_unorm_4x8
   * nir_op_unpack_snorm_4x8
   * nir_op_pack_unorm_4x8
   * nir_op_pack_snorm_4x8

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes 3f10c2f3d7 i965/nir/vec4: "noise" ops should already be lowered
Marked them as unreachable.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes fa4731f4a5 i965/nir/vec4: Implement "bool<->int,float" format conversion
Used the same implementation than the vec4_visitor NIR.

Adds NIR ALU operations:
   * nir_op_b2i
   * nir_op_b2f
   * nir_op_f2b
   * nir_op_i2b

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes f14199a8fb i965/nir/vec4: Implement logical operators
Adds NIR ALU operations:
   * nir_op_inot
   * nir_op_ixor
   * nir_op_ior
   * nir_op_iand

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes 51aeafaf96 i965/nir/vec4: Implement non-equality ops on vectors
Adds NIR ALU operations:
   * nir_op_bany_fnequal2
   * nir_op_bany_inequal2
   * nir_op_bany_fnequal3
   * nir_op_bany_inequal3
   * nir_op_bany_fnequal4
   * nir_op_bany_inequal4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00
Antia Puentes 8be4b876c9 i965/nir/vec4: Implement equality ops on vectors
Adds NIR ALU operations:
   * nir_op_ball_fequal2
   * nir_op_ball_iequal2
   * nir_op_ball_fequal3
   * nir_op_ball_iequal3
   * nir_op_ball_fequal4
   * nir_op_ball_iequal4

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-08-03 09:40:49 -07:00