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Author SHA1 Message Date
Yogesh mohan marimuthu 1005a2a25f radeonsi/gfx11: program inst_pref_size for compute 
For gfx11, program INST_PREF_SIZE value in SPI registers.

v2: move INST_PREF_SIZE reg programming (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 980620ae07 radeonsi/gfx11: program inst_pref_size for graphics 
For gfx11, program INST_PREF_SIZE value in SPI registers.

v4: fix mask value, code indendation (Marek Olšák)
v3: improve code for readability (Indrajit Das, Marek Olšák)
v2: ngg is always enabled in gfx11 (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu 58a483341d radeonsi/gfx11: instruction cache line size is 128 bytes 
In gfx11, instruction cache line size is 128 bytes. This patch makes
the neccessary code changes.

v2: instruction store line size is 64 bytes (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu b07204d780 radeonsi/gfx11: interp changes for 16bit 
make interp 16bit changes for gfx11

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu 0a54fbb5b4 radeonsi/gfx11: interp changes for 32bit 
make interp 32bit changes for gfx11

v2: fix coding indentation issue (Pierre-Eric)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu 3b0bfd254f radeonsi/gfx11: make flat_scratch changes for compute 
make flat_scratch gen11 changes for compute

v5: optimize the code for size (Pierre-Eric)
v4: remove type cast from 64bit to 32bit (Marek Olšák)
    use radeon_set_sh_reg_seq (Marek Olšák)
    combine RSRC and scratch reg write packets (Marek Olšák)
v3: fix coding guidelines (Marek Olšák)
v2: do not skip si_resource_reference() call (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu 02367b29c7 radeonsi/gfx11: make flat_scratch changes for graphics 
gfx11 passes scratch base address using
SPI_GFX_SCRATCH_BASE_LO and _HI registers. Make the
code changes to support the same.

v5: remove type cast from 64bit to 32bit (Marek Olšák)
v4: combine scratch_memory and scratch_state atom (Marek Olšák)
v3: skip shader relocs for gfx11
v2: make atom for scratch_memory (Indrajit)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 27104ff647 radeonsi/gfx11: use the new TCS WaveID SGPR to compute vs_rel_patch_id 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák ced20893d4 radeonsi/gfx11: enable arbitrary DCC format reinterpretation 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 7c423a7ad0 radeonsi/gfx11: enable NGG-only draw paths 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 7bd4dd79c8 radeonsi/gfx11: expect packed threadID VGPRs 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 700c2e74fb radeonsi/gfx11: always allow DCC stores 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 0f033ce3a3 radeonsi/gfx11: increase the hw screen offset alignment 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 273674dde1 ac/surface: add gfx11 support to modifiers tests 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 3e85a0c90b ac/surface: define gfx11 modifiers 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 85c76518c9 ac/surface: gfx11 changes 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák a419b53d12 ac/gpu_info: set cu_mask correctly for gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 7d6e3397dc ac/llvm: don't set GLC for stores on gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 61b6e05118 ac/llvm: update pknorm and waitcnt for gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák ab284b2571 ac/llvm: don't set DLC on gfx11 because it means something else there 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 3d70cc90b7 ac/llvm: export mrt0 instead of null on gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák f24f8665db ac: implement register shadowing for gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 3a669558f2 ac: scratch buffer register changes for gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 783b16b3c8 ac: implement ac_get_tbuffer_format for gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Pierre-Eric Pelloux-Prayer 9480ad2b1c amd: update gfx10_format_table.py for gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 931098d44d ac: don't align VGPRs to 8 or 16 for gfx11 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 1d737c8886 amd: add Mesa-only addrlib changes 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 4fdf42b3c2 amd: import gfx11 addrlib 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 751658a7fe amd: add gfx11 to packet definitions 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 980b7f75e8 amd: enable gfx11 in header generator, fix drivers with renamed gfx6-10 defs 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 0a76313d3f amd/registers: add gfx11-rsrc.json 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák ced3fbbcf9 amd/registers: add gfx11.json 
Other files are also updated to due regeneration.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák f75525fba3 amd/registers: add gfx11 to the json generator 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák 3a2f7efe5e amd/registers: hardcode GC base offsets in the json generator 
gfx11 doesn't have the ip_offset file, so we have to do it this way.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Dave Airlie ceb1339112 radv: precalculate tess ring sizes/offsets. 
These are all static per device, so just calculate at device init
time instead of preamble

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16392>
 2022-05-10 04:06:38 +00:00
Dave Airlie 8dd4054f2b radv: precalculate hs offchip parameters. 
These are per device static, just just precalc them instead of
doing it on every command buffer submission.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16392>
 2022-05-10 04:06:38 +00:00
Karol Herbst 9c5fd100cc nir: add a nir_remove_non_entrypoints helper 
This code just got duplicated a lot. There is still more, but the
remaining instances do a bit more than just removing other functions.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16348>
 2022-05-10 03:37:44 +00:00
Jason Ekstrand 4b67d70d22 nir: Fix constant folding for non-32-bit ifind_msb and clz 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16348>
 2022-05-10 03:37:44 +00:00
Karol Herbst d98b82a103 iris/cs: take buffer offsets into account for CL 
Sadly we pass in an offset, which the driver can't ignore

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16348>
 2022-05-10 03:37:44 +00:00
Karol Herbst 3269d34b29 llvmpipe/fence: make the fence id counter atomic 
Multiple threads can race on the function static variable

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16348>
 2022-05-10 03:37:44 +00:00
Karol Herbst 8cc1889b09 llvmpipe: PIPE_COMPUTE_CAP_GRID_DIMENSION is uint64_t 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16348>
 2022-05-10 03:37:44 +00:00
Mike Blumenkrantz 768ebf02c5 zink: split renderpasses for TextureBarrierNV() usage 
if no fbfetch is present, then this is a draw -> sampler read barrier,
and zink does not emit a self-dependency for this by default

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16354>
 2022-05-10 03:07:55 +00:00
Charmaine Lee 0d456315f9 svga/nir: enable PIPE_CAP_TGSI_TEXCOORD 
Use texcoord semantic instead of generic with nir.
Fixes assert in nir_gather_info with offsetted varying slots.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16414>
 2022-05-10 03:01:36 +00:00
Michel Zou a8b009aed6 vulkan/wsi: fix missing unistd include 
fixes: c72ff19a

Closes #6428

Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16353>
 2022-05-10 02:37:21 +00:00
Emma Anholt af76f0bcfc ci/iris: Cut the glk-deqp test coverage in half. 
It's taking 13-14 minutes of deqp-runner time, not counting booting, or
the LAVA-side job getting being queued behind other jobs.  Well past our
10-minute runtime target, and we saw load on these boards causing the
queue to get quite long
(https://gitlab.freedesktop.org/mesa/mesa/-/issues/6409#note_1368750)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16359>
 2022-05-10 02:16:04 +00:00
Alyssa Rosenzweig 28220b2778 agx: Restore Valve copyright header 
Parallel copy code is from ir3_lower_parallel_copy.c. This was attributed in the
commit message but lost in the copyright header due to a copypaste mistake.
Rectify this.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16413>
 2022-05-10 01:36:18 +00:00
Rhys Perry cc410dd4d1 aco: fix cmpswap global atomic definition on GFX6 
Missed this one.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 2f0bb39e16 ("aco: ensure that definitions fixed to operands have matching regclasses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16367>
 2022-05-10 01:01:13 +00:00
Emma Anholt 5a3aee78cb Revert "ci: remove nouveau from shader-db runs" 
This reverts commit 0464117ad9.  Now that
the shim back-channel communicates with nouveau that the "GPU" is always
idle, we can get the nouveau compiler back into the CI path.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16150>
 2022-05-09 23:10:45 +00:00
Emma Anholt e4ca97111f nouveau: disable fences when running under drm-shim. 
Otherwise, you get a hang at the end of shader-db.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16150>
 2022-05-09 23:10:45 +00:00
Pavel Ondračka c6aa639ba9 r300: skip draws instead of using a dummy vertex shader 
When we fail to compile some vertex shader, we currently use a very
simple dummy one, setting gl_Position to (0,0,0,1), effectively
rendering nothing. Unfortunately, the dummy vertex shader leads to
hangs with RV370 in some rare circumstances. Instead of trying to
fix the shader, just skip the draws altogether when the compilation
fails.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5870
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16387>
 2022-05-09 23:02:57 +00:00