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radeonsi/gfx11: interp changes for 16bit 

make interp 16bit changes for gfx11

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
This commit is contained in:
Yogesh mohan marimuthu 2021-07-21 00:42:59 +05:30 committed by Marge Bot
parent 0a54fbb5b4
commit b07204d780
1 changed files with 46 additions and 16 deletions
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62
src/amd/llvm/ac_llvm_build.c
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@ -995,26 +995,56 @@ LLVMValueRef ac_build_fs_interp_f16(struct ac_llvm_context *ctx, LLVMValueRef ll
LLVMValueRef j, bool high_16bits)
{
LLVMValueRef args[6];
LLVMValueRef p1;
args[0] = i;
args[1] = llvm_chan;
args[2] = attr_number;
args[3] = high_16bits ? ctx->i1true : ctx->i1false;
args[4] = params;
if (ctx->chip_class >= GFX11) {
LLVMValueRef p;
LLVMValueRef p10;
p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1.f16", ctx->f32, args, 5,
AC_FUNC_ATTR_READNONE);
args[0] = llvm_chan;
args[1] = attr_number;
args[2] = params;
args[0] = p1;
args[1] = j;
args[2] = llvm_chan;
args[3] = attr_number;
args[4] = high_16bits ? ctx->i1true : ctx->i1false;
args[5] = params;
p = ac_build_intrinsic(ctx, "llvm.amdgcn.lds.param.load",
ctx->f32, args, 3, AC_FUNC_ATTR_READNONE);
return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2.f16", ctx->f16, args, 6,
AC_FUNC_ATTR_READNONE);
args[0] = p;
args[1] = i;
args[2] = p;
args[3] = high_16bits ? ctx->i1true : ctx->i1false;
p10 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.inreg.p10.f16",
ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
args[0] = p;
args[1] = j;
args[2] = p10;
args[3] = high_16bits ? ctx->i1true : ctx->i1false;
return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.inreg.p2.f16",
ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
} else {
LLVMValueRef p1;
args[0] = i;
args[1] = llvm_chan;
args[2] = attr_number;
args[3] = high_16bits ? ctx->i1true : ctx->i1false;
args[4] = params;
p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1.f16", ctx->f32, args, 5,
AC_FUNC_ATTR_READNONE);
args[0] = p1;
args[1] = j;
args[2] = llvm_chan;
args[3] = attr_number;
args[4] = high_16bits ? ctx->i1true : ctx->i1false;
args[5] = params;
return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2.f16", ctx->f16, args, 6,
AC_FUNC_ATTR_READNONE);
}
}
LLVMValueRef ac_build_fs_interp_mov(struct ac_llvm_context *ctx, LLVMValueRef parameter,