amd: import gfx11 addrlib
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
This commit is contained in:
Marek Olšák
Marge Bot
parent
751658a7fe
commit
4fdf42b3c2
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@ -3757,6 +3757,14 @@ typedef union _ADDR2_BLOCK_SET
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UINT_32 reserved : 24;
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};
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struct
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{
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UINT_32 : 5;
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UINT_32 thin256KB : 1; // Thin 256KB block
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UINT_32 thick256KB : 1; // Thick 256KB block
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UINT_32 : 25;
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} gfx11;
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UINT_32 value;
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} ADDR2_BLOCK_SET;
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@ -3836,6 +3844,15 @@ typedef union _ADDR2_SWMODE_SET
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UINT_32 swVar_R_X : 1;
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} gfx10;
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struct
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{
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UINT_32 : 28;
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UINT_32 sw256KB_Z_X : 1;
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UINT_32 sw256KB_S_X : 1;
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UINT_32 sw256KB_D_X : 1;
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UINT_32 sw256KB_R_X : 1;
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} gfx11;
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UINT_32 value;
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} ADDR2_SWMODE_SET;
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@ -286,6 +286,10 @@ typedef enum _AddrSwizzleMode
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ADDR_SW_VAR_Z_X = ADDR_SW_MISCDEF28,
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ADDR_SW_VAR_R_X = ADDR_SW_MISCDEF31,
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ADDR_SW_256KB_Z_X = ADDR_SW_MISCDEF28,
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ADDR_SW_256KB_S_X = ADDR_SW_MISCDEF29,
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ADDR_SW_256KB_D_X = ADDR_SW_MISCDEF30,
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ADDR_SW_256KB_R_X = ADDR_SW_MISCDEF31,
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} AddrSwizzleMode;
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/**
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@ -40,8 +40,12 @@ files_addrlib = files(
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'src/gfx10/gfx10addrlib.cpp',
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'src/gfx10/gfx10addrlib.h',
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'src/gfx10/gfx10SwizzlePattern.h',
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'src/gfx11/gfx11addrlib.cpp',
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'src/gfx11/gfx11addrlib.h',
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'src/gfx11/gfx11SwizzlePattern.h',
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'src/amdgpu_asic_addr.h',
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'src/chip/gfx10/gfx10_gb_reg.h',
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'src/chip/gfx11/gfx11_gb_reg.h',
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'src/chip/gfx9/gfx9_gb_reg.h',
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'src/chip/r800/si_gb_reg.h',
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'src/r800/ciaddrlib.cpp',
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@ -73,7 +77,7 @@ libamdgpu_addrlib = static_library(
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include_directories : [
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include_directories(
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'inc', 'src', 'src/core', 'src/chip/gfx9', 'src/chip/r800',
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'src/chip/gfx10',
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'src/chip/gfx10', 'src/chip/gfx11',
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),
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inc_amd_common, inc_include, inc_src, inc_mapi, inc_mesa, inc_gallium, inc_gallium_aux,
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],
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@ -0,0 +1,77 @@
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/*
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************************************************************************************************************************
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*
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* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE
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*
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***********************************************************************************************************************/
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#if !defined (__GFX11_GB_REG_H__)
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#define __GFX11_GB_REG_H__
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/*
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* gfx11_gb_reg.h
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*
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* Register Spec Release: 1.0
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*
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*/
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//
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// Make sure the necessary endian defines are there.
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//
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#if defined(LITTLEENDIAN_CPU)
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#elif defined(BIGENDIAN_CPU)
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#else
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#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined"
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#endif
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union GB_ADDR_CONFIG_GFX11
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{
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struct
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{
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#if defined(LITTLEENDIAN_CPU)
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unsigned int NUM_PIPES : 3;
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unsigned int PIPE_INTERLEAVE_SIZE : 3;
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unsigned int MAX_COMPRESSED_FRAGS : 2;
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unsigned int NUM_PKRS : 3;
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unsigned int : 8;
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unsigned int NUM_SHADER_ENGINES : 2;
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unsigned int : 5;
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unsigned int NUM_RB_PER_SE : 2;
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unsigned int : 4;
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#elif defined(BIGENDIAN_CPU)
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unsigned int : 4;
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unsigned int NUM_RB_PER_SE : 2;
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unsigned int : 5;
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unsigned int NUM_SHADER_ENGINES : 2;
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unsigned int : 8;
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unsigned int NUM_PKRS : 3;
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unsigned int MAX_COMPRESSED_FRAGS : 2;
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unsigned int PIPE_INTERLEAVE_SIZE : 3;
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unsigned int NUM_PIPES : 3;
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#endif
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} bitfields, bits;
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unsigned int u32All;
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int i32All;
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float f32All;
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};
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#endif
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@ -407,6 +407,7 @@ Lib* SiHwlInit (const Client* pClient);
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Lib* CiHwlInit (const Client* pClient);
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Lib* Gfx9HwlInit (const Client* pClient);
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Lib* Gfx10HwlInit(const Client* pClient);
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Lib* Gfx11HwlInit(const Client* pClient);
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} // Addr
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#endif
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@ -104,6 +104,8 @@ enum AddrBlockType
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AddrBlockThickVar = 7, // Resource uses thick var block
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AddrBlockMaxTiledType,
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AddrBlockThin256KB = AddrBlockThinVar,
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AddrBlockThick256KB = AddrBlockThickVar,
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};
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enum AddrSwSet
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,561 @@
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/*
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************************************************************************************************************************
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*
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* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE
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*
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***********************************************************************************************************************/
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/**
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************************************************************************************************************************
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* @file gfx11addrlib.h
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* @brief Contains the Gfx11Lib class definition.
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************************************************************************************************************************
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*/
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#ifndef __GFX11_ADDR_LIB_H__
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#define __GFX11_ADDR_LIB_H__
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#include "addrlib2.h"
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#include "coord.h"
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#include "gfx11SwizzlePattern.h"
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namespace Addr
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{
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namespace V2
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{
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/**
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************************************************************************************************************************
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* @brief GFX11 specific settings structure.
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************************************************************************************************************************
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*/
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struct Gfx11ChipSettings
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{
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struct
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{
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UINT_32 reserved1 : 32;
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// Misc configuration bits
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UINT_32 reserved2 : 32;
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};
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};
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/**
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************************************************************************************************************************
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* @brief GFX11 data surface type.
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************************************************************************************************************************
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*/
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enum Gfx11DataType
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{
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Gfx11DataColor,
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Gfx11DataDepthStencil,
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};
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const UINT_32 Gfx11LinearSwModeMask = (1u << ADDR_SW_LINEAR);
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const UINT_32 Gfx11Blk256BSwModeMask = (1u << ADDR_SW_256B_D);
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const UINT_32 Gfx11Blk4KBSwModeMask = (1u << ADDR_SW_4KB_S) |
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(1u << ADDR_SW_4KB_D) |
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(1u << ADDR_SW_4KB_S_X) |
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(1u << ADDR_SW_4KB_D_X);
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const UINT_32 Gfx11Blk64KBSwModeMask = (1u << ADDR_SW_64KB_S) |
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(1u << ADDR_SW_64KB_D) |
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(1u << ADDR_SW_64KB_S_T) |
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(1u << ADDR_SW_64KB_D_T) |
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(1u << ADDR_SW_64KB_Z_X) |
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(1u << ADDR_SW_64KB_S_X) |
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(1u << ADDR_SW_64KB_D_X) |
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(1u << ADDR_SW_64KB_R_X);
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const UINT_32 Gfx11Blk256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) |
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(1u << ADDR_SW_256KB_S_X) |
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(1u << ADDR_SW_256KB_D_X) |
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(1u << ADDR_SW_256KB_R_X);
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const UINT_32 Gfx11ZSwModeMask = (1u << ADDR_SW_64KB_Z_X) |
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(1u << ADDR_SW_256KB_Z_X);
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const UINT_32 Gfx11StandardSwModeMask = (1u << ADDR_SW_4KB_S) |
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(1u << ADDR_SW_64KB_S) |
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(1u << ADDR_SW_64KB_S_T) |
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(1u << ADDR_SW_4KB_S_X) |
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(1u << ADDR_SW_64KB_S_X) |
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(1u << ADDR_SW_256KB_S_X);
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const UINT_32 Gfx11DisplaySwModeMask = (1u << ADDR_SW_256B_D) |
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(1u << ADDR_SW_4KB_D) |
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(1u << ADDR_SW_64KB_D) |
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(1u << ADDR_SW_64KB_D_T) |
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(1u << ADDR_SW_4KB_D_X) |
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(1u << ADDR_SW_64KB_D_X) |
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(1u << ADDR_SW_256KB_D_X);
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const UINT_32 Gfx11RenderSwModeMask = (1u << ADDR_SW_64KB_R_X) |
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(1u << ADDR_SW_256KB_R_X);
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const UINT_32 Gfx11XSwModeMask = (1u << ADDR_SW_4KB_S_X) |
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(1u << ADDR_SW_4KB_D_X) |
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(1u << ADDR_SW_64KB_Z_X) |
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(1u << ADDR_SW_64KB_S_X) |
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(1u << ADDR_SW_64KB_D_X) |
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(1u << ADDR_SW_64KB_R_X) |
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Gfx11Blk256KBSwModeMask;
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const UINT_32 Gfx11TSwModeMask = (1u << ADDR_SW_64KB_S_T) |
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(1u << ADDR_SW_64KB_D_T);
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const UINT_32 Gfx11XorSwModeMask = Gfx11XSwModeMask |
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Gfx11TSwModeMask;
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const UINT_32 Gfx11Rsrc1dSwModeMask = (1u << ADDR_SW_LINEAR) |
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(1u << ADDR_SW_64KB_R_X) |
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(1u << ADDR_SW_64KB_Z_X) ;
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const UINT_32 Gfx11Rsrc2dSwModeMask = Gfx11LinearSwModeMask |
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Gfx11DisplaySwModeMask |
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Gfx11ZSwModeMask |
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Gfx11RenderSwModeMask;
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const UINT_32 Gfx11Rsrc3dSwModeMask = Gfx11LinearSwModeMask |
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Gfx11StandardSwModeMask |
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Gfx11ZSwModeMask |
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Gfx11RenderSwModeMask |
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(1u << ADDR_SW_64KB_D_X) |
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(1u << ADDR_SW_256KB_D_X);
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const UINT_32 Gfx11Rsrc2dPrtSwModeMask =
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(Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc2dSwModeMask;
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const UINT_32 Gfx11Rsrc3dPrtSwModeMask =
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(Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc3dSwModeMask;
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const UINT_32 Gfx11Rsrc3dThin64KBSwModeMask = (1u << ADDR_SW_64KB_Z_X) |
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(1u << ADDR_SW_64KB_R_X);
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const UINT_32 Gfx11Rsrc3dThin256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) |
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(1u << ADDR_SW_256KB_R_X);
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const UINT_32 Gfx11Rsrc3dThinSwModeMask = Gfx11Rsrc3dThin64KBSwModeMask | Gfx11Rsrc3dThin256KBSwModeMask;
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const UINT_32 Gfx11Rsrc3dThickSwModeMask = Gfx11Rsrc3dSwModeMask & ~(Gfx11Rsrc3dThinSwModeMask | Gfx11LinearSwModeMask);
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const UINT_32 Gfx11Rsrc3dThick4KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk4KBSwModeMask;
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const UINT_32 Gfx11Rsrc3dThick64KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk64KBSwModeMask;
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const UINT_32 Gfx11Rsrc3dThick256KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk256KBSwModeMask;
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const UINT_32 Gfx11MsaaSwModeMask = Gfx11ZSwModeMask |
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Gfx11RenderSwModeMask;
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const UINT_32 Dcn32SwModeMask = (1u << ADDR_SW_LINEAR) |
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(1u << ADDR_SW_64KB_D) |
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(1u << ADDR_SW_64KB_D_T) |
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(1u << ADDR_SW_64KB_D_X) |
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(1u << ADDR_SW_64KB_R_X) |
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(1u << ADDR_SW_256KB_D_X) |
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(1u << ADDR_SW_256KB_R_X);
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const UINT_32 Size256K = 262144u;
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const UINT_32 Log2Size256K = 18u;
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/**
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************************************************************************************************************************
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* @brief This class is the GFX11 specific address library
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* function set.
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************************************************************************************************************************
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*/
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class Gfx11Lib : public Lib
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{
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public:
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/// Creates Gfx11Lib object
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static Addr::Lib* CreateObj(const Client* pClient)
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{
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VOID* pMem = Object::ClientAlloc(sizeof(Gfx11Lib), pClient);
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return (pMem != NULL) ? new (pMem) Gfx11Lib(pClient) : NULL;
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}
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protected:
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Gfx11Lib(const Client* pClient);
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virtual ~Gfx11Lib();
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virtual BOOL_32 HwlIsStandardSwizzle(
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AddrResourceType resourceType,
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AddrSwizzleMode swizzleMode) const
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{
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return m_swizzleModeTable[swizzleMode].isStd;
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}
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virtual BOOL_32 HwlIsDisplaySwizzle(
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AddrResourceType resourceType,
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AddrSwizzleMode swizzleMode) const
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{
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return m_swizzleModeTable[swizzleMode].isDisp;
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}
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virtual BOOL_32 HwlIsThin(
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AddrResourceType resourceType,
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AddrSwizzleMode swizzleMode) const
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{
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return ((IsTex1d(resourceType) == TRUE) ||
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(IsTex2d(resourceType) == TRUE) ||
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((IsTex3d(resourceType) == TRUE) &&
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(m_swizzleModeTable[swizzleMode].isStd == FALSE) &&
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(m_swizzleModeTable[swizzleMode].isDisp == FALSE)));
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}
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virtual BOOL_32 HwlIsThick(
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AddrResourceType resourceType,
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AddrSwizzleMode swizzleMode) const
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{
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return ((IsTex3d(resourceType) == TRUE) &&
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(m_swizzleModeTable[swizzleMode].isStd || m_swizzleModeTable[swizzleMode].isDisp));
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}
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virtual ADDR_E_RETURNCODE HwlComputeHtileInfo(
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const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn,
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ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
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virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
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const ADDR2_COMPUTE_DCCINFO_INPUT* pIn,
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ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const;
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virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
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const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
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ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut);
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virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr(
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const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
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ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
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virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord(
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const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn);
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virtual VOID HwlComputeDccAddrFromCoord(
|
||||
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
|
||||
ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut);
|
||||
|
||||
virtual UINT_32 HwlGetEquationIndex(
|
||||
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
|
||||
|
||||
virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const
|
||||
{
|
||||
*ppEquationTable = m_equationTable;
|
||||
|
||||
return m_numEquations;
|
||||
}
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlComputePipeBankXor(
|
||||
const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
|
||||
ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const;
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor(
|
||||
const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const;
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern(
|
||||
const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const;
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView(
|
||||
const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn,
|
||||
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const;
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting(
|
||||
const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
|
||||
ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const;
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck(
|
||||
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled(
|
||||
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear(
|
||||
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
|
||||
|
||||
virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled(
|
||||
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
|
||||
|
||||
virtual UINT_32 HwlComputeMaxBaseAlignments() const;
|
||||
|
||||
virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const;
|
||||
|
||||
virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn);
|
||||
|
||||
virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision);
|
||||
|
||||
private:
|
||||
// Initialize equation table
|
||||
VOID InitEquationTable();
|
||||
|
||||
ADDR_E_RETURNCODE ComputeSurfaceInfoMacroTiled(
|
||||
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
|
||||
|
||||
ADDR_E_RETURNCODE ComputeSurfaceInfoMicroTiled(
|
||||
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
|
||||
|
||||
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMacroTiled(
|
||||
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
|
||||
|
||||
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMicroTiled(
|
||||
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
|
||||
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
|
||||
|
||||
UINT_32 ComputeOffsetFromSwizzlePattern(
|
||||
const UINT_64* pPattern,
|
||||
UINT_32 numBits,
|
||||
UINT_32 x,
|
||||
UINT_32 y,
|
||||
UINT_32 z,
|
||||
UINT_32 s) const;
|
||||
|
||||
UINT_32 ComputeOffsetFromEquation(
|
||||
const ADDR_EQUATION* pEq,
|
||||
UINT_32 x,
|
||||
UINT_32 y,
|
||||
UINT_32 z) const;
|
||||
|
||||
ADDR_E_RETURNCODE ComputeStereoInfo(
|
||||
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
|
||||
UINT_32* pAlignY,
|
||||
UINT_32* pRightXor) const;
|
||||
|
||||
static void GetMipSize(
|
||||
UINT_32 mip0Width,
|
||||
UINT_32 mip0Height,
|
||||
UINT_32 mip0Depth,
|
||||
UINT_32 mipId,
|
||||
UINT_32* pMipWidth,
|
||||
UINT_32* pMipHeight,
|
||||
UINT_32* pMipDepth = NULL)
|
||||
{
|
||||
*pMipWidth = ShiftCeil(Max(mip0Width, 1u), mipId);
|
||||
*pMipHeight = ShiftCeil(Max(mip0Height, 1u), mipId);
|
||||
|
||||
if (pMipDepth != NULL)
|
||||
{
|
||||
*pMipDepth = ShiftCeil(Max(mip0Depth, 1u), mipId);
|
||||
}
|
||||
}
|
||||
|
||||
const ADDR_SW_PATINFO* GetSwizzlePatternInfo(
|
||||
AddrSwizzleMode swizzleMode,
|
||||
AddrResourceType resourceType,
|
||||
UINT_32 log2Elem,
|
||||
UINT_32 numFrag) const;
|
||||
|
||||
VOID GetSwizzlePatternFromPatternInfo(
|
||||
const ADDR_SW_PATINFO* pPatInfo,
|
||||
ADDR_BIT_SETTING (&pSwizzle)[20]) const
|
||||
{
|
||||
memcpy(pSwizzle,
|
||||
GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx],
|
||||
sizeof(GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx]));
|
||||
|
||||
memcpy(&pSwizzle[8],
|
||||
GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx],
|
||||
sizeof(GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx]));
|
||||
|
||||
memcpy(&pSwizzle[12],
|
||||
GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx],
|
||||
sizeof(GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx]));
|
||||
|
||||
memcpy(&pSwizzle[16],
|
||||
GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx],
|
||||
sizeof(GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx]));
|
||||
}
|
||||
|
||||
VOID ConvertSwizzlePatternToEquation(
|
||||
UINT_32 elemLog2,
|
||||
AddrResourceType rsrcType,
|
||||
AddrSwizzleMode swMode,
|
||||
const ADDR_SW_PATINFO* pPatInfo,
|
||||
ADDR_EQUATION* pEquation) const;
|
||||
|
||||
static INT_32 GetMetaElementSizeLog2(Gfx11DataType dataType);
|
||||
|
||||
static INT_32 GetMetaCacheSizeLog2(Gfx11DataType dataType);
|
||||
|
||||
void GetBlk256SizeLog2(
|
||||
AddrResourceType resourceType,
|
||||
AddrSwizzleMode swizzleMode,
|
||||
UINT_32 elemLog2,
|
||||
UINT_32 numSamplesLog2,
|
||||
Dim3d* pBlock) const;
|
||||
|
||||
void GetCompressedBlockSizeLog2(
|
||||
Gfx11DataType dataType,
|
||||
AddrResourceType resourceType,
|
||||
AddrSwizzleMode swizzleMode,
|
||||
UINT_32 elemLog2,
|
||||
UINT_32 numSamplesLog2,
|
||||
Dim3d* pBlock) const;
|
||||
|
||||
INT_32 GetMetaOverlapLog2(
|
||||
Gfx11DataType dataType,
|
||||
AddrResourceType resourceType,
|
||||
AddrSwizzleMode swizzleMode,
|
||||
UINT_32 elemLog2,
|
||||
UINT_32 numSamplesLog2) const;
|
||||
|
||||
INT_32 Get3DMetaOverlapLog2(
|
||||
AddrResourceType resourceType,
|
||||
AddrSwizzleMode swizzleMode,
|
||||
UINT_32 elemLog2) const;
|
||||
|
||||
UINT_32 GetMetaBlkSize(
|
||||
Gfx11DataType dataType,
|
||||
AddrResourceType resourceType,
|
||||
AddrSwizzleMode swizzleMode,
|
||||
UINT_32 elemLog2,
|
||||
UINT_32 numSamplesLog2,
|
||||
BOOL_32 pipeAlign,
|
||||
Dim3d* pBlock) const;
|
||||
|
||||
INT_32 GetPipeRotateAmount(
|
||||
AddrResourceType resourceType,
|
||||
AddrSwizzleMode swizzleMode) const;
|
||||
|
||||
INT_32 GetEffectiveNumPipes() const
|
||||
{
|
||||
return ((m_numSaLog2 + 1) >= m_pipesLog2) ? m_pipesLog2 : m_numSaLog2 + 1;
|
||||
}
|
||||
|
||||
BOOL_32 IsRbAligned(
|
||||
AddrResourceType resourceType,
|
||||
AddrSwizzleMode swizzleMode) const
|
||||
{
|
||||
const BOOL_32 isRtopt = IsRtOptSwizzle(swizzleMode);
|
||||
const BOOL_32 isZ = IsZOrderSwizzle(swizzleMode);
|
||||
const BOOL_32 isDisplay = IsDisplaySwizzle(swizzleMode);
|
||||
|
||||
return (IsTex2d(resourceType) && (isRtopt || isZ)) ||
|
||||
(IsTex3d(resourceType) && isDisplay);
|
||||
|
||||
}
|
||||
|
||||
UINT_32 GetValidDisplaySwizzleModes(UINT_32 bpp) const;
|
||||
|
||||
BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
|
||||
|
||||
UINT_32 GetMaxNumMipsInTail(UINT_32 blockSizeLog2, BOOL_32 isThin) const;
|
||||
|
||||
static ADDR2_BLOCK_SET GetAllowedBlockSet(ADDR2_SWMODE_SET allowedSwModeSet, AddrResourceType rsrcType)
|
||||
{
|
||||
ADDR2_BLOCK_SET allowedBlockSet = {};
|
||||
|
||||
allowedBlockSet.micro = (allowedSwModeSet.value & Gfx11Blk256BSwModeMask) ? TRUE : FALSE;
|
||||
allowedBlockSet.linear = (allowedSwModeSet.value & Gfx11LinearSwModeMask) ? TRUE : FALSE;
|
||||
|
||||
if (rsrcType == ADDR_RSRC_TEX_3D)
|
||||
{
|
||||
allowedBlockSet.macroThick4KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick4KBSwModeMask) ? TRUE : FALSE;
|
||||
allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx11Rsrc3dThin64KBSwModeMask) ? TRUE : FALSE;
|
||||
allowedBlockSet.macroThick64KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick64KBSwModeMask) ? TRUE : FALSE;
|
||||
allowedBlockSet.gfx11.thin256KB = (allowedSwModeSet.value & Gfx11Rsrc3dThin256KBSwModeMask) ? TRUE : FALSE;
|
||||
allowedBlockSet.gfx11.thick256KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick256KBSwModeMask) ? TRUE : FALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
allowedBlockSet.macroThin4KB = (allowedSwModeSet.value & Gfx11Blk4KBSwModeMask) ? TRUE : FALSE;
|
||||
allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx11Blk64KBSwModeMask) ? TRUE : FALSE;
|
||||
allowedBlockSet.gfx11.thin256KB = (allowedSwModeSet.value & Gfx11Blk256KBSwModeMask) ? TRUE : FALSE;
|
||||
}
|
||||
|
||||
return allowedBlockSet;
|
||||
}
|
||||
|
||||
static ADDR2_SWTYPE_SET GetAllowedSwSet(ADDR2_SWMODE_SET allowedSwModeSet)
|
||||
{
|
||||
ADDR2_SWTYPE_SET allowedSwSet = {};
|
||||
|
||||
allowedSwSet.sw_Z = (allowedSwModeSet.value & Gfx11ZSwModeMask) ? TRUE : FALSE;
|
||||
allowedSwSet.sw_S = (allowedSwModeSet.value & Gfx11StandardSwModeMask) ? TRUE : FALSE;
|
||||
allowedSwSet.sw_D = (allowedSwModeSet.value & Gfx11DisplaySwModeMask) ? TRUE : FALSE;
|
||||
allowedSwSet.sw_R = (allowedSwModeSet.value & Gfx11RenderSwModeMask) ? TRUE : FALSE;
|
||||
|
||||
return allowedSwSet;
|
||||
}
|
||||
|
||||
BOOL_32 IsInMipTail(
|
||||
Dim3d mipTailDim,
|
||||
UINT_32 maxNumMipsInTail,
|
||||
UINT_32 mipWidth,
|
||||
UINT_32 mipHeight,
|
||||
UINT_32 numMipsToTheEnd) const
|
||||
{
|
||||
BOOL_32 inTail = ((mipWidth <= mipTailDim.w) &&
|
||||
(mipHeight <= mipTailDim.h) &&
|
||||
(numMipsToTheEnd <= maxNumMipsInTail));
|
||||
|
||||
return inTail;
|
||||
}
|
||||
|
||||
UINT_32 GetBankXorBits(UINT_32 blockBits) const
|
||||
{
|
||||
return (blockBits > m_pipeInterleaveLog2 + m_pipesLog2 + ColumnBits) ?
|
||||
Min(blockBits - m_pipeInterleaveLog2 - m_pipesLog2 - ColumnBits, BankBits) : 0;
|
||||
}
|
||||
|
||||
BOOL_32 ValidateNonSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
|
||||
BOOL_32 ValidateSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
|
||||
|
||||
BOOL_32 IsBlock256kb(AddrSwizzleMode swizzleMode) const { return IsBlockVariable(swizzleMode); }
|
||||
|
||||
// TODO: figure out if there is any Column bits on GFX11...
|
||||
static const UINT_32 ColumnBits = 2;
|
||||
static const UINT_32 BankBits = 4;
|
||||
static const UINT_32 UnalignedDccType = 3;
|
||||
|
||||
static const Dim3d Block256_3d[MaxNumOfBpp];
|
||||
static const Dim3d Block256K_Log2_3d[MaxNumOfBpp];
|
||||
static const Dim3d Block64K_Log2_3d[MaxNumOfBpp];
|
||||
static const Dim3d Block4K_Log2_3d[MaxNumOfBpp];
|
||||
|
||||
static const SwizzleModeFlags SwizzleModeTable[ADDR_SW_MAX_TYPE];
|
||||
|
||||
// Number of packers log2
|
||||
UINT_32 m_numPkrLog2;
|
||||
// Number of shader array log2
|
||||
UINT_32 m_numSaLog2;
|
||||
|
||||
Gfx11ChipSettings m_settings;
|
||||
|
||||
UINT_32 m_colorBaseIndex;
|
||||
UINT_32 m_htileBaseIndex;
|
||||
UINT_32 m_dccBaseIndex;
|
||||
};
|
||||
|
||||
} // V2
|
||||
} // Addr
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue