Commit Graph

3434 Commits

Author SHA1 Message Date
Danylo Piliaiev 4ba129cd86 tu: Do not dereference descriptorSetLayout in push descriptors tmpl
Fixes crash when capturing with RenderDoc.

From VK spec:

 descriptorSetLayout [...] This parameter is ignored if templateType
 is not VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17751>
2022-07-26 18:18:48 +00:00
Connor Abbott 19a2353446 tu: Fix resolving d32s8 into s8 on fast path
The code assumed that if the source was d32s8 then the destination would
also be d32s8, in particular that depth_base_addr/stencil_base_addr
would also be filled out. Move the destination and source handling into
two different ifs with different conditions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17684>
2022-07-26 15:00:01 +00:00
Connor Abbott d426ee6a99 tu: Support resolving D24S8 -> S8
This was missed when we added support for VK_KHR_depth_stencil_resolve.
There is a similar feature where the stencil aspect of a D24S8 can be
copied "tightly" in CopyImageToBuffer, but it used the texture swizzle
and so required the 3d path. To get it to work with the 2D path, which
is required for resolves, we have to instead use the A8_UNORM format,
which works for texture sampling even for tiled images. We also have to
reuse the pre-existing image views because subpass resolves work on
image views rather than images, whereas before the fixup was applied
while creating the image view. This means threading through the
corresponding "opposite" format through setup, src, and dst functions,
doing the fixup there (through some shared helpers), and then getting
every user to specify the right format. As a bonus, we no longer need to
force the 3d path for the CopyImageToBuffer and CopyBufferToImage
special cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17684>
2022-07-26 15:00:01 +00:00
Chia-I Wu ba461f897b ir3: fix tess param allocation
primitive_param takes up 2 vec4's.  Remove an align that I don't
understand.

The align upset

  Test case 'dEQP-VK.subgroups.ballot_broadcast.graphics.subgroupbroadcast_vec4'..
  deqp-vk: ../src/freedreno/ir3/ir3_nir.c:1039:
  void ir3_setup_const_state(nir_shader *, struct ir3_shader_variant *, struct ir3_const_state *):
  Assertion `constoff <= ir3_max_const(v)' failed.

with an older version (android11-tests-dev branch) of deqp-vk.  This is
because ir3_nir_opt_preamble uses the function for the worst case but
the function fails to replace the align by the worst case.

No regression with dEQP-VK.*tess*.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17570>
2022-07-26 01:04:56 +00:00
Chia-I Wu e3ba8a2f07 ir3: increment constoff right after it is assigned
Minor improvement to readability.  No real change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17570>
2022-07-26 01:04:56 +00:00
Chia-I Wu 4ae2966616 ir3: remove unused patch_vertices_in
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17570>
2022-07-26 01:04:56 +00:00
Chia-I Wu 74c96af71d ir3: fix output_loc size
It was off-by-one.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17570>
2022-07-26 01:04:56 +00:00
Chia-I Wu 9c106f3ee7 ir3: copy req_local_mem for MESA_SHADER_KERNEL
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17570>
2022-07-26 01:04:56 +00:00
Chia-I Wu 76ea28b9d0 ir3: update ir3_const_state comment
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17570>
2022-07-26 01:04:56 +00:00
David Heidelberg 1a244e1394 ci/freedreno: 3 pixel change in Raven restricted trace
Acked-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17732>
2022-07-25 18:14:40 +02:00
Hyunjun Ko 0c787d57e6 tu: increase maxPushConstantsSize to 256.
Now there are two paths for push constants.

When it's range is under 128b, we can use shared consts.
When it's over 128b, we can instead do loading data through
regular path, which is same as the previous way.

Now we can satisfy emulations like vkd3d that requires 256b for
its root signatures and we think it fairly maps to push constants
rather than inline uniform blocks that requires one indirection.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15503>
2022-07-24 09:03:47 +00:00
Hyunjun Ko e1f2cabc5e turnip: Change to use shared consts for PushConstants
Follow the way blob is doing for PushConstants though it supports only
128b, same as previous.

v1. Rename tu_push_constant_range.count into dwords to redue confusion.
( Danylo Piliaiev <dpiliaiev@igalia.com> )

v2. Enable shared constants only if necessary.

v3. Merge the two draw states TU_DRAW_STATE_SHADER_GEOM_CONST and
TU_DRAW_STATE_FS_CONST as shared constants are used.

Note that this leaves tu_push_constant_range in tu_shader so we could
use it again in the following patch.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15503>
2022-07-24 09:03:47 +00:00
Hyunjun Ko ce8e8051af turnip: clean up unused parameters for user consts.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15503>
2022-07-24 09:03:47 +00:00
Hyunjun Ko e6556b72fb ir3: handle shared consts.
Adds a shared consts base offset and a size of it(dwords) to ir3_compiler
since they might be depending on gpu generations. (Danylo Piliaiev <dpiliaiev@igalia.com> )

Adds a flag to present whether shared consts are enabled to
ir3_shader_options and then it sets to ir3_const_state when creating
an ir3 variant. Although this state is not per-shader state, this is
necessary when figureing out real constlens.

v1. Define a hw quirk for geometry shared const files and use it when
calculating const length.

v2. Don't hardcode when calculating a safe const length.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15503>
2022-07-24 09:03:47 +00:00
Hyunjun Ko b35c4bd050 ir3: change maximum size of const files.
According to the observation on a630/a650/a660, max_const_pipeline has
to be 512 when all geometry stages are present. Otherwise a gpu hang
happens. Acoordingly maximum safe size for each stage should be under
(max_const_pipeline / 5 (stages)).

Only when VS and FS stages are present, the limit is 640.

v1. Align max_const_safe to 4 vec4's.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15503>
2022-07-24 09:03:47 +00:00
Chia-I Wu 8ec81a4b11 turnip: fix an assertion with drm-shim
Fixes

  deqp-vk: ../src/vulkan/runtime/vk_device.c:49:
  get_timeline_mode: Assertion `timeline_type == NULL' failed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17571>
2022-07-22 02:11:14 +00:00
Chia-I Wu 2d2912f18a freedreno/drm-shim: add a660
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17571>
2022-07-22 02:11:14 +00:00
Emma Anholt 7f4df969c9 Revert "ci/freedreno: Switch a630 to manual/disabled for lab maintenance."
This reverts commit 7e381ba9fc.  2 new
boards are in place, bringing us from 7 to 9.  We hoped for 12, but have
ongoing power stability issues.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17662>
2022-07-22 00:57:23 +00:00
Emma Anholt 94b4c0bc39 ci/turnip: Add a couple of missing a630 fails.
Same as a618.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17662>
2022-07-22 00:57:23 +00:00
Emma Anholt 8a7c4f4202 ci/turnip: Bump up the a630 full run timeout.
Test runtime has crept up with more CTS tests and more features.  The last
vk_full 1/2 run I tried timed out at:

Pass: 268488, Fail: 2, ExpectedFail: 7, Warn: 1, Skip: 602571, Duration: 1:29:29, Remaining: 45

Rude.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17662>
2022-07-22 00:57:23 +00:00
Emma Anholt d8fb219b2f ci/freedreno: Add some more known flakes for a630 from our IRC logs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17662>
2022-07-22 00:57:23 +00:00
Jason Ekstrand 87ab287436 vulkan: Call lower_clip_cull_distance_arrays in vk_spirv_to_nir
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17644>
2022-07-21 21:18:48 +00:00
Georg Lehmann 775578b885 ir3: Stop using nir_legalize_16bit_sampler_srcs.
nir_fold_16bit_tex_image's only_fold_all option ensures that there is never
a mix of bit sizes.

Closes https://gitlab.freedesktop.org/mesa/mesa/-/issues/6899

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>
2022-07-21 19:15:04 +00:00
Georg Lehmann 87e3277b82 nir: Rewrite and merge 16bit tex folding pass with 16bit image folding pass.
Allow folding constants/undef sources by sharing more code with the image_store
16bit folding pass.

Allow more than one set of sources because RADV wants two, one for
G16 (ddx/ddy) and one for A16 (all other sources).

Allow folding cube sampling destination conversions on radeonsi/radv because
I think the limitation only applies to sources.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>
2022-07-21 19:15:03 +00:00
Georg Lehmann 06b33770b6 ir3: Lower alu to scalar if nir_legalize_16bit_sampler_srcs made progress.
Fixes: 003327dd95 ("freedreno/ir3: Pass 16-bit sampler coordinates when possible.")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>
2022-07-21 19:15:03 +00:00
Georg Lehmann 9fe382ba96 ir3: Only run 16bit tex NIR passes on a5xx+.
16bit types aren't yet supported on older hardware.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>
2022-07-21 19:15:03 +00:00
Konstantin Seurer 630df88a74 turnip: Remove format desc null assert
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>
2022-07-21 12:48:01 +00:00
Emma Anholt 6e819585da ci/turnip: Add a bit of spilling-vs-ballot testing on a618.
The shared reg usage involved in the subgroup-related macros can cause
trouble for the spiller, and spilling may be implicated in CTS failures
with old versions of the subgroup tests, so let's make sure we get some
coverage.  It does seem to catch a couple of failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17642>
2022-07-21 01:25:33 +00:00
Konrad Dybcio d3b38213e5 freedreno: Enable A619
Enable A619 as found in various SKUs of the SM Lagoon SoC, such as
SM6350 and SM7225.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17495>
2022-07-21 00:16:32 +00:00
Danylo Piliaiev 7b0fcd8932 turnip: Disable LRZ fast-clear for gen1 and gen2
LRZ fast-clear works on all gens, however blob disables it on
gen1 and gen2. We also elect to disable fast-clear on these gens
because for close to none gains it adds complexity and seem to work
a bit differently from gen3+. Which creates at least one edge case:
if first draw which uses LRZ fast-clear doesn't lock LRZ direction
the fast-clear value is undefined.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6829

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17599>
2022-07-20 02:58:44 +00:00
Emma Anholt 7e381ba9fc ci/freedreno: Switch a630 to manual/disabled for lab maintenance.
We're getting several more 630s in the lab, but need a bit of time to swap
out some broken old ones and stabilize the new ones.  Fritz thinks this
should be done in an hour or so, but I want to turn off the CI for main so
that we don't block anyone else.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17641>
2022-07-20 02:00:43 +00:00
Jason Ekstrand b510ee0d22 Use vk_foreach_struct_const where needed
We're about to make it so that the compiler warns/errors if you use the
wrong iterator macro.  Fix up a bunch of places where someone used the
wrong one before we break anything.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17630>
2022-07-19 19:55:17 +00:00
Hyunjun Ko 4bccee123f turnip: expose VK_EXT_shader_module_identifier
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17614>
2022-07-19 16:12:15 +00:00
Hyunjun Ko d046d6e9e0 turnip: Remove an unnecessary assert.
The assertion is already in the common implementation.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17614>
2022-07-19 16:12:15 +00:00
Emma Anholt 3d62a41dcc freedreno/ir3: Enable core NIR's 16-bit ALU optimizations.
In addition to hopefully generating shorter code, this optimizes out a
comparison of a mediump-cast value in
dEQP-GLES2.functional.shaders.algorithm.rgb_to_hsl_fragment passed
through ANGLE, and allows the test to pass.  We believe it to be a
test bug, but emitting better code like apparently everyone else does
is also a fine result.

No change on GLES gfxbench shaders.

Fixes: #6585
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17546>
2022-07-18 22:41:18 +00:00
Konstantin Seurer fc26fbde3d vulkan: Common vk_format_get_component_bits
RADV and PowerVR use the same implementation.
Turnip does use a slightly modified version but the helper only has one
use -> just inline it and get rid of turnip's vk_format.h.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17515>
2022-07-18 22:14:06 +00:00
Daniel Stone cdb7a3b0e2 Revert "CI: Disable Collabora lab"
This reverts commit 7a336c97ef692ed96cc93394596a7d0650983874.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17563>
2022-07-16 11:44:26 +00:00
Daniel Stone 02d9d1557b CI: Disable Collabora lab
It's everyone's favourite day, infrastructure maintenance Friday.

This includes manual disables for a618-vk and zink-anv-tgl, because
apparently the disable-on-variable rules don't carry through to those
jobs for ... some reason.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17553>
2022-07-15 13:26:42 +00:00
Connor Abbott 67c9ca2319 tu: Use incoherent CCU write for buffer accesses
Unlike image writes, buffer writes may access the same memory in
different ways, which we've seen in the past can cause problems. Use an
incoherent access to force flush/invalidate between accesses to the same
buffer, unless we know the barrier applies to images only.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17193>
2022-07-14 17:23:39 +00:00
Emma Anholt 43579901be ir3: Fix the no-emitted-vertex condition emission in geom lowering.
The if statement we insert would insert a new block before the end block
(and remove the old pre-end-block).  If the new block ended up later in
the HT due to its pointer's hash value, you'd emit another copy of the if
statement after the last one.  I saw this happen up to 4 times in testing.
The worst case would be if all those additions and removals ended up
reallocating the HT, at which point we might use-after-free.

Fixes inconsistent shader-db results with geometry shaders.

Cc: mesa-stable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17501>
2022-07-13 18:16:45 +00:00
Adam Jackson 768238fdc0 glx: Fix drawable refcounting for naked Windows
driFetchDrawable is only ever called from the MakeCurrent path, which
means it has to handle the case of pre-GLX-1.3 Windows being named as
the drawable. When it finds the drawable in the hash, it increments its
refcount before returning it, so for a GLXWindow it would be 2 on first
return, one from glXCreateWindow and one from glXMakeCurrent. But when
it does not find the drawable and creates one for the naked Window, the
reference count on first return would only be 1. As a result, if this
context was then ever bound to a different drawable, the old Window's
DRI drawable state (like the back buffer) would be destroyed.

Fixes piglit's glx-multi-window-single-context and glx-make-current for
a variety of drivers.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6713
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17479>
2022-07-13 12:25:30 -04:00
Georg Lehmann d9fb1b05eb ir3: Implement [iu]sub_sat.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17468>
2022-07-13 07:34:09 +00:00
Danylo Piliaiev b059cdad40 turnip: Add TU_GPU_TRACEPOINT envvar to toggle tracepoints
All tracepoints are enabled by default.

Example:
 TU_GPU_TRACEPOINT=-sysmem_clear

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16781>
2022-07-12 22:24:19 +00:00
Danylo Piliaiev d903c6c7f3 turnip: Refactor tracepoints generation to reduce duplication
This way we will not need to repeat arguments for "start" and "end"
tracepoints.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16781>
2022-07-12 22:24:19 +00:00
Emma Anholt e9d4c29f6a ci/freedreno: Mark an occasional flake pass that happens on a530.
This MR just saw it happen for the second time I've noticed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17470>
2022-07-12 21:57:23 +00:00
Connor Abbott cf0cfd572e freedreno/a6xx: VPC_SO_NCOMP is actually VPC_SO_BUFFER_STRIDE
This answers the question in a comment in turnip, and fixes some GL46
tests and piglit tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17494>
2022-07-12 17:57:07 +00:00
Eric Engestrom 2c99dc5b22 turnip: use updated tokens from vk.xml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17342>
2022-07-12 15:53:11 +00:00
Emma Anholt 4822058b1c ir3: Use non-persp interpolation when appropriate for interpolateAtOffset.
Fixes dEQP-VK.draw.renderpass.linear_interpolation.offset_min_4_samples.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17322>
2022-07-11 16:56:05 +00:00
Emma Anholt c5eb7ef246 ir3: Clarify what's happening in the interpolateAtOffset() math.
nir_builder lets us build much cleaner code than we had (assuming that we
get a scalarizing after this).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17322>
2022-07-11 16:56:05 +00:00
Emma Anholt 240a98297d freedreno: Rename the "SIZE" regs for interpolateAtOffset to "CENTERRHW"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17322>
2022-07-11 16:56:05 +00:00