Commit Graph

48029 Commits

Author SHA1 Message Date
Michel Dänzer 7e5911846e lima/ppir: Cast pointer to uintptr_t instead of uint64_t
Avoids warnings on armhf:

./src/gallium/drivers/lima/ir/pp/nir.c: In function 'ppir_get_block':
../src/gallium/drivers/lima/ir/pp/nir.c:554:66: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
    ppir_block *block = _mesa_hash_table_u64_search(comp->blocks, (uint64_t)nblock);
                                                                  ^
../src/gallium/drivers/lima/ir/pp/nir.c: In function 'ppir_compile_nir':
../src/gallium/drivers/lima/ir/pp/nir.c:899:52: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
          _mesa_hash_table_u64_insert(comp->blocks, (uint64_t)nblock, block);
                                                    ^

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10220>
2021-04-15 16:01:21 +00:00
Connor Abbott c68ea960a7 ir3, tu: Add compiler flag for robust UBO behavior
This needs to be part of the compiler because it's the only piece that
we always have access to in all the places ir3_optimize_loop() is
called, and it's only enabled for the whole Vulkan device. Right now
it's just used for constraining vectorization, but the next commit adds
another use.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7573>
2021-04-15 16:05:11 +02:00
Gustavo Padovan f601fd635b gitlab-ci: enable Intel AML-Y as experimental
The LAVA lab has been running well with the rammus chromebook for some
time now. Let's add it to MesaCI as experimental to get more testing,
and later enable it in production.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10238>
2021-04-15 13:03:19 +00:00
Gustavo Padovan e8bc0a28a4 traces-iris: fix expectation for Intel GLK
glmark2/buffer-columns=200:interleave=true:update-dispersion=0.9:upd...
was missing the expectation checksum.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10238>
2021-04-15 13:03:19 +00:00
Mike Blumenkrantz cca616ebd5 zink: export PIPE_CAP_SAMPLER_REDUCTION_MINMAX_ARB
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10248>
2021-04-15 12:35:09 +00:00
Mike Blumenkrantz 92f5006814 zink: handle minmax sampler creation for VK_EXT_sampler_filter_minmax
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10248>
2021-04-15 12:35:09 +00:00
Mike Blumenkrantz 22e1ed5722 zink: support format queries for VK_EXT_sampler_filter_minmax
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10248>
2021-04-15 12:35:09 +00:00
Mike Blumenkrantz b62633c599 zink: hook up VK_EXT_sampler_filter_minmax
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10248>
2021-04-15 12:35:09 +00:00
Karol Herbst f945cca983 clover/llvm: handle Fixed vs Scalable vectors explicitly starting with llvm-11
This fixes compilation with llvm-13.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4200
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9973>
2021-04-15 11:39:47 +00:00
Simon Ser 979e138695 radeonsi: stop special-casing YUV formats in si_query_dmabuf_modifiers
Instead of having a special case for YUV formats in
si_query_dmabuf_modifiers, let ac_get_supported_modifiers handle
them. Keep setting external_only = 1 for YUV formats, since we
can only sample from such formats (we can't use them as render
targets).

This shouldn't change si_query_dmabuf_modifiers's behavior, because
for YUV formats ac_get_supported_modifiers will return a single
LINEAR modifier.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
2021-04-15 09:43:17 +00:00
Simon Ser b26a546b2f radeon/vcn: handle tiled buffers when decoding
Set the swizzle mode when decoding.

Add a safe-guard to make sure the provided surface isn't DCC, because
we don't handle this situation.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
2021-04-15 09:43:17 +00:00
Felix DeGrood c85ea824bc iris: reduce redundant tile cache flushes
We are flushing tile cache more often than is necessary. In
unified cache mode, tile cache flushing is expensive, evicting all
depth/pixel data from the L3$. This is only need for a handful of
cases, such as: making cpu or gpu changes globally visible
(e.g. map), fast color clears, or slow depth clears. Tile cache
flushing is a gen12+ feature.

Remove blanket flushing of tile cache on all depth/RT flushes.
Replace with selective tile cache flushing.

Improves performance in several workloads:
AztecRuins.ogl-high-offscreen-1440p 1%
UnigineValley.ogl-g2                1%
Dota 2 (replay Jul 2020).ogl-g2     1%
Counter-Strike GO.ogl-g2            1%
Manhattan.ogl-Off-19x10             2%
CarChase.ogl-Off-19x10              1%
Bioshock Infinite.ogl-g2            1%

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
2021-04-15 04:54:40 +00:00
Kenneth Graunke bfe2c5f667 iris: only flush the render cache for aux changes, not format changes
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
2021-04-15 04:54:40 +00:00
Felix DeGrood ed8f2c4cbe iris: Cache VB/IB in L3$ for Gen12
Gen12 enables caching of Vertex and Index Buffers in L3.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
2021-04-15 04:54:40 +00:00
Mike Blumenkrantz b122beaff3 gallium: split PIPE_CAP_SAMPLER_REDUCTION_MINMAX into modes
this enables detection for the EXT vs the ARB extension, which have
different specifications regarding which formats must be supported

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10030>
2021-04-15 01:20:40 +00:00
Mike Blumenkrantz 59ad872458 gallium: add PIPE_BIND_SAMPLER_REDUCTION_MINMAX
for querying format support

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10030>
2021-04-15 01:20:40 +00:00
Rob Clark 31782330da freedreno: Add missing foreach macros and update indentation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10247>
2021-04-14 16:53:26 -07:00
Boris Brezillon 660b4d6e25 panfrost: Don't advertise AFBC mods when the format is not supported
On Bifrost, AFBC is not supported if the format has a non-identity
swizzle. For internal resources we fix the format at runtime, but this
fixup is not applicable when we export the resource. Don't advertise
AFBC modifiers on such formats.

Fixes: 44217be921 ("panfrost: Adjust the format for AFBC textures on Bifrost v7")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10233>
2021-04-14 20:44:01 +00:00
Rob Clark cd749d2c1a freedreno: Manual fixups
Things I couldn't figure out how to get clang-format to not mess up.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
2021-04-14 19:52:21 +00:00
Rob Clark 2d439343ea freedreno: Re-indent
clang-format -fallback-style=none --style=file -i src/gallium/drivers/freedreno/*.[ch] src/gallium/drivers/freedreno/*/*.[ch]

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
2021-04-14 19:52:21 +00:00
Rob Clark fdcae5b5b8 freedreno: Some manual reformatting
Take care of a few things that clang-format makes a hash of.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
2021-04-14 19:52:21 +00:00
Rob Clark 2fb3984805 freedreno: Add .clang-format
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
2021-04-14 19:52:21 +00:00
Erik Faye-Lund 5362adf68d zink: verify that source-format support linear-filter
Similar to the previous commit, we should also verify that the
source-format support linear-filter if we try to blit with it.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10234>
2021-04-14 15:48:03 +00:00
Erik Faye-Lund 0ba3cf1f95 zink: verify that src/dst support blitting
Some Vulkan-drivers don't support blitting between all formats and
layouts. So let's verify this while blitting, and fall back to the
normal rendering code-path instead.

This fixes a crash on start-up in OpenArena on V3DV.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10234>
2021-04-14 15:48:03 +00:00
Erik Faye-Lund 9de05fd36b zink: do not dereference NULL pointer
If first_frame_done isn't set, but fence is NULL, we end up dereferncing
that NULL-pointer.

This can happen in the case where the first submitted batch has no work,
and pfence was passed as a NULL-pointer.

While we're at it, simplify the check with the surrounding code, which
also checks for a NULL-pointer here.

Fixes: e93ca92d4a ("zink: force explicit fence only on first frame flush")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10235>
2021-04-14 15:04:35 +00:00
Erik Faye-Lund 1cf6b8d461 zink: fall back from cached to non-cached memory
This fixes basic rendering on top of V3DV, which doesn't seem to expose
the cached memory we expect and love.

Fixes: 598dc3dca4 ("zink: use cached memory for all resources when possible")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10230>
2021-04-14 14:16:16 +00:00
Erik Faye-Lund 1c51c533bd zink: do not clear on cpu
This seems to simply be a mixup of what utility function to use.
util_clear_render_target clears on the CPU, whereas
util_blitter_clear_render_target clears on the GPU. Because we do the
zink_blit_begin dance, it seems reasonable to assume the latter was
intended.

Fixes: 622f8f6ed5 ("zink: add a pipe_context::clear_texture hook")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10211>
2021-04-14 13:35:26 +00:00
Michel Dänzer af0fde955c ci: Move docker images from Debian buster to bullseye
Among other things, this gets us GCC 10 (was 6).

Requires some changes to third party components we use:

* Install apitrace (& waffle) from Debian; was hitting issues with the
  local build, and it's the same version 9.0 anyway.
* Update Fossilize to a newer commit which builds with GCC 10.
* apt.llvm.org repositories are no longer needed.
* Use an SPIRV-LLVM-Translator commit which builds with LLVM 11.0.1.
* Install XCB packages from Debian, 1.13 fails to build with Python 3.9.
* Install wayland-protocols from Debian, 1.12 is too old for
  libgtk-3-dev in bullseye.

LLVM 7/8 packages are no longer available.

Also adapt expected test results to Xvfb now exposing multi-samle
GLXFBConfigs.

v2:
* Install clang instead of clang-11.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3124
Reviewed-by: Eric Anholt <eric@anholt.net> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
2021-04-14 13:05:08 +00:00
Michel Dänzer a3e38e0bf8 ci: Bump LLVM/clang from 10 to 11
Preparation for moving to Debian bullseye, which has packages for LLVM
9 & 11, but not 10.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
2021-04-14 13:05:08 +00:00
Pierre-Eric Pelloux-Prayer 8ad26e6715 r600/sb: Use assignments for resetting struct r600_sb::literal
Avoids warning with newer GCC:

../src/gallium/drivers/r600/sb/sb_sched.cpp: In member function 'void r600_sb::literal_tracker::reset()':
../src/gallium/drivers/r600/sb/sb_sched.cpp:1953:26: error: 'void* memset(void*, int, size_t)' clearing an object of non-trivial type 'struct r600_sb::literal'; use assignment or value-initialization instead [-Werror=class-memaccess]
 1953 |  memset(lt, 0, sizeof(lt));
      |                          ^
In file included from ../src/gallium/drivers/r600/sb/sb_sched.cpp:35:
../src/gallium/drivers/r600/sb/sb_bc.h:409:8: note: 'struct r600_sb::literal' declared here
  409 | struct literal {
      |        ^~~~~~~

[ Michel Dänzer:
* Expanded commit log
v2:
* Clear all 4 members of lt[4] (Eric Anholt)
]

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
2021-04-14 13:05:08 +00:00
Juan A. Suarez Romero 45ae0e9fb7 v3d: do not emit attribute if has no resource
When emitting the GL shader state, verify the attribute has a resource
bound; otherwise just skip it

v2 (chema):
 - Move comment
 - Set num_elements_to_emit = 1 if it is 0

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4205
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8826>
2021-04-14 11:34:14 +00:00
Erik Faye-Lund 3ebe604ad6 lavapipe: ask pipe-driver for int16 support
We shouldn't assume the driver can deal with int16 unless it reports
that it can.

... And LLVMpipe isn't quite there yet, see this MR for details:

https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10185

Fixes: b38879f8c5 ("vallium: initial import of the vulkan frontend")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10189>
2021-04-14 09:17:00 +00:00
Erik Faye-Lund ffe534f27b lavapipe: check all graphics stages
For these caps, we need to check all stages to be sure we've got things
right.

Again, this is probably benign, because LLVMpipe should support the same
value for all stages.

Fixes: b38879f8c5 ("vallium: initial import of the vulkan frontend")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10189>
2021-04-14 09:17:00 +00:00
Erik Faye-Lund d91a549b67 lavapipe: check all vertex-stages
We should really check for the minimum of all supported vertex-stages
here, not just the vertex-shader.

This shouldn't make any real-world difference, because we really only
support LLVMpipe here, and that driver has the same limits for all
stages. But it seems better to actually check all stages instead of just
assuming.

Fixes: b38879f8c5 ("vallium: initial import of the vulkan frontend")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10189>
2021-04-14 09:17:00 +00:00
Erik Faye-Lund 83de54f6a6 lavapipe: do not subtract 8 from enum
This seems arbitrary, and makes us check for PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
instead of PIPE_SHADER_CAP_MAX_SHADER_IMAGES, which isn't what we want.

The end result is that we accidentally exposed 128 shader images,
instead of 16. This can lead to us writing outside of the array of
shader images in llvmpipe_set_shader_images, among other bad things.

Fixes: b38879f8c5 ("vallium: initial import of the vulkan frontend")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10189>
2021-04-14 09:17:00 +00:00
Axel Davy 7fbd7bb7cb st/nine: Default tearfree_discard to true
With tearfree_discard=false, we tear when rendering
fullscreen apps with vsync off.

This is a feature in the sense it's the same as the native
implementation. This also means lower input lag.

However I think most users will prefer to have no tearing,
and don't care about sub refresh-rate input lag.

Thus it's better to default tearfree_discard to true.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy c19a841fd4 st/nine: Default thread_submit to true
When rendering fullscreen with vsync on at
a rate close to the refresh rate, you can
miss pageflips by submitting buffers for pageflip
that end up not finished being rendered when the pageflip is due.

With Nine in this situation you could get half the refresh
rate fps before this patch.

Due to the way the presentation backend is implemented,
it's not possible to easily detect the situation and adapt (use
one more backbuffer, but only in this scenario to not increase input
lap when the issue is not present).

thread_submit doesn't have this issue.

Let's default thread_submit to true.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy a2a95abb6c st/nine: Improve performance with thread_submit
Use the Async flush flag to return faster during
Present() when thread_submit is used.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 062c4cc0b9 st/nine: Bump num of backbuffers for tearfree thread_submit
Running some high fps benchmarks, thread_submit gets
subpar fps with the option tearfree_discard.
Increasing the number of backbuffers fixes it.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy b41f1e32e9 st/nine: Make it optional to use a sw renderer
Until the problem described in
https://gitlab.freedesktop.org/mesa/mesa/-/issues/4489
is fixed, the advantages of using a sw renderer for the
sw rendering in nine are too small compared to the
disadvantages.

Add an option to control whether we use a sw renderer,
and make it so by default we don't.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy c5f75bc200 st/nine: Allow to override the vram size
This can be useful for debugging, or for some apps
not supporting >= 4GB of vram.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 26a42f1053 st/nine: Disable buffer_upload when csmt is off
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 5702b15cd9 st/nine: Use PIPE_MAP_ONCE for persistent buffers
This enables radeonsi to really unmap on release,
which reduces virtual memory usage.

Do it only on 32 bits, as it can reduce performance if the
allocation is reused.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 7ac9c9c667 st/nine: Add fallback for YUV formats
Adds alternative format to store YUV textures/surfaces.

These will be converted on upload to the alternative format.
Fixes: https://github.com/iXit/wine-nine-standalone/issues/39

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 25d203a116 st/nine: Do not memset buffers twice
No need to apply memset on an allocation
from align_calloc.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 805cedd207 st/nine: Have NOOVERWRITE win over DISCARD
I held for a long time the belief DISCARD wins
over NOOVERWRITE, backed by experiments.

But probably both behaviours are ok.
For perf it is better to have NOOVERWRITE win.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 1797a6eb04 st/nine: Add logging to Ex function
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 4953d19518 st/nine: Complete *Ex stubs
Returning D3D_OK instead of an error when it
makes sense.
Return the value passed previously (or the default)
when it makes sense.
Add (void)variable for unused input variables.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 8c72f7506e st/nine: Pseudo implement Create*Ex functions
It seems some apps use them.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy 006338f702 st/nine: Improve Reset on Ex devices
Found with wine tests

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy ee580c96ef st/nine: Pseudo implement set/getClipstatus
Not sure why any app would use this in production,
it seems like a debugging feature. Still some do make
the calls.

Fixes: https://github.com/iXit/wine-nine-standalone/issues/99

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:14 +00:00
Axel Davy a1bb1b9b07 st/nine: Catch redundant scissor and viewport settings
The redundancy check is done in the nine_context function,
rather than the device function, in order to also filter
calls from SetRenderTarget and Reset*.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy e0caa05d42 st/nine: Fix ff has_aNrm computation
In some cases the wrong computation led the
normal to be zero instead of the correct value,
which led to artifacts.

Fixes: https://github.com/iXit/wine-nine-standalone/issues/105

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy a0288fa3b7 st/nine: Fix ps ff BLENDTEXTUREALPHA
This ff ps operation has the texture alpha as input.
Thus we need to sample the texture.

Fixes: https://github.com/iXit/wine-nine-standalone/issues/105

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 9e9644666e st/nine: Refuse depth buffers as rendertargets
If we allow them, some apps try to use them
as rendertargets.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy a849923aea st/nine: Clamp max_anisotropy
GL does the same.

Fixes the low texture quality issue of
https://github.com/iXit/wine-nine-standalone/issues/21

The are some indications it might not be the native
behaviour (which makes sense, the native filtering
of states seems more to not update internal states
when the passed value is invalid).
However it's better visually to have anisotropic filtering
enabled in these buggy cases.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 619c53489f st/nine: Ignore swizzle on samplers
Prevents a crash running wine tests

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 787b03d5f6 st/nine: Increase number of constants of vs1_sw
Wine tests seem to indicate more the 256 should
be supported for this case, but I couldn't find the
doc for how much it should be. Use the vs >= 2
settings for now.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 138615a094 st/nine: Remove errors on unsupported lock flags
Some applications seem to pass undefined flags...
And we shouldn't return an error.

Found investigating:
https://github.com/iXit/wine-nine-standalone/issues/100

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 70f8d78aa7 st/nine: Handle D3DFMT_NULL multisampling
When D3DFMT_NULL is set as render target,
we must take the multisampling state
from the depth buffer.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy de66d503f7 st/nine: Enable multisampling also without depth buffer
Found with wine tests.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 1272640d55 st/nine: Fix alpha to coverage states
The sequence of states to disable NVidia alpha
to coverage was disabling AMD alpha to coverage.
This patch fixes it.

Found with wine tests.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy d03f401fda st/nine: Improve Surface GetContainer
Prevents a crash in wine tests. Not sure
this behaviour is the correct one, but at
least it'll check the IID passed is the device
before returning it.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 17dc334b81 st/nine: Prevent negative reference count
Apparently this is a thing, according to wine tests

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 586cede4b6 st/nine: Fix value of pipe_draw_info's max_index vertex
max_index didn't include draw.start

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy f5a1f3c98d st/nine: Fix read outside bounds for some textures
According to wine tests, some apps can allocate very
small ATI1/ATI2 textures levels.

The issue is that the CPU versions of these textures are stored
in buffers which size is the same as if the format was uncompressed.

Thus the content filled cannot possibly be correct for these levels.

The tests seems to hint when rendering with these levels the output
is bad, but at least it the runtime shouldn't crash when using them.

Previously nine would read outside bounds (found with asan) in this
scenario, as the gallium helper copies a full compressed block.

Instead do not copy anything for these levels.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy a6cce52908 st/nine: Fix compilation warnings
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 68024fc0cc st/nine: Fix reading invalid pointer
Apparently it is incorrect to use the pointer in
LIST_FOR_EACH_ENTRY like I used to.
Found with asan.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 2146494d08 st/nine: Prevent use after free on dtor
Found with asan.
This->device was accessed after This was destroyed.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 8df04b1b2d st/nine: Fix invalid NULL check
Found with clang warnings.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy a5f2084c1b st/nine: Add missing breaks
This makes clang warnings happier.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 29cc19e54f st/nine: Fix cubetexture early destruction
When the surface creation fails, the dtor
can face NULL pointers for the surfaces.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy 204bc8981f st/nine: Fix crash on texture creation failure
Fixes regression introduced by:
a179ea2e "st/nine: Use the texture memory helper"

The device is used on texture/surface dtor since this commit.
We need to early fill the device field in case of error.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Axel Davy d9e79bfe4f st/nine: Disable fpu exceptions during init
Prevents a crash in wine tests. The crash
seems to happen in llvmpipe.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10160>
2021-04-14 08:33:13 +00:00
Juan A. Suarez Romero 9e5762c387 ci: Update VK-GL-CTS to 1.2.6.0
v2:
 - Bump up MESA_ROOTFS_TAG instead of arm_build (Michel)

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10136>
2021-04-14 08:06:55 +00:00
Stéphane Marchesin d6db4d2e08 virgl: Add simple disk cache
Since virgl has no backend compilation, this is just a disk cache for the
frontend. As such it is very simple and only implements enough for
get_disk_shader_cache() to work.

With portal2 apitrace:
Before: 100.65 fps
After: 129.051 fps

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10200>
2021-04-14 07:37:34 +00:00
Pierre-Eric Pelloux-Prayer a86450e00a radeonsi: avoid querying gpu state if possible
No-op dispatch should only be setup for full reset, not soft-recovery resets.

The same trick cannot be used in si_get_reset_status because EGL expects
us to return GL_***_CONTEXT_RESET even if it has been fixed by a soft
recovery.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10179>
2021-04-14 07:00:00 +00:00
Pierre-Eric Pelloux-Prayer 8fd912b9ae amdgpu,radeon: add full_reset_only param to ctx_query_reset_status
Using this boolean the caller tells if it wants to ignore resets
fixed by a soft recovery.

When true, amdgpu can skip the call to libdrm if no cs has been
rejected (since only full gpu reset cause cs rejections).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10179>
2021-04-14 07:00:00 +00:00
Pierre-Eric Pelloux-Prayer 93183480fc radeonsi: re-create the aux context in si_create_context
If a GPU reset occurs, all contexts need to be recreated.
So instead of re-creating the aux context during the flush
of a normal context, we build a new one if we detect that
it needs to be updated.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10179>
2021-04-14 07:00:00 +00:00
Pierre-Eric Pelloux-Prayer 6938aa7534 radeonsi: only recreate the aux_context when soft recovery failed
When a GPU hang is detected in the kernel, it can uses 2 different
mechanism to recovery: a soft recovery or a hard reset.

Soft recovery doesn't lose the vram content so contexts are still
valid. In this case we don't need to recreate the aux context.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10179>
2021-04-14 07:00:00 +00:00
Pierre-Eric Pelloux-Prayer 5c3931fbc5 radeonsi: do not recreate the aux context from the aux context
This will cause a deadlock since si_get_reset_status is called
from flush, which is called with aux_context_lock taken.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10179>
2021-04-14 07:00:00 +00:00
Pierre-Eric Pelloux-Prayer 3d5c4db23e radeonsi: use SI_CONTEXT_FLAG_AUX when recreating the aux context
Fixes: e6a0f243ea ("radeonsi: update pipe_screen::num_contexts")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10179>
2021-04-14 07:00:00 +00:00
Pierre-Eric Pelloux-Prayer 646c5db06f radeonsi: submit cs to failed context instead of skipping them
Skipping the submission would trigger asserts in debug builds
or cause memory corruption.

Instead the cs is submitted as ususual but the kernel won't submit
it to the hardware (and will return ECANCELED) if the context
is really lost (= not soft-recovered).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2491
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10179>
2021-04-14 07:00:00 +00:00
Pierre-Eric Pelloux-Prayer bc71f689f1 amdgpu,radeon: add needs_reset param to ctx_query_reset_status
The kernel can do different types of recovery (soft recovery, GPU reset).

Since they both increase gpu_reset_counter, this will cause all contexts
to report AMDGPU_CTX_QUERY2_FLAGS_RESET, which is a bit misleading: if
a single context was soft-recovered, the others are fine and we don't need
special processing.

This commit uses the AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST to distinguish
between the 2 kind of reset and later commits will use this information.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10179>
2021-04-14 07:00:00 +00:00
Pierre-Eric Pelloux-Prayer 15e24850b7 gallium/u_threaded: skip refcounting only once
If info->take_index_buffer_ownership is true we can skip
refcounting but only for the first iteration of the loop.
The next iterations have to use tc_set_resource_reference.

Fixes: 363c1ef0c0 ("gallium/u_threaded: split draws that don't fit in a batch")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10171>
2021-04-14 07:50:20 +02:00
Marek Olšák 30ab38ba6d radeonsi: enable FP16 for mediump on gfx9+ if radeonsi_fp16=true
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9051>
2021-04-13 21:10:43 -04:00
Marek Olšák c53f25b668 radeonsi: kill 16-bit VS outputs if PS doesn't use them or doing Z-only draw
The kill_outputs logic uses our internal IO indices. Just add indices for
16-bit varyings. We don't have enough free indices to use, but we can reuse
the indices that GLES doesn't have. Those are all the legacy desktop GL
varyings.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9051>
2021-04-13 21:10:43 -04:00
Marek Olšák 5efdf4afac radeonsi: optimize and legalize 16-bit samplers
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9051>
2021-04-13 21:10:43 -04:00
Marek Olšák 9fa0f5f1ba radeonsi: implement 16-bit VS inputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9051>
2021-04-13 21:10:43 -04:00
Marek Olšák 7db43960f6 radeonsi: implement 16-bit VS->PS varyings
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9051>
2021-04-13 21:10:43 -04:00
Adam Jackson 80b67a3b44 glx: Lift sending the MakeCurrent request to top-level code
Somewhat terrifyingly, we never sent this for direct contexts, which
means the server never knew the context/drawable bindings. To handle
this sanely, pull the request code up out of the indirect backend, and
rewrite the context switch path to call it as appropriate.  This
attempts to preserve the existing behavior of not calling unbind() on
the context if its refcount would not drop to zero.

Of course, you can't just do this indiscriminately, because this is GLX
and extant X servers have bugs and everything is terrible. To wit:

- For 1.20.x prior to 1.20.6, you can bind a direct context once, but
the second time you try to modify the context's binding you will get
GLXBadContextTag. This includes unbinding the context. And "deleting"
the context will leak memory, because it will still appear to be
current.

- For 1.19 and earlier, glXMakeCurrent(dpy, None, ctx) should be legal
for GL 3.0+ contexts, but the server will throw BadMatch.

To guard against this, we only send the request for indirect contexts
unless the server is known good, and only mention one context at a time
in such a request; if switching between contexts, we first unbind the
old, and then bind the new. Note that the second VendorRelease() version
is to catch XFree86 4.x and Xorg [67].x, which almost certainly have the
above bugs. Other servers might report different version numbers here,
but we can't do direct rendering against them, so this should be safe.

Fixes: mesa/mesa#4418
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9992>
2021-04-13 22:58:58 +00:00
Mike Blumenkrantz dc265008c7 aux/trace: use ralloc_free for ralloc()ed state pointers
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10221>
2021-04-13 18:26:20 -04:00
Boris Brezillon 17429b8ad4 panfrost: Pass a tile enable map to avoid reloading untouched tiles
We only do that when there are more than one damage rectangle and the
number of tiles to reload is significantly lower than the total number
of tiles covered by the damage extent, otherwise the overhead of the
TEM read might defeat the optimization that we might get from using one.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon ff3eada7eb panfrost: Use the generic preload and FB helpers in the gallium driver
We also rework the code to have the FB descriptor shared by the tiler
and fragment jobs, instead of allocating a separate FB descriptor for
tiler jobs.

The new implementation seems to fix a few dEQP failures on T720.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon d7008a6d7b panfrost: Fix partial update
The KHR_partial_update spec says:

"
If EGL_EXT_buffer_age is supported, the contents of the buffer inside
the damage region may also be relied upon to contain the same content
as the last time they were defined for the current back buffer.
"

but we currently assume that everything inside the damage region will
be overwritten by new data and that the previous content doesn't need
to be reloaded.

Let's get rid of the damage rect inversion logic for now and reload
everything inside the damage extent. We will optimize things further
down the line, using pre-frame DCDs on Bifrost, and a tile enable map
on Midgard.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon a11807b795 panfrost: Always pass a non-NULL screen to set_damage_region()
We will soon have a different handling for Bifrost, and we need to know
which GPU we're targeting to choose the right path.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon f5d7c419e7 panfrost: Pass an image view to panfrost_new_texture()
pan_image_view contains everything we need to emit a texture
descriptor. Pass this object instead of the dozen of arguments
we have now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon 9d0ad7fd2e panfrost: Patch the gallium driver to use pan_image_layout_init()
Now that we have a generic implementation, we can use it and get rid
of panfrost_setup_layout().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon f1d4df1cd7 panfrost: Move special Z32_S8X24 case out of panfrost_setup_layout()
We are about to move the panfrost_setup_layout() logic out of the
gallium driver, and the Z32_S8X24 split is not mandatory (some GPU
support this format natively). Let's move this special case out of
panfrost_setup_layout() and patch the format of the first plane
instead.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon 50f39908aa panfrost: Move out-of-band CRC info to pan_image
We already have the data BO stored there, let's move the out-of-band
CRC BO too. We also add a CRC mode to pan_image_layout so we can easily
know where the CRC resides.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon 1c7e8a1692 panfrost: Add an offset field so we can attach a sub-buffer to an image
Needed for Vulkan.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon 8bd70ea6ea panfrost: Split pan_image in two
Move the image view bit out of pan_image and create a separate
pan_image_view struct. Once this is done we can embed a pan_image
object in panfrost_resource which will be referenced by the image
view that we pass to panfrost_load_{midgard,bifrost}().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon cfe9bca912 panfrost: Add extra info to the pan_image_layout struct
This means duplicating some of the bits we already have in the
pipe_resource object embedded in panfrost_resource, but if will also
allow us to move some code out of the gallium driver without requiring
copy those fields every time we call a generic helper.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon 5d7c244c07 panfrost: Add a format field to pan_image_layout
We will need this information at the layout level if we want to move
some of the code out of the gallium driver and share it with the
Vulkan driver. Let's get rid of panfrost_resource.internal_format which
basically encodes the same thing.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon 3f8cebee09 panfrost: Move image states out of pan_image_layout
The layout is supposed to encode image miplevels/surfaces layout, not
the state data stored in the buffers. It doesn't matter for a gallium
driver, since resources are expected to hold both a layout and a state,
but Vulkan is a bit different. In Vulkan, the image state is explicitly
passed by the user when starting a render pass (vkCmdBeginRenderPass()),
and might evolve depending on the operation done in this render pass.
This state is not effective until the command buffer is queued and
executed. For these reasons, keeping the image state attached to the
VkImage object is not an option, but we'd still like to re-use the
layout and state objects, and all common helpers acting on those objects.

Let's move the state bits out of the layout to make that possible.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Boris Brezillon b00b6a727c panfrost: s/panfrost_slice/pan_image_slice_layout/
We are about to move slice states out of the panfrost_slice object,
but before we do that, let's rename the existing struct to reflect what
this object refers to.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10033>
2021-04-13 18:06:37 +00:00
Lucas Stach 07546c69b0 Revert remaining half of "gallium/dri2: Pass the resource that corresponds to the plane"
As documented in 6ec7e0d406 (gallium: document convention for get_handle
calls on multi-planar resources) it's the drivers responsibility to walk
the chain of resources for multi-planar resources. The get_handle interface
should always be called with the base resource by the frontend.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10212>
2021-04-13 16:40:04 +00:00
Juan A. Suarez Romero d69d8817c9 v3d: use GS_BIN inputs as VS_BIN outputs
When creating the Vextex Shader bin, only store outputs that will be
read later as inputs by the Geometry Shader bin.

This fixes
KHR-GLES31.core.geometry_shader.rendering.rendering.lines_input_triangle_strip_output_line_loop_drawcall
(exposed by previous commit).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10129>
2021-04-13 16:08:00 +00:00
Marek Olšák d7250b0b08 gallium: add PIPE_SHADER_CAP_FP16_CONST_BUFFERS for FP16 uniforms
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9050>
2021-04-13 05:07:42 +00:00
Marek Olšák fb29cef8dd nir: add many passes that lower and optimize 16-bit input/outputs and samplers
Added:
* a pass that renumbers bases of IO intrinsics
* a pass that converts mediump IO to 16 bits, optionally using the new
  packed varying slots
* a pass that sets (forces) mediump in IO intrinsics (for testing)
* a pass that remaps VARYING_SLOT_VAR[0..15]_16BIT to VARYING_SLOT_VAR[0..31]
  (if some shader stages don't want packed varyings)
* a pass that folds type conversions around texture opcodes into those
  opcodes (e.g. tex(f2f32(coord), ..) is changed into tex accepting f16)
* a pass that changes (legalizes) sampler src and dst types based on specified
  hw constraints (e.g. derivatives must be the same type as coordinates)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9050>
2021-04-13 05:07:42 +00:00
Marek Olšák f9b527a9a5 radeonsi: unify internal compute with SSBOs in si_launch_grid_internal_ssbos
just deduplicate the code

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák ec60526035 radeonsi: move binding the internal compute shader into si_launch_grid_internal
instead of doing it in each function

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák aa8a6e5f26 radeonsi: enable DCC for MSAA 4x and 8x on gfx9
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 3120113ee7 radeonsi: implement DCC MSAA 4x/8x fast clear using DCC equations on gfx9
MSAA 4x and 8x should only clear the first 2 samples because other samples
are uncompressed. The compute shader only clears that subset of DCC.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 8b95f51ef1 radeonsi: fix and enable full DCC with MSAA 2x on gfx9
This enables fast clear with any clear color (not just 0/1) for bpp >= 32.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 7e68fae25f ac,radeonsi: rewrite DCC retiling without the DCC retile map
The retile map is removed and replaced by direct DCC address computations
in the retile shader using the new function ac_nir_dcc_addr_from_coord.

The RADV code is disabled.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák ec42f52013 radeonsi: allow DCC_DECOMPRESS via CB with MSAA textures
The shader-based codepath doesn't support it.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 8277732358 radeonsi: try to fix DCC coherency issues with DCC decompression
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák f7c58559f5 radeonsi: refine fast clears for small buffers, always use them for large HTILE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 06b6af596c radeonsi: do Z-only or S-only HTILE clear using a compute shader doing RMW
This adds a clear_buffer compute shader that does read-modify-write to
update a subset of bits in HTILE.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 84fa21a611 radeonsi: when transitioning to TC-compat HTILE, try to do a proper clear
instead of always clearing to uncompressed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 558ab3310d radeonsi: enable DCC fast clears for non-zero mipmap levels and 0/1 clear values
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 9defe8aca9 radeonsi: implement fast Z/S clears using clear_buffer on HTILE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák e2714d5dd4 radeonsi: indent the code for TC-compatibility HTILE transition
So that HTILE clears can be nicely inserted into a new else statement there.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák fcd01ad444 radeonsi: add si_can_fast_clear_depth/stencil helpers
for later use

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 4dd8d58ad5 radeonsi: clean up some mess around htile_stencil_disabled
Set the final value in si_texture_create_object, so that other places
don't have to derive it redundantly.

The only thing to remember is that HTILE stencil can be enabled when
stencil is not present, and it can be disabled when stencil is present
due to various workarounds.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák bcd1a69f79 radeonsi: parallelize Z/S conversion into TC-compatible with fast color clears
It's not really a fast clear, but it's the next logical step towards doing
HTILE clears here.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák fb72d41b18 radeonsi: implement Z/S fast clear for non-zero mipmap levels
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 6434b0b652 radeonsi: implement per-level DCC and CMASK fast clears for gfx10+
Fast clears are only used for level 0. This enables clearing level 0
of CMASK and DCC on gfx10+ when there are multiple mipmap levels.
vi_dcc_clear_level can also clear any level now.

Mipmapped array textures are still cleared slowly.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák 059f042fb1 radeonsi: allow trivial DCC clears for shared textures with DCC constant encode
This relaxes the existing restriction.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák c00b314ae4 radeonsi: restructure DCC disablement into a switch
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák fa43d61953 radeonsi: don't cache FMASK transactions from CB in L2
FMASK is usually pretty large. It's better to leave the cache to shaders.
FMASK stores are still cached, but they can be evicted sooner, which is
the same as other color stores. Only DCC, HTILE, and CMASK are cached.

I haven't benchmarked this, but it seems like the right thing to do.
This only affected APUs.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Nanley Chery bc1f715076 iris: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC
With a resolution of 1600x1200, I measured FPS increases in:

* glxgears 18.04% +/- 0.65% (n=691)
* Nexuiz    3.58% +/- 0.09% (n=553)

compared to the master branch at commit
3f614c6f7c.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9230>
2021-04-13 02:53:11 +00:00
Nanley Chery 4785aad6a0 iris: Support RC_CCS_CC modifier in plane queries
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9230>
2021-04-13 02:53:11 +00:00
Nanley Chery f02951d727 iris: Support clear color plane imports for RC_CCS_CC
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9230>
2021-04-13 02:53:11 +00:00
Nanley Chery 0092219cfe iris: Set BO maps to NULL in bo_free
bo_free is called on external BOs when there are no objects left which
reference them. The function unmaps the address range associated with
any maps which occured. However, if the BO is busy (not idle), it
doesn't mark the pointer to the start address as invalid. This can lead
to a segfault later on.

At the end of bo_free, these BOs are still present in the handle hash
table. If such a BO is reused (i.e., when a DMABUF with the same handle
is reimported) and the driver attempts to get another mapping, the
bufmgr will incorrectly assume that the map pointer is still valid and
reuse it. This leads to a segfault. Set the pointer to NULL to mark it
as invalid.

Enables iris to run and pass the piglit test,
ext_image_dma_buf_import-reimport-bug.

Cc: mesa-stable
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9230>
2021-04-13 02:53:11 +00:00
Mike Blumenkrantz 5a61a4dbfa aux/trace: do deep dumps of fb state for triggered traces
having the full surface info available here is very useful

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10093>
2021-04-13 02:04:22 +00:00
Mike Blumenkrantz 5ac3bb806b aux/trace: dump current fb state on trigger-mode draw if it hasn't been seen yet
this info is important to have for a given frame, but it requires that the base
structs be copied and stored to the trace context for later use

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10093>
2021-04-13 02:04:22 +00:00
Mike Blumenkrantz 5ecffaa7a6 aux/trace: enhance trigger mode to dump context states during bind
when dumping a single frame, the creation info for these states hasn't been
dumped yet, so always dump it during bind so it's visible

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10093>
2021-04-13 02:04:22 +00:00
Icecream95 821d68652d panfrost: Add fast path for graphics work group computation
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10158>
2021-04-12 23:53:41 +00:00
Icecream95 1b41707bbc panfrost: Only add resource checksum BOs to the batch once
Previously panfrost_batch_add_bo was called MAX_MIP_LEVELS times on
the same batch.

Fixes: cbf68b21fb ("panfrost: Move checksum_bo to panfrost_resource")

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10158>
2021-04-12 23:53:41 +00:00
Thong Thai e62c7e7c6c radeon: Add cropping to encoded H.265 when padding is used
Because the VCN encoder needs the surface to be memory aligned, the
resolution of the image passed to the encoder might be larger and have
extra padding added - this change crops the resulting output to
compensate for the extra padding that might have been added.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4559
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10137>
2021-04-12 22:42:53 +00:00
Vasily Khoruzhick 77fdabdfa5 lima: limit number of draws per job
Otherwise we may hit tile heap size limit if an app issues too many
draws per job.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10121>
2021-04-12 22:34:12 +00:00
Vasily Khoruzhick c8e80c24d4 lima: use passed surface to get mipmap level for reload, not cbuf
lima_pack_reload_plbu_cmd() can be used for either cbuf or zsbuf, so
use passed surface other using cbuf unconditionally.

Fixes: b8c31ac06d ("lima: fix glCopyTexSubImage2D")
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10121>
2021-04-12 22:34:12 +00:00
Erico Nunes b071d98c04 lima: increase epsilon for depthrange near == far
When the application sets depthrange near == far, lima inserts an
'epsilon' difference of decreasing 'near' by 1 unit, to prevent
application bugs.
For some specific values of depthrange this does not seem to be
sufficient, presumably due to precision limitations.
Increase the difference by also incrementing the 'far' distance in
this case, to further avoid bugs.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9933>
2021-04-12 21:08:35 +00:00
Marek Olšák faf10bd49d ac/surface: use named "color and "zs" structures in unions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
2021-04-12 20:53:45 +00:00
Marek Olšák 468836317b ac/surface: unify htile_* and dcc_* fields as meta_* fields
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
2021-04-12 20:53:45 +00:00
Marek Olšák ab00557685 ac/surface: pack alignments by storing log2 in radeon_surf
Only one bit is set in alignments, so store the bit offset (log2) and
change the type from uint32_t to uint8_t.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
2021-04-12 20:53:45 +00:00
Marek Olšák 3f074d2f45 ac/surface: inline and reorder gfx9_surf_flags for better packing
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
2021-04-12 20:53:45 +00:00
Marek Olšák 48dbdc62bf ac/surface: change legacy_surf_level::offset to 32-bit offset_256B shifted by 8
Images are always aligned to 256B (enforced by register and descriptor
fields) and limited to 40-bit addresses. This saves some space.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
2021-04-12 20:53:45 +00:00
Marek Olšák 2fd8018845 ac/surface: split dcc level info from surface_info to save space
stencil level info doesn't have DCC

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
2021-04-12 20:53:45 +00:00
Leo Liu 544044b29e radeonsi: replace the hard coded video decode and encode caps
For the caps of max_width, max_height and max_level with those
that are available via querying the kernel.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10095>
2021-04-12 17:33:32 +00:00
Ilia Mirkin 1b06189f4a nv50: enable ARB_framebuffer_no_attachments
This is a required part of ES3.1 and fairly trivial to enable. In
practice it's almost entirely useless since the only information one
would be able to obtain are queries.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10162>
2021-04-12 16:45:40 +00:00
Ilia Mirkin 97d61ae771 nv50/ir: fake SV_THREAD_KILL support
If we say that there are no helper invocations, it's suboptimal but
allows ES 3.1 to chug along.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10162>
2021-04-12 16:45:40 +00:00
Ilia Mirkin ea49c9dabc nv50: emulate indirect draws
This is helpful for allowing ES 3.1 to work, as this is required.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10162>
2021-04-12 16:45:40 +00:00
Ilia Mirkin 1baefe4119 nv50/ir: fix texture size for msaa textures
These are scaled up in the descriptor, which doesn't really know about
their MSAA-ness. So we have to shift them back down.

Cc: mesa-stable
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10162>
2021-04-12 16:45:40 +00:00
Rhys Perry a2619b97f5 nir/lower_idiv: add options to use fp32 for 8-bit division lowering
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
2021-04-12 16:19:46 +00:00
Alyssa Rosenzweig e00d94f14f panfrost: Enable AFBC buffer sharing
This was hidden originally to workaround a bug in the RK3399 display
driver. The patch resolving this issue has been merged in the upstream
kernel, and in fact...

1. The issue was visible on 21.0 even with this workaround under certain
   configurations (sway with an external monitor).
2. Even on buggy kernels, due to other platform details this is an
   obscure bug to hit (not aware of any ways to trigger it OOTB with
   current userspaces other than sway with an external monitor)

So why bother? Let's just delete the hack and let AFBC be used freely.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10148>
2021-04-12 15:55:55 +00:00
Alyssa Rosenzweig 23b060bba7 panfrost: Fix AFBC body_size for shared resources
Accidental read-before-write due to incorrect statement ordering. I love
SSA as much as anyone, but not everything is a parallel copy.

Fixes faults in glamor in 21.0 when using GIMP on v5.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Fixes: e8b997e175 ("panfrost: Add AFBC slice.body_size and slice.{row,surface}_stride fields")
Closes: #4389
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10148>
2021-04-12 15:55:55 +00:00
Mike Blumenkrantz e52712a653 zink: disable mutable formats for zs formats and scanout images
swapchain images are never going to be used as texture views, and zs formats
aren't compatible with any other formats

this enables implicit modifiers in some cases, and more work can be done in the future
to eliminate mutable format usage to further improve performance

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10180>
2021-04-12 15:37:46 +00:00
Mike Blumenkrantz 3622df7ab2 zink: flag anv for mesa image create wsi
the image creation wsi is used, but the memory creation wsi isn't

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10180>
2021-04-12 15:37:46 +00:00
Mike Blumenkrantz 104603fa76 zink: create separate linear tiling image for scanout
rendering onto a linear-tiled image is unbelievably slow if any sort of
blending is enabled, so instead always render to optimal tiling and then
copy to linear for scanout

this doubles performance for now and can be deleted in its entirety along
with the rest of the related hacks once real wsi support is implemented

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10180>
2021-04-12 15:37:46 +00:00
Mike Blumenkrantz 6a545e69d9 zink: make a bunch of descriptor functions static
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10177>
2021-04-12 12:51:27 +00:00
Mike Blumenkrantz 344c4ab580 zink: move descriptor state management to descriptors.c
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10177>
2021-04-12 12:51:27 +00:00
Pierre-Eric Pelloux-Prayer 8c6a64c9b0 radeonsi/rgp: export compute shader programs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10105>
2021-04-12 14:27:29 +02:00
Pierre-Eric Pelloux-Prayer aa077ba3a2 radeonsi/rgp: export barriers
Wrap the si_cp_wait_mem call to emit RGP_SQTT_MARKER_IDENTIFIER_BARRIER_START and
RGP_SQTT_MARKER_IDENTIFIER_BARRIER_END events.

Only for gfx9+ for now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10105>
2021-04-12 14:27:26 +02:00
Tomeu Vizoso 0e0dc669bd Revert "ci: Disable panfrost t760"
The devices have been running KernelCI jobs for a good while without
glitches, let's reenable Mesa jobs on them now.

This reverts commit c6fbbbbf70.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10173>
2021-04-12 13:19:23 +02:00
Tomeu Vizoso 44f0dbb724 Revert "ci: Disable panfrost g52"
The devices have been running KernelCI jobs for a good while without
glitches, let's reenable Mesa jobs on them now.

This reverts commit 40647fcc3d.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10173>
2021-04-12 13:19:19 +02:00
Tomeu Vizoso 113cb036c7 Revert "ci: Disable t720 LAVA jobs"
The maintenance window is closed.

This reverts commit 4fa9c359426254d01f2a6ee61d1868adb8d980fa.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10173>
2021-04-12 13:19:05 +02:00
Tomeu Vizoso 10f05c9030 ci: Disable t720 LAVA jobs
As the devices providing the testing are going down due to a planned
maintenance window of 4 hours.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10167>
2021-04-12 09:09:04 +02:00
Ilia Mirkin 0dfc5b5196 nv50/ir: fix emission of ld/st lock/unlock
This is necessary to implement shared atomics.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin d0fa6e066b nv50/ir: avoid inlining results of a locked load
These are a bit special. Among other things, removing them will cause us
to potentially remove the load itself, defeating the purpose of the
locking. Also it's unclear whether it's legal to access the shared
memory directly when it's locked like this.

This only comes up on nv50, since on nvc0+, shared memory can't be
loaded from random ops.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 7052927ee4 nv50: fix expression for ucp offset
It doesn't matter since it's 0, but all the offsets are in bytes whereas
the method expects words. So adjust by 2.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 52172fded5 nv50/ir: fix emission of cas without a destination
We were previously dumping $r127 in there. This has a bad effect on
nv50, so make sure we allocate an actual register for it, even if
there's nothing using the result.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin a3b02fea7e nv50/ir: fix emission of 16-bit add
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin fe93723aaa nv50/ir: add support for 16-bit immediates
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 8a69efa171 nv50/ir: logic ops on half-regs can't take an immediate
There does not appear to be an instruction form for this. Prevent an
immediate from being loaded into place.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin afcd296b1b nv50/ir: fix emission of shifts on half-regs
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin af8665c3a5 nv50/ir: fix emission of logic ops on half-regs
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 96e8e74813 nv50/ir: fix emission of cvt with half-reg destinations
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin c6b02c097f nv50/ir: fix emitting movs from imm to short registers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 2ff2d65799 nv50/ir: lower buffer to global
The idea is that buffers will be bound to the appropriate indices. That
means that we can just rename them to global.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin ee28cae1ef nv50/ir: fix emission of RED
When the atomic result is unused, the opcode form needs to be a bit
different.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 1fad964553 nv50/ir: do not use inline offsets for global, ensure indirect access
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin 3e99271163 nv50/ir: force shared memory indirect to be an address
The upstream logic will not end up using an address, so we have to force
it here. The other backends don't care either.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin d2a0aa5efe nv50/ir: retrieve (n)ctaid.z from first user param
The driver is responsible for feeding this in.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin de71feccbf nv50: pass in third axis via user param
This is probably not the most efficient way to go for all geometries,
but the assumption is that kernels tend to be x/y-heavy rather than
z-heavy. Iterates over each z slice and passes in the current value via
user param. (And bump all user params by a dword.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:22 -04:00
Ilia Mirkin c3e9be9b5a nv50: add texture, constbuf, image, buffer validation
This makes compute mostly work. For now we're laying out images/buffers
in a fixed offset from each other in the globals "array", but this
should be done dynamically. We're also missing passing image info to
shaders, as well as adding image formats to a shader key.

Heavily inspired by nvc0 variants of these.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 12:31:14 -04:00
Ilia Mirkin 1a6a772527 nv50: implement memory barrier handling
With shader images / buffers, we can get more complex barrier requests.
This mirrors the logic in nvc0.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 11:47:42 -04:00
Ilia Mirkin cd296c9f8c nv50: add resource tracking for shader images and buffers
Heavily inpsired by the nvc0 code. Note that these only exist for the
compute stage, so there is no shared-based indexing.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 11:47:42 -04:00
Ilia Mirkin ba6ba8c990 nv50: adapt texture and constbuf paths for compute shaders
This contains the logic updates necessary to perform necessary resource
tracking and emit update / flush commands for the relevant stages.

Inspired by some changes from Pierre Moreau.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 11:47:42 -04:00
Pierre Moreau 9abfd4ba18 nv50: Update texture indices to match stage indices
For legacy reasons, we were using the PIPE order, instead of the
hardware order. Reorder the stages to match the order of the
BIND_TIC/etc methods, and adjust internal usage to match.

Signed-off-by: Pierre Moreau <dev@pmoreau.org>
[imirkin: fixed numbering, removed TODO comments]

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 11:47:42 -04:00
Pierre Moreau afe1472cde nv50: Replace hardcoded texture/constbuf count with define
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
2021-04-11 11:47:42 -04:00
Erico Nunes 2d6b7b2e0c lima: enable rg formats for fp16 render
These were noticed by trial and error after fixing the fp16 render
setup.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9916>
2021-04-11 10:06:50 +00:00
Erico Nunes 8393fad0de lima: fix half float render
Format 0x26 is invalid, formats are in a 4 bit field so they repeat
in increments of 16.
Frame reg flags needs to set 0x01 to actually enable fp16.
The clear color setup is also a bit different for fp16, need to use
the 16 bit values in the first two clear color registers.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9916>
2021-04-11 10:06:50 +00:00
Matti Hamalainen 44ed8378bf gallium/tools: update trace scripts to Python 3
Bring the scripts for parsing, dumping state and diffing of Gallium
trace files to modern day by updating them to Python 3.

Add option '-p' to some tools for outputting only plaintext
instead of ANSI / colorized format.

Also fix state parsing of some dumps by adding 'clear_render_target'
and 'get_disk_shader_cache' to ignored calls list.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4321
Signed-off-by: Matti Hamalainen <ccr@tnsp.org>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9830>
2021-04-10 14:00:45 +00:00
Erik Faye-Lund e7bece080f zink: fix typo in function name
Suggested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10127>
2021-04-10 09:48:38 +00:00
Erik Faye-Lund 6940d3ba05 zink: document scalarBlockLayout requirement
We're currently using uint arrays instead of uvec4 arrays for UBOs and
SSBOs, which requires scalarBlockLayout. Fixing this is a lot of work,
so let's just document it for now.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10127>
2021-04-10 09:48:38 +00:00
Icecream95 0a7a61b2d7 panfrost: Only do point coord replacement for PIPE_PRIM_POINTS
Fixes rendering in Terraria on Midgard.

Thanks to macc24 for reporting this and to HdkR for pointing me to a
similar issue for virgl.

Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10154>
2021-04-10 16:56:39 +12:00
Lucas Stach 76c0217fb0 etnaviv: remove stale comment in etna_resource_copy_region
The comment about using the RS engine was correct before the code got
changed to use the 3D blitter and a fallback before etnaviv was merged
into upstream Mesa. It has been incorrect ever since. As it's just
adding confusion, instead of being helpful, remove it.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9310>
2021-04-09 22:44:17 +02:00