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nv50/ir: logic ops on half-regs can't take an immediate 

There does not appear to be an instruction form for this. Prevent an
immediate from being loaded into place.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
This commit is contained in:
Ilia Mirkin 2021-02-24 22:18:37 -05:00
parent afcd296b1b
commit 8a69efa171
1 changed files with 4 additions and 1 deletions
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5
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
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@ -355,8 +355,11 @@ TargetNV50::insnCanLoad(const Instruction *i, int s,
ldSize = typeSizeof(ld->dType);
}
if (sf == FILE_IMMEDIATE)
if (sf == FILE_IMMEDIATE) {
if (ldSize == 2 && (i->op == OP_AND || i->op == OP_OR || i->op == OP_XOR))
return false;
return ldSize <= 4;
}
// Check if memory access is encodable: