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nv50/ir: retrieve (n)ctaid.z from first user param 

The driver is responsible for feeding this in.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
This commit is contained in:
Ilia Mirkin 2021-02-24 22:16:52 -05:00
parent de71feccbf
commit d2a0aa5efe
3 changed files with 9 additions and 15 deletions
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18
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
View File

@ -1181,19 +1181,13 @@ NV50LoweringPreSSA::handleRDSV(Instruction *i)
break;
case SV_NCTAID:
case SV_CTAID:
case SV_NTID:
if ((sv == SV_NCTAID && idx >= 2) ||
(sv == SV_NTID && idx >= 3)) {
bld.mkMov(def, bld.mkImm(1));
} else if (sv == SV_CTAID && idx >= 2) {
bld.mkMov(def, bld.mkImm(0));
} else {
Value *x = bld.getSSA(2);
bld.mkOp1(OP_LOAD, TYPE_U16, x,
bld.mkSymbol(FILE_MEMORY_SHARED, 0, TYPE_U16, addr));
bld.mkCvt(OP_CVT, TYPE_U32, def, TYPE_U16, x);
}
case SV_NTID: {
Value *x = bld.getSSA(2);
bld.mkOp1(OP_LOAD, TYPE_U16, x,
bld.mkSymbol(FILE_MEMORY_SHARED, 0, TYPE_U16, addr));
bld.mkCvt(OP_CVT, TYPE_U32, def, TYPE_U16, x);
break;
}
case SV_TID:
if (idx == 0) {
bld.mkOp2(OP_AND, TYPE_U32, def, tid, bld.mkImm(0x0000ffff));

4
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
View File

@ -251,9 +251,9 @@ TargetNV50::getSVAddress(DataFile shaderFile, const Symbol *sym) const
return shaderFile == FILE_SHADER_INPUT ? 0x18 :
sysvalLocation[sym->reg.data.sv.sv];
case SV_NCTAID:
return 0x8 + 2 * sym->reg.data.sv.index;
return sym->reg.data.sv.index >= 2 ? 0x10 : 0x8 + 2 * sym->reg.data.sv.index;
case SV_CTAID:
return 0xc + 2 * sym->reg.data.sv.index;
return sym->reg.data.sv.index >= 2 ? 0x12 : 0xc + 2 * sym->reg.data.sv.index;
case SV_NTID:
return 0x2 + 2 * sym->reg.data.sv.index;
case SV_TID:

2
src/gallium/drivers/nouveau/nv50/nv50_compute.c
View File

@ -528,7 +528,7 @@ nv50_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info)
PUSH_DATA (push, cp->code_base);
BEGIN_NV04(push, NV50_CP(SHARED_SIZE), 1);
PUSH_DATA (push, align(cp->cp.smem_size + cp->parm_size + 0x10, 0x40));
PUSH_DATA (push, align(cp->cp.smem_size + cp->parm_size + 0x14, 0x40));
BEGIN_NV04(push, NV50_CP(CP_REG_ALLOC_TEMP), 1);
PUSH_DATA (push, cp->max_gpr);