KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

nv50/ir: fix emission of cas without a destination 

We were previously dumping $r127 in there. This has a bad effect on
nv50, so make sure we allocate an actual register for it, even if
there's nothing using the result.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
This commit is contained in:
Ilia Mirkin 2021-02-27 18:24:44 -05:00
parent a3b02fea7e
commit 52172fded5
2 changed files with 11 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
View File

@ -3928,7 +3928,10 @@ DeadCodeElim::visit(BasicBlock *bb)
if (i->op == OP_ATOM ||
i->op == OP_SUREDP ||
i->op == OP_SUREDB) {
i->setDef(0, NULL);
const Target *targ = prog->getTarget();
if (targ->getChipset() >= NVISA_GF100_CHIPSET ||
i->subOp != NV50_IR_SUBOP_ATOM_CAS)
i->setDef(0, NULL);
if (i->op == OP_ATOM && i->subOp == NV50_IR_SUBOP_ATOM_EXCH) {
i->cache = CACHE_CV;
i->op = OP_STORE;

7
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
View File

@ -2574,6 +2574,13 @@ RegAlloc::InsertConstraintsPass::visit(BasicBlock *bb)
i->op == OP_MERGE ||
i->op == OP_SPLIT) {
constrList.push_back(i);
} else
if (i->op == OP_ATOM && i->subOp == NV50_IR_SUBOP_ATOM_CAS &&
targ->getChipset() < 0xc0) {
// Like a hazard, but for a def.
Instruction *nop = new_Instruction(func, OP_NOP, i->dType);
nop->setSrc(0, i->getDef(0));
i->bb->insertAfter(i, nop);
}
}
return true;