Commit Graph

125036 Commits

Author SHA1 Message Date
Lionel Landwerlin 8b44e45347 intel/perf: fix roll over PERF_CNT counter accumulation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5ba6d9941b ("intel/perf: add mdapi writes for register perf counters")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9163>
2021-02-22 12:15:54 +00:00
Lionel Landwerlin 018393d851 intel/perf: Add Alderlake metrics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9186>
2021-02-22 13:49:53 +02:00
Lionel Landwerlin 65b6eacb0b intel/dev: identify alderlake
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9186>
2021-02-22 13:49:41 +02:00
Samuel Pitoiset e5d8b731e4 radv: emit missing subpass resolve marker for SQTT
RGP now shows CmdEndRenderPassResolve() in the Event timing panel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9106>
2021-02-22 08:30:38 +01:00
Samuel Pitoiset 491a1949eb radv: rework radv_cmd_buffer_resolve_subpass() a bit
To emit the subpass resolve marker properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9106>
2021-02-22 08:30:36 +01:00
Vinson Lee 7cc83f237e aco: Initialize ds_state.front.writeMask.
Fix defect reported by Coverity Scan.

Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value ds_state.front. Field ds_state.front.writeMask is uninitialized.

Fixes: d488d0fd7b ("aco: add framework for testing isel and integration tests")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9033>
2021-02-21 19:33:00 -08:00
Timothy Arceri 9f474bd4b4 nir: handle negatives in ffma reassociation optimisation
shader-db results Iris (BDW):

total instructions in shared programs: 16632076 -> 16631057 (<.01%)
instructions in affected programs: 48010 -> 46991 (-2.12%)
helped: 47
HURT: 6

total cycles in shared programs: 915266726 -> 915263622 (<.01%)
cycles in affected programs: 1182283 -> 1179179 (-0.26%)
helped: 18
HURT: 27

total loops in shared programs: 4929 -> 4929 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 18834 -> 18801 (-0.18%)
spills in affected programs: 525 -> 492 (-6.29%)
helped: 3
HURT: 0

total fills in shared programs: 23008 -> 22981 (-0.12%)
fills in affected programs: 435 -> 408 (-6.21%)
helped: 3
HURT: 0

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8608>
2021-02-22 00:49:13 +00:00
Dave Airlie b4f7535ba2 lavapipe: use clear interface for renderpass clears
For llvmpipe this means clears happen in the raster threads
rather than in the single cpu thread.

This path can't be used for scissored or clears with different
clear colors per mrt.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9041>
2021-02-22 00:30:46 +00:00
Dave Airlie 2ecb47abda llvmpipe: zs clear use 64-bit memset
Use the newly added memset64 path

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9041>
2021-02-22 00:30:46 +00:00
Dave Airlie 3116f9801b u_surface: use optimised memset64
Use the newly added optimised memset64 path

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9041>
2021-02-22 00:30:46 +00:00
Dave Airlie 83f0bc5d84 util: add optimised memset64
This just adds a memset64 along the lines of the previously
added memset32.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9041>
2021-02-22 00:30:46 +00:00
Rob Clark 2ff397c00e util/fossilize_db: Fix compile error with clang
../src/util/fossilize_db.c:178:58: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
         char hash_str[FOSSILIZE_BLOB_HASH_LENGTH + 1] = {};

Fixes: eca6bb9540 ("util/fossilize_db: add basic fossilize db util to read/write shader caches")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9180>
2021-02-22 00:06:35 +00:00
Dave Airlie 226c7ae2a8 lavapipe: reset object base on recycled command buffers
The loader_set_dispatch overwrites the magic with the dispatch
pointer, however when cmd buffers get recycled, and the loader
is in debug mode, it asserts that the magic isn't set anymore.

When recycling command buffers, reset the object base.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9145>
2021-02-22 09:32:57 +10:00
Dave Airlie 7b1568b7a3 tu: reset object base on recycled command buffers
The loader_set_dispatch overwrites the magic with the dispatch
pointer, however when cmd buffers get recycled, and the loader
is in debug mode, it asserts that the magic isn't set anymore.

When recycling command buffers, reset the object base.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9145>
2021-02-22 09:32:49 +10:00
Dave Airlie bd98fc39ae radv: reset object base on recycled command buffers
The loader_set_dispatch overwrites the magic with the dispatch
pointer, however when cmd buffers get recycled, and the loader
is in debug mode, it asserts that the magic isn't set anymore.

When recycling command buffers, reset the base object.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9145>
2021-02-22 09:32:45 +10:00
Dave Airlie 5a340c0929 vulkan/util: add api to reset object magic + private data.
This will be used to for reissuing dispatchable objects like
command buffers.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9145>
2021-02-22 09:32:13 +10:00
Alyssa Rosenzweig 5b6ed24cb8 gallium/tessellator: Rename D3D11 defines
We're Gallium, c'mon!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9118>
2021-02-21 22:17:35 +00:00
Alyssa Rosenzweig 248a5a330d gallium/tessellator: Remove unused includes
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9118>
2021-02-21 22:17:35 +00:00
Alyssa Rosenzweig bca9e7fe23 gallium/tessellator: Remove XBOX 360 code
Unused.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9118>
2021-02-21 22:17:35 +00:00
Erico Nunes f3d47ba0c7 lima: fix max sampler views
If this is not defined, mesa may not deallocate sampler views,
which can result in memory leaks.
Just define it to the same as max texture samplers, like other
mesa drivers do.

Cc: mesa-stable
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9172>
2021-02-21 19:21:45 +00:00
Timothy Arceri 644fcd9486 util/disk_cache: make use of single file cache when env var set
When the MESA_DISK_CACHE_SINGLE_FILE environment variable is set
we make use of the new single file shader cache implementation.

The new cache uses the following directory structure based on the
first defined name as follows:

 $MESA_GLSL_CACHE_DIR/driver_id/gpu_name/foz_cache.foz
 $MESA_GLSL_CACHE_DIR/driver_id/gpu_name/foz_cache_idx.foz

 $XDG_CACHE_HOME/mesa_shader_cache_sf/driver_id/gpu_name/foz_cache.foz
 $XDG_CACHE_HOME/mesa_shader_cache_sf/driver_id/gpu_name/foz_cache_idx.foz

 <pwd.pw_dir>/.cache/mesa_shader_cache_sf/driver_id/gpu_name/foz_cache.foz
 <pwd.pw_dir>/.cache/mesa_shader_cache_sf/driver_id/gpu_name/foz_cache_idx.foz

Where foz_cache_idx.foz is a database of offsets pointing to the location of
the shader cache entries in foz_cache.foz

This initial implementation doesn't have any max cache size handling and is
initially intended to be use by applications such as steam that will handle
cache management for us.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7725>
2021-02-21 02:50:45 +00:00
Timothy Arceri eca6bb9540 util/fossilize_db: add basic fossilize db util to read/write shader caches
My benchmarking shows no significant change in cache load times with a
single shader cache file vs the existing cache implementation of many
small files (tested with my spinning rust HDD).

However this new single file cache implementation does reduce the total
size on disk used by the shader cache. We have a problem with the existing
cache where writing tiny files to disk causes more disk space to be used than
is actually needed for the files due to the minimum size required for a file.
In pratice this tends to inflate the size of the cache on disk to over 3x
larger.

There are other advantages of using a single file for shader cache entries
such as allowing better removal of cache entries once we hit the max cache
size limit (although we don't implement any max cache size handling in this
initial implementation).

The primary reason for implementing a single file cache for now is to allow
better performance and handling by third party applications such as steam
that collect and distribute precompiled cache entries.

For this reason we also implement a new environment variable
MESA_DISK_CACHE_READ_ONLY_FOZ_DBS which allows a user to pass in a path
to a number of external read only shader cache dbs. There is an initial
limit of 8 dbs that can be passed to mesa like so:

MESA_DISK_CACHE_READ_ONLY_FOZ_DBS=/full_path/filename1, ... ,/full_path/filename8

Where the filename represents the cache db and its index file e.g.
filename1.foz and filename1_idx.foz

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7725>
2021-02-21 02:50:45 +00:00
Timothy Arceri 1fabc4ecbe util/mesa_sha1: add helper to reconvert sha1 hex strings
Converts the sha1 hex string representation back into its original
more compact format.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7725>
2021-02-21 02:50:45 +00:00
Timothy Arceri f88c13f26d util/disk_cache: use a new cache dir for the single file cache feature
This allows us to guarantee the different cache implementations will not
interfere with each other and should make it more clear that the max cache
size limits are applied separately for each cache implementation.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7725>
2021-02-21 02:50:45 +00:00
Timothy Arceri c1e4810221 util/disk_cache: move cache path strdup call back into disk_cache.c
This code is already OS agnostic and moving it here enables code
sharing in the following patches.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7725>
2021-02-21 02:50:45 +00:00
Timothy Arceri 48d7c4e0f3 util/disk_cache: do crc32 check on compressed data for ZSTD
This will be faster and avoids checking for errors with the
compression implementation which we shouldn't need to do. Instead
we trust the compression library does the correct thing and simply
error check the data loaded from disk.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7725>
2021-02-21 02:50:45 +00:00
Mark Janes f54a65c69b intel: check setuid before writing output file in INTEL_MEASURE
Without this check, the INTEL_MEASURE environment variable could be
misused to overwrite arbitrary files.

Fixes: 0f4143ec37 ("intel: Print GPU timing data based on INTEL_MEASURE")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9166>
2021-02-20 11:53:33 -08:00
Ian Romanick 3250e04d25 nir/algebraic: Add some max/min optimizations with 3 variables
Specifically, ARB assembly shaders with code like

    SLT    r0, r0, c[0].xxxx;
    ...
    KIL    r0.xyzx;

can result in this pattern.  The other cases (e.g., 'KIL r0.xxxx' and
'KIL r0.xyxx') are handled by existing patterns.

Reviewed-by: Matt Turner <mattst88@gmail.com>

All Intel platforms had similar results. (Tiger Lake shown)
total instructions in shared programs: 21050098 -> 21050065 (<.01%)
instructions in affected programs: 2062 -> 2029 (-1.60%)
helped: 31
HURT: 1
helped stats (abs) min: 1 max: 3 x̄: 1.10 x̃: 1
helped stats (rel) min: 1.14% max: 4.35% x̄: 1.89% x̃: 1.69%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.65% max: 0.65% x̄: 0.65% x̃: 0.65%
95% mean confidence interval for instructions value: -1.23 -0.84
95% mean confidence interval for instructions %-change: -2.12% -1.50%
Instructions are helped.

total cycles in shared programs: 855105466 -> 855105055 (<.01%)
cycles in affected programs: 50136 -> 49725 (-0.82%)
helped: 33
HURT: 0
helped stats (abs) min: 3 max: 22 x̄: 12.45 x̃: 12
helped stats (rel) min: 0.13% max: 1.57% x̄: 0.86% x̃: 0.92%
95% mean confidence interval for cycles value: -13.78 -11.13
95% mean confidence interval for cycles %-change: -0.97% -0.76%
Cycles are helped.

No fossil-db changes on any Intel platform.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9122>
2021-02-19 17:31:27 -08:00
Ian Romanick d9b5bce85a nir/algebraic: Remove some redundant b2f logic-op reduction patterns
There are patterns that will re-write the fmin or fmax part into a form
that other patterns will gradually convert to the same ior or iand.  For
example,

    fmax(b2f(a), b2f(b)) != 0
    b2f(a || b) != 0
    a || b

No shader-db or fossil-db changes on any Intel platform.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9122>
2021-02-19 17:31:24 -08:00
Ian Romanick 7e127c1fca nir/algebraic: Fix some min/max of b2f replacements
fmin(-A, -B) is -fmax(A, B), and fmax(-A, -B) is -fmin(A, B).  Therefore
the logic joining A and B should toggle between ior and iand for the
negated versions.

At the very least, a shader from Euro Truck Simulator 2 in shader-db is
affected by this.  The KIL instruction in the (ARB assembly) shader ends
up with the wrong logic.  This is _probably_ the source of
https://gitlab.freedesktop.org/mesa/mesa/-/issues/1346.

That said, the issue mentions that Mesa 18.0.5 works, but commit
68420d8322 ("nir: Simplify min and max of b2f") was added in 17.3.
Moreover, I was not able to reproduce the error in the ETS2 shader from
shader-db from any Mesa commit near the time the original fd.o bugzilla
was submitted (December 2018). 🤷

In fact, the current error in that shader starts with 9167324a86
("nir/algebraic: Mark some logic-joined comparison reductions as
exact").  That's a bit of a red herring as 9167324a86 just sets off a
chain of replacements that eventually leads to the incorrect min/max of
b2f patterns fixed by this commit.

The other affected shaders in the shader-db results are from Cargo
Commander.  These are also ARB assembly shaders.

I think any ARB assembly shader that uses the pattern

    SLT    r0, ...;
    ...
    KIL    -r0;

will suffer from issues related to this.

This change fixes the piglit
tests/spec/arb_fragment_program/kil-of-slt.shader_test test added in
https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/454.

shader-db results:

All Gen6+ platforms had similar result. (Ice Lake shown)
total instructions in shared programs: 20034604 -> 20034486 (<.01%)
instructions in affected programs: 3885 -> 3767 (-3.04%)
helped: 47
HURT: 2
helped stats (abs) min: 2 max: 4 x̄: 2.64 x̃: 2
helped stats (rel) min: 2.33% max: 8.33% x̄: 3.48% x̃: 3.39%
HURT stats (abs)   min: 3 max: 3 x̄: 3.00 x̃: 3
HURT stats (rel)   min: 13.64% max: 16.67% x̄: 15.15% x̃: 15.15%
95% mean confidence interval for instructions value: -2.83 -1.99
95% mean confidence interval for instructions %-change: -3.84% -1.60%
Instructions are helped.

total cycles in shared programs: 979881379 -> 979879406 (<.01%)
cycles in affected programs: 119873 -> 117900 (-1.65%)
helped: 46
HURT: 3
helped stats (abs) min: 10 max: 756 x̄: 45.41 x̃: 26
helped stats (rel) min: 0.53% max: 19.72% x̄: 1.67% x̃: 1.26%
HURT stats (abs)   min: 28 max: 56 x̄: 38.67 x̃: 32
HURT stats (rel)   min: 1.44% max: 3.54% x̄: 2.75% x̃: 3.27%
95% mean confidence interval for cycles value: -70.83 -9.70
95% mean confidence interval for cycles %-change: -2.23% -0.57%
Cycles are helped.

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8115098 -> 8115076 (<.01%)
instructions in affected programs: 2592 -> 2570 (-0.85%)
helped: 32
HURT: 2
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.88% max: 2.70% x̄: 1.35% x̃: 1.31%
HURT stats (abs)   min: 5 max: 5 x̄: 5.00 x̃: 5
HURT stats (rel)   min: 17.24% max: 18.52% x̄: 17.88% x̃: 17.88%
95% mean confidence interval for instructions value: -1.15 -0.15
95% mean confidence interval for instructions %-change: -1.83% 1.39%
Inconclusive result (%-change mean confidence interval includes 0).

total cycles in shared programs: 238189718 -> 238189802 (<.01%)
cycles in affected programs: 75076 -> 75160 (0.11%)
helped: 3
HURT: 31
helped stats (abs) min: 2 max: 130 x̄: 44.67 x̃: 2
helped stats (rel) min: 0.18% max: 5.70% x̄: 2.02% x̃: 0.19%
HURT stats (abs)   min: 2 max: 70 x̄: 7.03 x̃: 4
HURT stats (rel)   min: 0.07% max: 6.41% x̄: 0.53% x̃: 0.15%
95% mean confidence interval for cycles value: -7.27 12.21
95% mean confidence interval for cycles %-change: -0.33% 0.94%
Inconclusive result (value mean confidence interval includes 0).

No fossil-db changes on any Intel platform.

Fixes: 68420d8322 ("nir: Simplify min and max of b2f")
Closes: #1346
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9122>
2021-02-19 17:30:53 -08:00
Rob Clark a983a87a5f freedreno/ir3/print: Improve branch printing
Handle the instruction suffix better, and don't try to print src regs in
a generic way, since that doesn't really work out.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9142>
2021-02-19 22:56:56 +00:00
Rob Clark 03762a956e freedreno/ir3/print: More sane ssa src/dst display
Give src/dst a "ssa_%u" name generated from the instruction's unique
serialno.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9142>
2021-02-19 22:56:56 +00:00
Yevhenii Kharchenko 1516b6bd9a st/mesa: fix PBO download for TEXTURE_1D_ARRAY textures
Fixes 'nir_tex_src_coord' param was provided to NIR 'txf' operation as a
vec3 for TEXTURE_1D_ARRAY target, causing an assert.
Only following targets require vec3: TEXTURE_2D_ARRAY, TEXTURE_3D,
TEXTURE_CUBE, TEXTURE_CUBE_ARRAY. The rest must use vec2.

Packing layer value into Y-coordinate the same way it was done in
'create_fs' in commit 2bf6dfac.

Fixes: a01ad311 ("st/mesa: Add NIR versions of the PBO upload/download
shaders. ")

Signed-off-by: Yevhenii Kharchenko <yevhenii.kharchenko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9014>
2021-02-19 19:29:57 +00:00
Kenneth Graunke 4c4a91abe5 iris: Reference the shader variant for last_vue_map as well
We call update_last_vue_map after updating the shaders, which compares
the new and old VUE maps.  Except...updating the shaders may have
dropped the last reference to the variant that ice->shaders.last_vue_map
belonged to, leading to a classic use-after-free.

Fix this by taking a reference to the variant for the last VUE stage,
so it stays around until we're done with it.

Fixes: 1afed51445 ("iris: Store a list of shader variants in the shader itself")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4311
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9143>
2021-02-19 18:49:19 +00:00
Danylo Piliaiev 0fa7ec1473 turnip,freedreno/a6xx: tell hw the size of shared mem used by CS
Before, we only used 2k of shared memory.

It was found that 5 lower bits of SP_CS_UNKNOWN_A9B1 do control
the available size of shared memory for compute shaders, with
AVAILABLE_SIZE = (SP_CS_UNKNOWN_A9B1_SHARED_SIZE + 1) * 1k
up to 32k. And SP_CS_UNKNOWN_A9B1_SHARED_SIZE being zero enables
all 32k of shared memory.

Fixes tests:
 dEQP-VK.rasterization.line_continuity.line-strip
 dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_local.buffer.guard_nonlocal.workgroup.comp
 dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_nonlocal.workgroup.guard_local.buffer.comp
 dEQP-VK.memory_model.write_after_read.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_local.image.guard_nonlocal.workgroup.comp

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9157>
2021-02-19 20:28:44 +02:00
Eric Anholt dab845d457 ci: Move specific driver testing to separate files in separate dirs.
The top-level gitlab-ci.yml is big and unwieldy when one wants to work on
CI for a single driver.  Move the drivers to separate include files for
ease of finding all your driver's tests, and also to pave the way for work
on a single driver's CI to not retest all other drivers.

Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9139>
2021-02-19 17:30:36 +00:00
Jesse Natalie 8a3dbf1ca6 microsoft/clc: Add a test with an unused kernel arg
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9160>
2021-02-19 16:36:46 +00:00
Jesse Natalie 11061c4e28 microsoft/clc: Re-order dead variable removal after uniform vars_to_explicit_types
Since vars_to_explicit_types is now where driver_location/offset is filled out,
we need to make sure that we still have all app-provided kernel arg variables
at that point in time so they all get assigned unique offsets. That means
that we can't have removed dead uniforms yet, which also means we can't have
filled out metadata for inline samplers (since usage of them generates tons
of duplicate uniforms).

Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9160>
2021-02-19 16:36:46 +00:00
Danylo Piliaiev 14a0004232 turnip: consider tile_max_h when calculating tiling config
Otherwise we may get a tile height exceeding the maximum.

Fixes tests:
 dEQP-VK.pipeline.render_to_image.core.2d.huge.height.r8g8b8a8_unorm
 dEQP-VK.pipeline.render_to_image.core.2d.huge.height.r8g8b8a8_unorm_d16_unorm
 dEQP-VK.pipeline.render_to_image.core.2d.huge.height.r8g8b8a8_unorm_s8_uint

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9159>
2021-02-19 15:24:30 +00:00
Adam Jackson c763d238c6 xlib: Fix build regression since 99e25d183d
Just named the variable wrong. Can't really fault anyone for breaking a
target we don't build in CI...

Fixes: 99e25d183d mesa: optimize set_varying_vp_inputs by precomputing the conditions
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9132>
2021-02-19 10:10:02 -05:00
Yogesh Mohan Marimuthu 455ca9226a ac/rgp: set gfxip in elf_hdr.e_flags
This patch will set the gfxip into elf_hdr.e_flags by reading data
from struct rad_info->chip_class instead of hardcoding.

v2: remove unused #define

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 9ce8b5024a ac/rgp: dump co, col, pso database to rgp profile file
This patch dumps code object, code object loader events, pso correlation
databses to given rgp profile file. The data to dump is taken from
struct rgp_code_object, struct rgp_loader_events and
struct rgp_pso_correlation.

v2: fix sqtt_file structure name to match existing names in file.
    fix checking wrong variable for pso correlation record_count.
    remove freeing rgp database here.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 5d51ccd7d1 ac/rgp,radeonsi,radv: pass struct thread_trace_data to ac_sqtt_dump_data()
struct thread_trace_data holds struct rgp_code_object, struct
rgp_loader_events, struct rgp_pso_correlation data. This data is required
in function ac_sqtt_dump_data(). This patch makes the code changes
required to pass struct thread_trace_data to function ac_sqtt_dump_data().

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu c544e56fb5 ac/rgp: expose data structure to populate co, col, pso database
This patch exposes struct rgp_code_object, struct rgp_loader_events and
struct rgp_pso_correlation into struct ac_thread_trace_data. Other modules
can fill in this data structure. The code object, code object loader events,
pso correlation database is written to rgp profile file using data from
these data structure exposed by this patch.

v2: move the data structures to struct ac_thread_trace_data

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 110bb2c77d ac/rgp: add helper function to write rgp elf oject
This patch adds helper function ac_rgp_write_elf_object() which
creates elf object from struct rgp_code_object_record. The elf
object is written to given output rgp profile file.

v2: for newly added files, change copyright year from 2020 to 2021
v3: fix 32bit compilation failure

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 12515d6b59 ac/rgp: add rgp co, col, pso data structures
This patch adds data structures used to collect data for code object,
code object loader event and pso correlation databases present in
a rgp profile.

v2: fix code review comments from Pierre-Eric
v3: Make loader_event_type into enum

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 27ff46bde6 ac/rgp: add ac_msgpack.h/c
This patch adds functions to create msgpack formatted data.
For msgpack specification refer to
github.com/msgpack/msgpack/blob/master/spec.md

This patch only adds formats from msgpac specification that
are required for rgp profile data.

v2: for newly added files, change copyright year from 2020 to 2021

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:46 +00:00
Michel Zou 34d6ce28e3 util: fix gcc vsnprintf overflow
Anything higher than INT_MAX results in overflow although the parameter is declared as size_t.

Worse, with (size_t)-1 it is silently ignored and Woverflow is not emitted.

Closes #4226

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9134>
2021-02-19 11:05:38 +00:00
Danylo Piliaiev b6b3b38434 turnip: consider HW limit on number of views when apply multipos opt
Blob doesn't apply multipos optimization starting from 11 views
even on a650, however in practice, with the limit of 16 views,
tests pass on a640/a650 and fail on a630.

Fixes tests:
 dEQP-VK.multiview.draw_indexed.max_multi_view_view_count
 dEQP-VK.multiview.input_attachments.max_multi_view_view_count
 dEQP-VK.multiview.masks.max_multi_view_view_count
 dEQP-VK.multiview.multisample.max_multi_view_view_count
 dEQP-VK.multiview.queries.max_multi_view_view_count
 dEQP-VK.multiview.renderpass2.index.fragment_shader.max_multi_view_view_count
 dEQP-VK.multiview.secondary_cmd_buffer.max_multi_view_view_count

Fixes: 8d275778 ("tu: Enable multi-position output")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9135>
2021-02-19 09:16:00 +00:00
Samuel Pitoiset 88f42ea93e radv: emit the trap handler registers earlier
Directly into the GFX init IB.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Samuel Pitoiset 2c6104d3d1 radv: make the TMA/TBA BOs resident buffers
They are always used if the trap handler is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Samuel Pitoiset 918838cd24 radv: make the trace BO a resident buffer
It's always used if RADV_DEBUG=hang is set.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Samuel Pitoiset d96c0a2263 radv: make the border color BO a resident buffer
It's always used if the feature is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Michel Zou 834b69d1ef zink: fix win32 build
Fixes: 57575627, c4cc3d91

Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9126>
2021-02-19 08:49:47 +00:00
Samuel Pitoiset e3bdf815b7 radv: set correct value for OFFCHIP_BUFFERING on GFX10+
Higher values break tessellation. I was only able to reproduce this
by switching back/from AMDVLK which was really weird...

According to Marek (1c6eca23fd), it looks like it's related to
register shadowing and PAL enables it, that probably explains a bit.

Copied from PAL and RadeonSI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4207
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2498
Fixes: 74d69299d1 ("radv/gfx10: double the number of tessellation offchip buffers per SE")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9141>
2021-02-19 08:52:26 +01:00
Vinson Lee bf535c082b nv50/ir: Initialize Instruction members.
Fix defects reported by Coverity Scan.

uninit_member: Non-static class member serial is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member sched is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member bb is not initialized in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9037>
2021-02-19 04:43:58 +00:00
Mike Blumenkrantz 31dd0a4a1e zink: use vkGetFenceStatus when we're obviously checking for status
a timeout of 0 indicates that gallium wants to know whether a fence is done,
so we can use a simpler call here

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9154>
2021-02-19 04:32:25 +00:00
Mike Blumenkrantz 79861e3d88 zink: break out even more of zink_blit state saving
for reuse in upcoming clear refactoring

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9150>
2021-02-19 04:24:49 +00:00
Jonathan Marek ec54166a2b freedreno/a6xx: set SP_PERFCTR_ENABLE in computerator
Set this register to have properly working SP perfcntrs in computerator.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
2021-02-19 04:04:03 +00:00
Jonathan Marek 46f64aa3be freedreno/a6xx: update some registers
Some sorting, adding unknown fields, documenting some fields, etc.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
2021-02-19 04:04:03 +00:00
Jonathan Marek b94c652afe freedreno/a6xx: always use reg64 for address registers (no LO/HI)
Reduce noise in a6xx.xml by removing LO/HI versions of address registers.

Also fix type="address" registers in register packing (use bit size instead
of checking for "waddress" to use qword)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
2021-02-19 04:04:02 +00:00
Jonathan Marek b15d4484f8 freedreno/a6xx: update perfcntr registers (declare as arrays)
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
2021-02-19 04:04:02 +00:00
Jonathan Marek 72f00fe72e freedreno/registers: use macro instead of inline function for array regs
This is to allow use in places where an inline function isn't allowed,
such as a static initializer.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
2021-02-19 04:04:02 +00:00
Connor Abbott 79921b81bc freedreno/a6xx: Document threadsize-related fields
We'll need to use if we want to start playing around with thread sizes.
At least now we know what the actual threadsize is.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
2021-02-19 04:04:02 +00:00
Mike Blumenkrantz 1cb3015a31 zink: just end the current renderpass in zink_batch_no_rp()
since we aren't (currently) parallelizing and now have barriers, we don't need to cycle
the batch here, which lets us avoid submitting too-small command buffers

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9148>
2021-02-19 03:44:51 +00:00
Mike Blumenkrantz f3080eca75 zink: break out buffer copying into util function with batch param
if we want to explicitly specify compute batch, we need to be able
to pass that along

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9147>
2021-02-19 03:34:30 +00:00
Mike Blumenkrantz 46a04672af zink: add buffer barriers for resource_copy_region
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9147>
2021-02-19 03:34:30 +00:00
Mike Blumenkrantz 034657bf6c zink: just call context destructor on creation fail
this more reliably handles the failure case

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9149>
2021-02-19 03:24:29 +00:00
Mike Blumenkrantz 0a6b8685aa zink: fix surface creation for cube slices
if first==last layer, this should be a 2D slice of the cube

else if this isn't all the layers, this should be an array of slices

fixes a bunch of spec@arb_shader_image_size@builtin cases

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9080>
2021-02-19 03:10:17 +00:00
Dave Airlie 44f76d5fc7 lavapipe: use os_time for timing related things
drop the use of the Linux code.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
2021-02-19 02:27:15 +00:00
Dave Airlie 368c804383 lavapipe: make OPT macro MSVC compatible
This macros is ugly, make it uglier but msvc compatible.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
2021-02-19 02:27:15 +00:00
Dave Airlie 0bd707ba17 lavepipe: some misc msvc fixes
drop some headers, get rid of printflike, drop the __builtin_ffs

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
2021-02-19 02:27:15 +00:00
Dave Airlie c1e0249e90 lavapipe: use msvc compatible 0 init
trivial changes

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
2021-02-19 02:27:15 +00:00
Dave Airlie ab42e49ea7 lavapipe: fix some void ptr arithmetic
msvc disagrees with it, and they are trivial to fix.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
2021-02-19 02:27:15 +00:00
Dave Airlie f3dd9529fa lavapipe/meson: drop megadrivers build req
This just seems to be cut-n-paste, so lose it.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
2021-02-19 02:27:15 +00:00
Dave Airlie c0c03f29e0 lavapipe: implement physical device group enumeration
This was missing when I added physical device groups, and
was causing crashes on win32.

Fixes: 6af87193c ("lavapipe: add basic vulkan device group support.")
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
2021-02-19 02:27:15 +00:00
Mike Blumenkrantz 0fd58b4537 zink: be more explicit with image barriers for copy operations
we know the access and pipeline stage here, so we can pass those along
to ensure synchronization

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 466efcb247 zink: add general zink_resource_barrier() wrapper
this simplifies a bit of code where we may want to be throwing in barriers
regardless of the resource type

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 6cbd25c04b zink: zink_resource_barrier -> zink_resource_image_barrier
need this namespace

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 55a0eb6e0a zink: improve barrier usage for clear functions
ensure that we're always using the right layout for images that are
being cleared

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 77b0533d75 zink: add batch references for resources in clear functions
need to make sure we track these writes

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 7d6c90826d zink: add access info for update_descriptor image barriers
this forces resources to transition where necessary to ensure that
data from previous ops have been made available (e.g., clear -> shader image)

we also switch needs_barrier over to a more accurate signature here since we
can now do it without breaking update_descriptors()

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz ab3a2fa690 zink: add access param for image resource barriers
we need more detail on some of these to ensure proper synchronization
and availability/visibility of image data between commands/stages

the signature for needs_barrier() is still funky here to avoid breaking
usage in update_descriptors()

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 3f6d104ba8 zink: add barriers for index and draw param buffers
need to ensure synchronization here too

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 5d664166c8 zink: assert batch is not in a renderpass when emitting pipeline barrier
this is only valid for subpasses which have self-dependencies set, and we
don't currently do that

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 9df8c4ba96 zink: take struct zink_batch param instead of direct cmdbuf in barrier helpers
this is weird and prevents us from verifying batch states

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 9d3935a0b3 zink: combine resource barriers where possible during update_descriptors
if we have a resource in the same state for multiple shader stages, we can
emit a single barrier for all the stage bits instead of multiple barriers

this also helps with detecting potentially redundant barriers when we go to
emit them later on

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 4b2fb61831 zink: break out barrier transitioning in update_descriptors
this hopefully makes the code a little more readable

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 017dbd63fb zink: avoid emitting unnecessary pipeline barriers during update_descriptors
if the current state of the resource matches the desired state, we don't need
to emit anything, and we can potentially avoid ending a renderpass

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 5d7cb2495a zink: add generic wrapper for checking whether a resource needs a barrier
handy to not need to check ahead of time

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 4536607ea0 zink: use define for max descriptor array size
this was getting a bit unwieldy

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 03030f87a1 zink: add helper for image resource barriers and avoid unnecessary barriers
same as buffer barriers now

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz b00f407996 zink: add a VkPipelineStageFlags param to zink_resource_barrier()
this matches the buffer variant in its flexibility now

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 061e4e2293 zink: remove aspect param from zink_resource_barrier
we have a helper function for this now that we can reuse

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 73e84c33a2 zink: rework xfb barrier transitions when reusing as vertex inputs
if we have proper barrier usage to start with, then we don't need to do
any kind of weird flushing upon changing vertex inputs and can also remove
a flag from zink_resource

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz fb14793ebb zink: rework xfb counter resource barriers
using the new helper functions, we can now more accurately determine
exactly which barriers we need/want and avoid setting unnecessary barriers
or ending a renderpass early

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz dd858be011 zink: set buffer resource barriers for descriptor resources in update_descriptors()
need to make sure these are properly synchronized

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Mike Blumenkrantz 69304052e3 zink: add helper function for getting pipeline stage from shader stage
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
2021-02-19 02:05:13 +00:00
Alyssa Rosenzweig 10b9e3ca0a panfrost: Advertise FRAMEBUFFER_NO_ATTACHMENTS
Passes dEQP-GLES31.functional.fbo.no_attachments.*, it doesn't look like
we need to do anything special.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 91d2171902 panfrost: Comment on state of ARB_shader_clock
Pending on kernel work.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig ed29a2beb8 pan/bi: Use explicit move even for RT#0 of MRT
Otherwise we get a bad RA if RT 0 = RT 3 (for example), fixes
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_literal.fragment.sampler2d

Fixes: a6f1500bed ("pan/bi: Workaround BLEND precolour with explicit moves")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 02d68b9b83 pan/bi: Allow dynamically uniform tex indices
Passes the relevant tests of
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.*, a few
failures that seem to relate to MRT instead of this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig dfe309e707 pan/bi: Implement interpolateAtOffset
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 7ec9dc98d7 pan/bi: Add imm_f16 helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig e4ae458df8 pan/bi: Implement interpolateAtSample
Passes dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 1f265ef6c1 pan/bi: Preload sample ID for sample shading
Used in the LD_VAR_IMM. Wondering if preload requirements shouldn't
instead be pushed from the compiler based on actual usage instead of
guessing from the NIR...

Fixes dEQP-GLES31.functional.shaders.multisample_interpolation.sample_qualifier.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 96ea2c3e9d pan/bi: Elucidate slot 6/7 operation
Used to order fragments. With that clarified it's clear that we need to
wait on slot 7 for LD_TILE too (outside the limited context of a blend
shader).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 7f2d618867 pan/bi: Flesh out LD_TILE emit
Needs to support non-blend shader operation (conversion descriptor
sourced from a sysval), as well as MRT. Fixes fbfetch on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig cff5c40fc3 pan/bi: Fix blend shaders using LD_TILE with MRT
Don't hardcode the RT to 0. Affects ES3.0 which already exposes MRT --
despite no dEQP coverage of this particular corner case, apps could hit
this in the wild on 21.0. Fixes

dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_blend_func_buffer_blend_func

Fixes: c7e1ef7c0c ("panfrost: Advertise ES3.0 on Bifrost")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 9151329fd2 pan/bi: Implement shader_clock intrinsic
Trivial.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 8081811f2e pan/bi: Implement image_atomic_comp_swap
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 078a84f474 pan/bi: Implement image_atomic_exchange
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Icecream95 afe4f0e6b1 pan/bi: nir_intrinsic_image_size support
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Icecream95 075d9a1084 pan/bi: Implement image load/store
v2 (Alyssa): Split out functions, support 3D/array

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 1c495323ce pan/bi: Materialize *DTSEL_IMM in the scheduler
We want to be able to set a descriptor table and have the instruction
pair "magically" come to be. To do so, we adjust the definition of
DTSEL_IMM (deviating a bit from the architectural definition but in
practice simplifying disassembly immensely) and add a scheduler
lowering. This ensures DTSEL is always paired correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Icecream95 71f849a292 pan/bi: Remove check for first_ubo_is_default_ubo
It won't be set for OpenCL.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig cd21f0e1c5 pan/bi: Handle computational atomics
All the same formula: calculate an address, emit a pseudoinstruction for
the atomic, emit a postprocess that can be DCE'd if not needed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 8358321801 pan/bi: Add ATOM_C1 promotion check
Optimizes atomic counters.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig b9d277f644 pan/bi: Extract bi_atom_opc from NIR intrinsic
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig f1adbd5d33 pan/bi: Lower atomic pseudo-instructions
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig c51c3a8fe3 pan/bi: Add 32-bit atomic pseudoinstruction
To enable scheduler lowering to an ATOM_CX pair.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig a687d11093 pan/bi: Add SEG_ADD.i64 pseudoinstruction
Expands to a pair *SEG_ADD/+SEG_ADD, which is used for lowering shared
atomics.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig d31df8416b pan/bi: Allow @rNULL with tied operands
Will enable DCE of atomics.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 111255512a pan/bi: Don't read alpha out of bounds
RT#0 may not have alpha, do something safe instead of risking issues
with RA later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 68539ba5eb pan/bi: Fix LD_GCLK staging count
64-bit result

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 5f84568a71 pan/bi: Don't inline 64-bit constants
Will drop the upper bits incorrectly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 69f11f9e26 pan/bi: Fix RA of node 0 again
Botched rebase.

Fixes: c578ca7393 ("pan/bi: Add interference per clause")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 88ede65be8 panfrost: Remove useless check
Already checked in format_supported (only difference being cube map
arrays but the extension isn't advertised yet anyway due to missing
geometry shaders.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 2be7c89d48 panfrost: Set border colour on Bifrost sampler
Passes dEQP-GLES31.functional.texture.border_clamp.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig fa251afb82 panfrost: Take panfrost_dev for AFBC selection
This appears to be architecture dependent.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 6a5052d836 panfrost: Spell fix
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 50f32bb6e2 panfrost: Fix NULL deref for an empty frag shader
Fixes debug builds of dEQP-GLES31.functional.stencil_texturing.render.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig fa9046b262 panfrost: Add RT conversion sysval
Contains the InternalConversionDescriptor corresponding to the selected
render target, ready to be fed into LD_TILE.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 7dc60fc3c8 panfrost: Export bifrost_get_blend_desc with type size
Will be used to lower EXT_shader_framebuffer_fetch on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 9d2b2e3c67 panfrost: Flesh out allow_forward_pixel_to_kill check
A few cases missed, probably some more bugs hidden here!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 2e83481a1a panfrost: Handle PIPE_FORMAT_NONE as 'constant'
We can use the constant format anywhere safely as a 0-component format,
which will map fine for PIPE_FORMAT_NONE. Used so
ARB_framebuffer_no_attachments can probe.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig b3e3daa603 panfrost: Flesh out pixel kill / zs update
Add some notes on what the useful combinations do and flesh out the
logic. Fixes fails in
dEQP-GLES31.functional.image_load_store.early_fragment_tests.*

It's still not entirely clear to me what the difference between "force
early" and "weak early" is from the driver's perspective, though I
suspect there are performance implications to getting it wrong. Follow
what the blob does in case of doubt..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig a25b9cd8d0 panfrost: Track coverage, early fragment tests
These extra pieces of data are needed to correctly compute pixel kill /
zs update settings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig 3399673ba4 panfrost: Label groups in GenXML
Helps debug pandecode issues.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig ba3ad38260 pan/decode: Disambiguate border colours
Can be small ints that will just be 0.0 if interpreted as float.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:22 +00:00
Alyssa Rosenzweig bc494b30b7 pan/decode: Pretty print 22-bit pixel formats
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:21 +00:00
Alyssa Rosenzweig 61584bb4e8 pan/decode: Fix tiler printing on Bifrost
Fixes: 9d682ad7f9 ("pan/decode: Only print local storage for vertex jobs")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:21 +00:00
Alyssa Rosenzweig 9dd9e0200d pan/bi: Implement barriers
Only control barriers are meaningful upon a closer read.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:21 +00:00
Alyssa Rosenzweig 60bee70103 pan/bi: Stub scoreboarding
This is not a real implementation. But I'm working on barriers right
now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
2021-02-18 21:48:21 +00:00
Jesse Natalie 5b0a10823b microsoft/clc: Use driver_location for metadata instead of re-computing offsets
Fixes: ff05da7f ("microsoft: Add CLC frontend and kernel/compute support to DXIL converter")
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9138>
2021-02-18 21:33:54 +00:00
Jesse Natalie 3ee8f2ccba microsoft/clc: Move inline samplers to the end of the variable list
Since inline samplers are uniforms, just like kernel args, and
nir_lower_vars_to_explicit_types will assign driver_location based
on order in the variable list, move the inline samplers to the end
of the list to prevent them from creating gaps in the kernel arg
offsets.

Fixes: ff05da7f ("microsoft: Add CLC frontend and kernel/compute support to DXIL converter")
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9138>
2021-02-18 21:33:54 +00:00
Jesse Natalie d773257012 microsoft/clc: Fix wrap modes for inline samplers for integer textures
Fixes: ff05da7f ("microsoft: Add CLC frontend and kernel/compute support to DXIL converter")
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9138>
2021-02-18 21:33:54 +00:00
Jesse Natalie 9da8179a1e microsoft/clc: Let lower_vars_to_explicit_types fill kernel input driver_location
Importantly, also run that before mucking with the variable list via image lowering,
which removes and inserts variables, making the driver_location no longer line up
with metadata.

Fixes: ff05da7f ("microsoft: Add CLC frontend and kernel/compute support to DXIL converter")
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9138>
2021-02-18 21:33:54 +00:00
Jason Ekstrand 7c8c14a988 intel/mi_builder: Add tests for gen_mi_z and gen_mi_nz
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand 9145d77707 intel/mi_builder: Rewrite unit tests in terms of constant folding
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00