turnip was playing fast and loose with the name, using the R8_G8B8 format
name but actually setting the descriptors up to read G8_B8R8 like Vulkan
(sensibly) wants. This caused trouble when trying to make freedreno and
turnip share code. By having both orderings as format names, we can share
the descriptor code and also confuse readers less.
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
The only user, turnip, was actually treating it as this layout, matching
vulkan's specification of how the planes map to RGB values. (Y=G means
that Cb=B and Cr=R).
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
We can see from the dynamically_uniform (compiler doesn't know if you're
uniform or not) vs uniform (compiler can see it's uniform) case in the
blob which is which. Now that we have the right names, also use the
nonunif flag for encoding the actual non-uniform mode (previously, we were
always setting it always in a way that meant uniform).
I verified this behavior back to a418 with samplers. The a3xx blob I have
only does GLES3, so we don't have the opaque_type_indexing tests to see.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13601>
We have to mark the root as non-spillable in case the interval is the
child of some other interval, but we can't know whether it's the child
of some other interval until it's been inserted. Move the setting of
cant_spill below the insertion. This prevents us from using a bogus
parent value.
Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13650>
This should be exactly equivalent code, except for the is_3d "level <= 1"
which doesn't bring over 6c19d37331 ("freedreno/a6xx: fix 3d tex
layout") due to it failing our unit tests where we compare to the blob's
behavior. The layer_stride setup is pulling in what freedreno_resource.c
was doing after the layout setup, so we match fd6 and so that it could
potentially be checked in unit testing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
We have to set 8c01 to say "leave these channels alone" when
clearing/storing just Z or S of z24s8. Fixes the bypass path for
KHR-GLES3.packed_depth_stencil.verify_read_pixels.depth24_stencil8.
Cc: mesa-stable
Fixes: #5592
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13659>
According to Jonathan Marek:
Only one immediate can be decoded in a cat2 instruction (if both srcs
are immediates, they will use the value of the either the first or
second one, I don't remember which) - using 2 immediates in a cat2
instruction is only "correct" if they are both equal.
The (i,j) in the second src of flat.b is not unused, but behaves as 0
for any (small) integer because it is a float src. The hack I
suggested is to set the second src equal to (immediate) first src,
which seems to work.
This allows us to remove a couple of mov instructions or a bit of extra
constfile usage.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13558>
The gmem store stores both depth and stencil for z24s8. So, if we're
doing a write (clear or draw) to one or the other of the channels, we need
the other one restored as well.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13649>
Collabora has added 7 new lazor Chromebooks which have Adreno 618 GPUs.
Run half of the test suite (plus variants) in pre-merge.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13441>
It seems that the cpufreq support in a530 is not rock solid yet, as the
device intermittently reboots during the boot process.
Passing `maxcpus=2` to the kernel avoids this issue.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13089>
We can't rely on regid to be unique, shaders can have multiple varyings
with the same output value. Normally shader linking deduplicates these,
but we still need to handle the case for xfb. So use slot instead as
the unique identifier.
Fixes KHR-GLES31.core.gpu_shader5.fma_precision_*
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13605>
When looking at the output of some CTS tests, I realized that the
barriers vtn currently inserts to emulate coherent memory accesses
were being turned into fences, even though we never needed to do
anything special for coherent accesses before so presumably accesses are
already cache-coherent by default. Ignore make_visible/make_available
semantics to get us back to parity with the old path.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13599>
This fixes flakes in dEQP-VK.pipeline.stencil.nocolor.format.* when run
after ycbcr tests. Apparently LRZ needs to know if there's a media
format enabled even if there are no color attachments, so we need to
write something here. Presumably any "normal" format would work but 0
seems like a good neutral choice.
Fixes: 9c895e13 ("tu: Emit GRAS_LRZ_MRT_BUF_INFO_0")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13578>
The test names are definitely unique (deqp has specific prefixes, piglit
uses '@' as a separator instead of '.'), so we can just have a single file
regardless of test type. Merges the two groups of xfails together so you
can't mix up which file to edit (I certainly have), and so that we don't
need to introduce yet another set of files when we add gtest for libva.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13517>
We have two testsuites with the same format for fails/flakes/skips files,
and test names that are definitely unique. As I'm about to add a third
testsuite (gtest for libva-utils), so let's have just one file each for
fails/flakes/skips instead of one per type of testsuite. This starts the
move with just the bulk rename of deqp.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13517>
This is the default version in gentoo, and it apparently uses the lua54
variant rather than lua.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13510>
Specifically this enables these VK_FORMAT_FEATURE bits:
VK_FORMAT_FEATURE_TRANSFER_SRC_BIT
VK_FORMAT_FEATURE_TRANSFER_DST_BIT
VK_FORMAT_FEATURE_SAMPLED_IMAGE_YCBCR_CONVERSION_LINEAR_FILTER_BIT
VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_MINMAX_BIT
VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT
VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT
VK_FORMAT_FEATURE_MIDPOINT_CHROMA_SAMPLES_BIT
VK_FORMAT_FEATURE_COSITED_CHROMA_SAMPLES_BIT
Fixes the following tests:
dEQP-VK.api.info.format_properties.g8_b8_r8_3plane_420_unorm
dEQP-VK.api.info.format_properties.g8_b8r8_2plane_420_unorm
dEQP-VK.api.info.image_format_properties.2d.optimal.g8_b8_r8_3plane_420_unorm
dEQP-VK.api.info.image_format_properties.2d.optimal.g8_b8r8_2plane_420_unorm
Additionally allows 339 tests in dEQP-VK.ycbcr.* to go from Skip to
Pass.
[ Connor: Fake support for 3-plane formats, fixup modifiers path ]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
The blob seems to always emit this, even though it seems to only be used
when rendering to the special planar formats (which we only do in the
blit path). Based on the LRZ prefix it might used in other cases though.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
It's not actually used for 2d blits, it's supposed to mirror
RB_MRT_BUF_INFO[0].COLOR_FORMAT and seems to be used only when rendering
to the special planar formats, although the blob name seems to suggest
it's connected to LRZ.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
Needed by the next patch, which starts treating bools as 16bit exposing
a bug that was previously accidentially hidden for instructions like
ELECT_MACRO. Needed for next patch.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
We want these functions to take a Vulkan format and return a
pipe_format, but tu6_plane_format() was getting redundantly called on
the result of copy_format() and copy_format() was also getting called
twice with image to image copies. Pull these functions further up the
call chain so that they're only called once.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13379>
This is prettier in the log files, less shell code, and for non-suite mode
adds checking that the driver has the right git sha1. Also, no need for
suites to have a DEQP_VER to say which dEQP we should run for the renderer
check.
The version checks can help us make sure that GL version exposed doesn't
accidentally regress, and the ".*git" checks that we're using a git
version of Mesa rather than something that snuck in through distro
packages.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13372>
We can use the general "how parallel should we go on this runner?" env var
and save a bunch of massaging env var names. Fixes how PIGLIT_PARALLEL
looked like it was useful but actually wasn't passed through to HW
runners.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13372>
When we have a series of loads/stores we were creating a constant for
each one, which isn't great. Furthermore, because the nir pass puts the
offset constant at the top of the shader, it resulted in extra register
pressure and spilling when that happened inside a loop. Fix this by
using the base/offset form of stp and ldp.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13307>
This will help us create staging resources with a Y8 format and avoids
calling into the Vulkan-level entrypoints which will have to be changed
to use vk_image and vk_image_view.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13359>
This is mostly based on tu_image_view. The notable difference is that we
don't handle choosing the correct plane out of multiple planes when
indicated by the aspect, which means that there is no equivalent of
VK_IMAGE_ASPECT_PLANE_1 etc. This is expected to be done in the driver,
and note that freedreno gallium handles this very differently anyway.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13359>
The burden was put on the caller, which caused:
- Reading of tess levels back in TCS not accounting for component
- Reading patch outputs in TES account for component twice
Fixes vkd3d tests:
- test_tessellation_read_tesslevel
- test_tessellation_primitive_id
- test_line_tessellation_dxbc
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13338>
By default line mode is VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT,
when lineRasterizationMode is VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT
and primtype is line - we enable bresenham line mode.
We have to disable MSAA when bresenham lines are used, this is
a hardware limitation and spec allows it:
"When Bresenham lines are being rasterized, sample locations may
all be treated as being at the pixel center (this may affect
attribute and depth interpolation)."
This forces us to re-emit msaa state when line mode is changed.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6020>
This bit seems like the control for line mode of rastrization.
That can be simply figured out by comparing
dEQP-VK.rasterization.primitives.no_stipple.bresenham_lines,
dEQP-VK.rasterization.primitives.no_stipple.rectangular_lines and
dEQP-VK.rasterization.primitives.no_stipple.lines.
For opengl, the value of bresenham lines mode, which is 0, is set
by default and the value of rectangular mode, which is 0x1, is set
when multi-sampled.
For vulkan, the bresenham lines are enabled when lineRasterizationMode is
VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT, which sets the bit to 0, while
the value is 1 when it's VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT,
that seems to be default.
If both multi-sampled and bresenham-lines are used when primitive type is
line, the bit is to be set as 0 and makes msaa disabled.
Note that this is only tested on a6xx, but I guess it's likely the same
for a5xx.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6020>
We were treating them the same as regular cat2/cat3/cat4 immediates, but
that's not right because cat6 sources are only 8 bits.
Our bindless code was handling this before for bindless resources, and
it was disabled for most other things, so this was mostly harmless, but
fixing it will be necessary for handling ldc offsets.
In addition enable tests for this that were just commented out, and add
a custom test making sure that the immediate source is treated as
unsigned.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13142>
Otherwise, when there are uses in multiple blocks the collect may not
dominate some of the uses.
This is a bugfix, but before it would've mattered only in weird
scenarios with interpolateAt*. When we start moving prefetch textures
into the block before the preamble it will start to matter more, because
it will need to read the barycentrics from a different block than the
bary.f instructions.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13142>
There's no reason to make this any different from the other builders,
since it just creates a collect instruction, and in the next commit
we'll need to create a collect in the first block for prefetch textures.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13142>
Fix a build error.
In file included from ../src/util/u_queue.h:38,
from ../src/freedreno/drm/freedreno_ringbuffer.h:33,
from ../src/freedreno/ds/fd_pps_driver.h:13,
from ../src/freedreno/ds/fd_pps_driver.cc:7:
../src/util/simple_mtx.h:35:12: fatal error: valgrind.h: No such file or directory
35 | # include <valgrind.h>
| ^~~~~~~~~~~~
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13280>
Let's assume we have a vec2 collect instruction with killed sources that
are non-contiguous and the entire rest of the register file is blocked,
which can happen when our register target is very tight. It's impossible
to just insert move instructions to resolve this, but we can make space
by swapping one of the killed sources with the value next to the other,
assuming it's also scalar.
This commit implements that idea, preventing us from falling back to the
terrible shuffle-everything approach in this case.
total instructions in shared programs: 1566648 -> 1565117 (-0.10%)
instructions in affected programs: 13332 -> 11801 (-11.48%)
helped: 30
HURT: 5
helped stats (abs) min: 6 max: 535 x̄: 51.77 x̃: 25
helped stats (rel) min: 2.67% max: 33.63% x̄: 12.28% x̃: 9.58%
HURT stats (abs) min: 1 max: 6 x̄: 4.40 x̃: 6
HURT stats (rel) min: 0.18% max: 5.13% x̄: 2.41% x̃: 2.13%
95% mean confidence interval for instructions value: -75.05 -12.43
95% mean confidence interval for instructions %-change: -13.18% -7.18%
Instructions are helped.
total mov in shared programs: 77336 -> 76683 (-0.84%)
mov in affected programs: 2135 -> 1482 (-30.59%)
helped: 29
HURT: 5
helped stats (abs) min: 2 max: 227 x̄: 23.31 x̃: 10
helped stats (rel) min: 6.06% max: 72.73% x̄: 31.83% x̃: 30.00%
HURT stats (abs) min: 2 max: 9 x̄: 4.60 x̃: 4
HURT stats (rel) min: 14.29% max: 69.23% x̄: 34.00% x̃: 27.78%
95% mean confidence interval for mov value: -33.21 -5.20
95% mean confidence interval for mov %-change: -32.94% -11.35%
Mov are helped.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13143>
We need the local size in RA for occupancy calculations. Not
initializing these had the unfortunate consequence of
ir3_get_reg_independent_max_waves() returning 0 for compute shaders with
shared variables, disabling the register limiting logic.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13143>
This is mostly a matter of auditing uses of
cmd->state.framebuffer and replacing every use of fb->attachments with
cmd->state.attachments. We already weren't using the attachments
anywhere outside of the render pass, so this is pretty straightforward.
We also don't have any use for anything in
VkFramebufferAttachmentImageInfo so we can just ignore it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13228>
Dropping the final pipe ref could in turn drop the final ref to one
of a couple other bo's, which in turn could indirectly recurse back
into cleanup_fences() on the same bo, resulting in a double decrement
of bo->nr_fences and underflow to a large positive #. This happens
because free'ing a bo back to the bo cache periodically calls
fd_bo_cache_cleanup() and any bo's that have not been re-used can
be really free'd, which in turn calls cleanup_fences().
Fixes: 7dabd62464 ("freedreno/drm: Userspace fences")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13263>
Now that all spirv_to_nir() users take care of converting sysvals to
varyings, we can unconditionally declare FragCoord as a sysval.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13017>
This is an attempt at simplifying the spirv_to_nir() backend when it
comes to choosing between system values and input varyings. Let's patch
drivers to do the sysval to input varying conversion on their own so we
can get rid of the frag_coord_is_varying field in spirv_to_nir_options
and unconditionally create create sysvals for FragCoord, FrontFacing and
PointCoord inputs instead of adding new xxx_is_{sysval,varying} flags.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13017>
IBO/SSBO may have dynamic index, previously we just silently ignored
this fact. However resinfo supports different modes.
Fixes vkd3d test "test_null_uav"
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13224>
We do support non-zero nir_intrinsic_component for
nir_intrinsic_store_output in tess shaders.
Fixes vkd3d test "test_hull_shader_fork_phase_dxbc"
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13196>
these were duplicated all over the place, and it's annoying to have to keep
duplicating them any time a new component includes the vulkan header
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13141>
Connor Abbott
Hyunjun Ko
Christian Gmeiner
Emma Anholt
Matt Turner
Danylo Piliaiev
Tomeu Vizoso
Guilherme Gallo
Rob Clark
Jason Ekstrand
Ilia Mirkin
Jonathan Marek
Rob Clark
Vinson Lee
Boris Brezillon
Mike Blumenkrantz