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ir3: Add support for (dis)assembling flat.b 

flat.b is a variant of the bary.f instruction that does not perform
interpolation of the varying input.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13558>
This commit is contained in:
Matt Turner 2021-04-13 19:36:33 +00:00 committed by Marge Bot
parent 417477f60e
commit a150e31910
6 changed files with 32 additions and 8 deletions
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3
src/freedreno/ir3/disasm-a3xx.c
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@ -146,9 +146,6 @@ print_stats(struct disasm_ctx *ctx)
ctx->stats->sy);
}
/* size of largest OPC field of all the instruction categories: */
#define NOPC_BITS 6
static const struct opc_info {
const char *name;
} opcs[1 << (3 + NOPC_BITS)] = {

3
src/freedreno/ir3/instr-a3xx.h
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@ -51,7 +51,7 @@ void ir3_assert_handler(const char *expr, const char *file, int line,
} \
} while (0)
/* size of largest OPC field of all the instruction categories: */
#define NOPC_BITS 6
#define NOPC_BITS 7
#define _OPC(cat, opc) (((cat) << NOPC_BITS) | opc)
@ -178,6 +178,7 @@ typedef enum {
OPC_CBITS_B = _OPC(2, 61),
OPC_SHB = _OPC(2, 62),
OPC_MSAD = _OPC(2, 63),
OPC_FLAT_B = _OPC(2, 64),
/* category 3: */
OPC_MAD_U16 = _OPC(3, 0),

1
src/freedreno/ir3/ir3_lexer.l
View File

@ -228,6 +228,7 @@ static int parse_w(const char *str)
"shr.b" return TOKEN(T_OP_SHR_B);
"ashr.b" return TOKEN(T_OP_ASHR_B);
"bary.f" return TOKEN(T_OP_BARY_F);
"flat.b" return TOKEN(T_OP_FLAT_B);
"mgen.b" return TOKEN(T_OP_MGEN_B);
"getbit.b" return TOKEN(T_OP_GETBIT_B);
"setrm" return TOKEN(T_OP_SETRM);

2
src/freedreno/ir3/ir3_parser.y
View File

@ -458,6 +458,7 @@ static void print_token(FILE *file, int type, YYSTYPE value)
%token <tok> T_OP_SHR_B
%token <tok> T_OP_ASHR_B
%token <tok> T_OP_BARY_F
%token <tok> T_OP_FLAT_B
%token <tok> T_OP_MGEN_B
%token <tok> T_OP_GETBIT_B
%token <tok> T_OP_SETRM
@ -893,6 +894,7 @@ cat2_opc_2src: T_OP_ADD_F { new_instr(OPC_ADD_F); }
| T_OP_SHR_B { new_instr(OPC_SHR_B); }
| T_OP_ASHR_B { new_instr(OPC_ASHR_B); }
| T_OP_BARY_F { new_instr(OPC_BARY_F); }
| T_OP_FLAT_B { new_instr(OPC_FLAT_B); }
| T_OP_MGEN_B { new_instr(OPC_MGEN_B); }
| T_OP_GETBIT_B { new_instr(OPC_GETBIT_B); }
| T_OP_SHB { new_instr(OPC_SHB); }

1
src/freedreno/ir3/tests/disasm.c
View File

@ -103,6 +103,7 @@ static const struct test {
INSTR_6XX(40104002_0c210001, "add.f hr0.z, r0.y, c<a0.x + 33>"),
INSTR_6XX(40b80804_10408004, "(nop3) cmps.f.lt r1.x, (abs)r1.x, c16.x"),
INSTR_6XX(47308a02_00002000, "(rpt2)bary.f (ei)r0.z, (r)0, r0.x"),
INSTR_6XX(47348000_00002000, "flat.b (ei)r0.x, 0, r0.x"),
INSTR_6XX(43480801_00008001, "(nop3) absneg.s hr0.y, (abs)hr0.y"),
INSTR_6XX(50600004_2c010004, "(sy)mul.f hr1.x, hr1.x, h(0.5)"),
INSTR_6XX(42280807_27ff0000, "(nop3) add.s hr1.w, hr0.x, h(-1)"),

30
src/freedreno/isa/ir3-cat2.xml
View File

@ -157,6 +157,32 @@ SOFTWARE.
</bitset>
<bitset name="#instruction-cat2-2src-input" extends="#instruction-cat2">
<display>
{SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2}
</display>
<field name="SRC1" low="0" high="15" type="#multisrc">
<param name="SRC1_R" as="SRC_R"/>
<param name="FULL"/>
</field>
<field name="SRC2" low="16" high="31" type="#multisrc">
<param name="SRC2_R" as="SRC_R"/>
<param name="FULL"/>
</field>
<pattern low="48" high="49">xx</pattern> <!-- COND -->
<pattern low="53" high="58">111001</pattern>
</bitset>
<bitset name="bary.f" extends="#instruction-cat2-2src-input">
<pattern pos="50">0</pattern>
</bitset>
<bitset name="flat.b" extends="#instruction-cat2-2src-input">
<pattern pos="50">1</pattern>
<gen min="600"/>
</bitset>
<bitset name="add.f" extends="#instruction-cat2-2src">
<pattern low="53" high="58">000000</pattern>
</bitset>
@ -313,10 +339,6 @@ SOFTWARE.
<pattern low="53" high="58">111000</pattern>
</bitset>
<bitset name="bary.f" extends="#instruction-cat2-2src">
<pattern low="53" high="58">111001</pattern>
</bitset>
<bitset name="mgen.b" extends="#instruction-cat2-2src">
<pattern low="53" high="58">111010</pattern>
</bitset>