freedreno/isa: Add immed reg accessors

This way we can assert that a src that we expect to be an immediate
actually is.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
This commit is contained in:
Rob Clark 2021-10-13 15:53:55 -07:00 committed by Marge Bot
parent e08d152d68
commit 0480595d03
5 changed files with 36 additions and 22 deletions

View File

@ -145,6 +145,20 @@ extract_ABSNEG(struct ir3_register *reg)
}
}
static inline int32_t
extract_reg_iim(struct ir3_register *reg)
{
assert(reg->flags & IR3_REG_IMMED);
return reg->iim_val;
}
static inline uint32_t
extract_reg_uim(struct ir3_register *reg)
{
assert(reg->flags & IR3_REG_IMMED);
return reg->uim_val;
}
/**
* This is a bit messy, to deal with the fact that the optional "s2en"
* src is the first src, shifting everything else up by one.

View File

@ -207,7 +207,7 @@ SOFTWARE.
<field name="IMMED" low="0" high="31" type="uint"/>
<encode type="struct ir3_register *">
<map name="IMMED">src->uim_val</map>
<map name="IMMED">extract_reg_uim(src)</map>
</encode>
</bitset>

View File

@ -69,7 +69,7 @@ SOFTWARE.
<encode>
<map name="CONST">src->num >> 2</map>
<map name="SWIZ">src->num &amp; 0x3</map>
<map name="IMMED">src->uim_val</map>
<map name="IMMED">extract_reg_uim(src)</map>
</encode>
</bitset>

View File

@ -66,8 +66,8 @@ SOFTWARE.
<pattern pos="22" >0</pattern> <!-- Imm offset ldg form -->
<encode>
<map name="OFF">src->srcs[1]->iim_val</map>
<map name="SIZE">src->srcs[2]->uim_val</map>
<map name="OFF">extract_reg_iim(src->srcs[1])</map>
<map name="SIZE">extract_reg_uim(src->srcs[2])</map>
</encode>
</bitset>
@ -101,9 +101,9 @@ SOFTWARE.
<encode>
<map name="SRC2">src->srcs[1]</map>
<map name="SRC2_ADD_DWORD_SHIFT">src->srcs[2]->uim_val</map>
<map name="OFF">src->srcs[3]->uim_val</map>
<map name="SIZE">src->srcs[4]->uim_val</map>
<map name="SRC2_ADD_DWORD_SHIFT">extract_reg_uim(src->srcs[2])</map>
<map name="OFF">extract_reg_uim(src->srcs[3])</map>
<map name="SIZE">extract_reg_uim(src->srcs[4])</map>
</encode>
</bitset>
@ -141,10 +141,10 @@ SOFTWARE.
<pattern pos="52" >0</pattern> <!-- Imm offset stg form -->
<encode>
<map name="OFF_LO">src->srcs[1]->iim_val &amp; 0xff</map>
<map name="OFF_HI">src->srcs[1]->iim_val >> 8</map>
<map name="OFF_LO">extract_reg_iim(src->srcs[1]) &amp; 0xff</map>
<map name="OFF_HI">extract_reg_iim(src->srcs[1]) >> 8</map>
<map name="SRC3">src->srcs[2]</map>
<map name="SIZE">src->srcs[3]->uim_val</map>
<map name="SIZE">extract_reg_uim(src->srcs[3])</map>
</encode>
</bitset>
@ -178,10 +178,10 @@ SOFTWARE.
<encode>
<map name="SRC2">src->srcs[1]</map>
<map name="SRC2_ADD_DWORD_SHIFT">src->srcs[2]->uim_val</map>
<map name="OFF">src->srcs[3]->uim_val</map>
<map name="SRC2_ADD_DWORD_SHIFT">extract_reg_uim(src->srcs[2])</map>
<map name="OFF">extract_reg_uim(src->srcs[3])</map>
<map name="SRC3">src->srcs[4]</map>
<map name="SIZE">src->srcs[5]->uim_val</map>
<map name="SIZE">extract_reg_uim(src->srcs[5])</map>
</encode>
</bitset>
@ -196,9 +196,9 @@ SOFTWARE.
<pattern low="40" high="48">xxxxxxxxx</pattern>
<pattern low="52" high="53">xx</pattern>
<encode>
<map name="OFF">src->srcs[1]->uim_val</map>
<map name="OFF">extract_reg_uim(src->srcs[1])</map>
<map name="SRC">src->srcs[0]</map>
<map name="SIZE">src->srcs[2]->uim_val</map>
<map name="SIZE">extract_reg_uim(src->srcs[2])</map>
</encode>
</bitset>
@ -249,8 +249,8 @@ SOFTWARE.
<pattern low="52" high="53">xx</pattern>
<pattern low="54" high="58">11111</pattern> <!-- OPC -->
<encode>
<map name="SIZE">src->srcs[1]->uim_val</map>
<map name="OFF">src->srcs[0]->uim_val</map>
<map name="SIZE">extract_reg_uim(src->srcs[1])</map>
<map name="OFF">extract_reg_uim(src->srcs[0])</map>
</encode>
</bitset>
@ -278,7 +278,7 @@ SOFTWARE.
<map name="OFF_LO">src->cat6.dst_offset &amp; 0xff</map>
<map name="SRC">src->srcs[1]</map>
<map name="DST">src->srcs[0]</map>"
<map name="SIZE">src->srcs[2]->uim_val</map>
<map name="SIZE">extract_reg_uim(src->srcs[2])</map>
</encode>
</bitset>
@ -343,7 +343,7 @@ SOFTWARE.
<pattern low="52" high="53">xx</pattern>
<pattern low="54" high="58">11100</pattern> <!-- OPC -->
<encode>
<map name="DST">src->srcs[0]->uim_val</map>
<map name="DST">extract_reg_uim(src->srcs[0])</map>
<map name="SRC">src->srcs[1]</map>
</encode>
</bitset>
@ -902,7 +902,7 @@ SOFTWARE.
<encode type="struct ir3_register *">
<map name="GPR">src->num >> 2</map>
<map name="SWIZ">src->num &amp; 0x3</map>
<map name="IMMED">src->iim_val</map>
<map name="IMMED">extract_reg_iim(src)</map>
</encode>
</bitset>

View File

@ -149,7 +149,7 @@ SOFTWARE.
<pattern low="11" high="13">100</pattern>
<field name="ABSNEG" low="14" high="15" type="#absneg"/>
<encode>
<map name="IMMED">src->iim_val</map>
<map name="IMMED">extract_reg_iim(src)</map>
</encode>
</bitset>
@ -175,7 +175,7 @@ SOFTWARE.
<pattern low="11" high="13">101</pattern>
<field name="ABSNEG" low="14" high="15" type="#absneg"/>
<encode>
<map name="IMMED">src->uim_val</map>
<map name="IMMED">extract_reg_uim(src)</map>
</encode>
</bitset>