Commit Graph

157364 Commits

Author SHA1 Message Date
Jordan Justen 398a9be94b intel/dev: Enable remaining DG2 and ATS-M device IDs
Mostly Matt Roper's kernel patch commit message:

The device IDs here are associated with DG2 add-in cards. We need to
wait for some additional functionality (e.g., small BAR recovery) to
land before we're ready to upstream these.

Ref: https://patchwork.freedesktop.org/patch/483381/?series=103098&rev=1
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12706>
2022-07-27 00:29:18 +00:00
Iago Toral Quiroga 903a75245b v3dv: only check binning sync for semaphores for the first CL job
Semaphore waits in a command buffer only affect the first jobs we execute
in each hardware queue since jobs in the same queue are serialized against
each other. Binning syncs in particular, only affect CL jobs.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17594>
2022-07-27 00:00:54 +00:00
Iago Toral Quiroga 2ca4a51679 v3d,v3dv: add a common v3d_hw_prim_type helper
We had this replicated in both drivers.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17594>
2022-07-27 00:00:54 +00:00
Iago Toral Quiroga e812cbe847 v3dv: remove unnecesary FIXME comment
We only want to cleant BCL barrier flags if we consume a BCL barrier.
For example, if the client records a barrier for an index buffer
it should apply to the next draw call that uses an index buffer
which may not be the current draw call but one coming after it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17594>
2022-07-27 00:00:54 +00:00
Mike Blumenkrantz 4cfa777e39 zink: enable unordered blit/resolve ops
can't do swapchain or u_blitter ops, but these should be fine

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz 731d7be375 zink: make get_cmdbuf() public
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz ca03e35821 zink: expand unordered_exec
track read+write

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz b1781ec9ab zink: move buffer/image functions down in file
no functional changes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz 84b8242262 zink: promote image/buffer copy operations to unordered
if the src and dst for these operations can both be promoted, then the
entire operation can be promoted to potentially avoid splitting renderpasses

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz a8c368b0dc zink: add a second resource param to get_cmdbuf() for unordered promotion
no functional changes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz d9276ca6d0 zink: rework unordered_exec handling
previously this would opportunistically promote barriers to the unordered
cmdbuf only if a renderpass was active or there was no access, which
was the wrong approach

instead, opportunistically promote barriers to the unordered cmdbuf
any time it's possible to do so, which is when one of these conditions is true:
* when there is no access to the resource on the current cmdbuf
* when the only access to the resource is in the unordered cmdbuf

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz f0f0611f40 zink: explicitly unset unordered_exec when resource can't be unordered
ensure that subsequent commands can't be promoted

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz e5c4c33fa6 zink: zink_resource::unordered_barrier -> unordered_exec
this is a bit more clear

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz a41ea582c4 zink: add ZINK_DEBUG=noreorder
this will be useful for debugging

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz 49688e6b8c zink: add doc for ZINK_DEBUG=compact
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz f42212983c zink: convert ZINK_DEBUG to enum
more readable/debuggable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Mike Blumenkrantz 4a3cea6730 zink: stop ORing unordered barrier access
this doesn't make any sense and is confusing

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17667>
2022-07-26 21:34:59 +00:00
Jordan Justen 2863e720f0 intel/dev: Determine the amount of free vram using small BAR uapi
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16739>
2022-07-26 20:34:02 +00:00
Jordan Justen acc6457ff4 intel/dev: Use i915 region probed_cpu_visible_size when non-zero
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16739>
2022-07-26 20:34:02 +00:00
Jordan Justen ab4939dfff iris/bufmgr: Add I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS for vram mappable buffers
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16739>
2022-07-26 20:34:02 +00:00
Lionel Landwerlin fae88d8791 anv: make use of the new smallbar uAPI
Instead of having 2 VkMemoryType pointing to the same VkMemoryHeap, we
have each VkMemoryType with VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT (one
host visible, the other not) point to its own VkMemoryHeap. For the
local heap that is host visible, we'll use the
I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS flag at GEM BO creation.

When the smallbar uAPI is not available we fallback to a single heap
and do not use I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS.

v2: Handle probed_cpu_visible_size == probed_size (Matthew)

v3:
 * Jordan: Use region info from devinfo

v4: Also make the vram host visible heap as local (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16739>
2022-07-26 20:34:02 +00:00
Jordan Justen 33bf0d7437 drm-uapi/i915_drm.h: Update from drm-next (2022-07-22)
git://anongit.freedesktop.org/drm/drm 417c1c1963549e9a48b83ada59d90258e38c6594

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16739>
2022-07-26 20:34:02 +00:00
Mike Blumenkrantz fc1eec0a27 lavapipe: fix shader access stage conversion from mesa -> pipe
ok ok but this time it's fixed and works I promise

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17758>
2022-07-26 20:21:50 +00:00
Gert Wollny bbe8400949 r600/sb: fall back to unoptimized shader if RA fails
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17755>
2022-07-26 20:14:14 +00:00
Benjamin Cheng 1c06565026 radv: expose disjoint image support
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16510>
2022-07-26 19:50:58 +00:00
Benjamin Cheng 27a24cb382 radv: implement disjoint memory for multiplane images
For descriptor binding, we need to allow up to three buffers to be
referenced by any image.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16510>
2022-07-26 19:50:58 +00:00
Benjamin Cheng 6a77ecbe6f radv: consolidate descriptor set buffer counts
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16510>
2022-07-26 19:50:57 +00:00
Benjamin Cheng 72625bea5f radv: refactor image binding into struct
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16510>
2022-07-26 19:50:57 +00:00
Mike Blumenkrantz 62044403a9 util/blitter: respect PIPE_TEXTURE_RECT
if this isn't supported, don't use rect-related sampling

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17714>
2022-07-26 19:30:44 +00:00
Emma Anholt 00efd4cc38 ci/virgl: Make the VM-based virgl tests report to #virgl-ci, too.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17730>
2022-07-26 18:59:45 +00:00
Emma Anholt bd8740da77 gallivm: Optimize single-invocation SSBO stores.
The CTS does a lot of 1x1x1 compute shaders (all that stuff like
dEQP-GLES31.functional.shaders.builtin_functions.precision.mul.highp_compute.scalar)
which finish with store_ssbos.  Instead of doing the invocation loop in
that case (which LLVM has to later unroll), just emit the single
invocation's store.

Fixes timeouts running
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.36, which does
a spectacular number of SSBO stores in a long 1x1x1 compute shader.
Reduces runtime of on llvmpipe from 66s to 29s locally, and virgl from
1:38 to 43s.  virgl
dEQP-GLES31.functional.ssbo.layout.random.nested_structs_arrays_instance_arrays.22
goes down to 7 seconds.

Fixes: #6797
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17730>
2022-07-26 18:59:45 +00:00
Emma Anholt 8d41f8f384 gallivm: Refactor a bit of UBO/SSBO range checking.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17730>
2022-07-26 18:59:45 +00:00
Kenneth Graunke 03df494ea4 mesa: Mark render-to-texture as unsafe if there's no pipe_resource
Let's be slightly more defensive here.  If a texture image doesn't have
an associated pipe_resource allocated, then render_texture() will pass
that along to _mesa_update_renderbuffer_surface(), which will crash on a
NULL pointer dereference.  So, if there isn't a pipe_resource, then we
should just skip this altogteher.

Today, this isn't an issue, because each gl_texture_image always
allocates a pipe_resource up front.  On a branch of mine, I prototyped
some improvements to the compressed texture fallback handling, where it
would defer resource allocation, examine the source image's block data,
and dynamically select a format based on that, then allocate it later.

With that prototype in place, we saw crashes the Android "My Talking
Tom" series of games, which appear to be attaching ASTC textures to a
framebuffer color attachment.  That FBO would be incomplete anyway, as
ASTC textures aren't renderable, but we got into a situation where the
render-to-texture code was crashing due to the lack of pt before it
could properly signal that it was incomplete and bailing.

Technically, we don't need this now, but I figure that being defensive
won't hurt and this would probably save whoever encounters such an issue
in the future a bunch of frustrating debugging.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17508>
2022-07-26 18:38:43 +00:00
Danylo Piliaiev 4ba129cd86 tu: Do not dereference descriptorSetLayout in push descriptors tmpl
Fixes crash when capturing with RenderDoc.

From VK spec:

 descriptorSetLayout [...] This parameter is ignored if templateType
 is not VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17751>
2022-07-26 18:18:48 +00:00
Jason Ekstrand 2f00a04f3b vulkan: Include self-dep info in rendering continues
Fixes: 3a204d5cf3 ("vulkan/render_pass: Add a better helper for render pass inheritance")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17748>
2022-07-26 17:47:20 +00:00
Jason Ekstrand d2bd089b78 vulkan: Append subpass structures to VkRenderingInfo last
If we don't append subpass->self_dep_info last, other __vk_append_struct()
calls will update its pNext chain which lives in the subpass which
should be treated as immutable.  This is easily fixable by just making
it the last thing we append to the chain.

Fixes: 7e11cdc77a ("vulkan/render_pass: Pass sample locations to barriers")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17748>
2022-07-26 17:47:20 +00:00
Ian Romanick f7f232385f intel/fs: Use canonical form for "work around" tags
Trivial.  Also clean up some weird whitespace.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17605>
2022-07-26 17:25:19 +00:00
Ian Romanick 377246318a intel/fs: Eliminate "masked" and "per slot offset" URB messages
All of this information can be inferred from the sources.

v2: Fix "error: unused variable 'opcode'" detected by marge-bot.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17605>
2022-07-26 17:25:19 +00:00
Ian Romanick b21b901b46 intel/fs: Don't pass flags to lower_urb_read_logical_send or lower_urb_write_logical_send
...because the flags can be inferred from the sources.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17605>
2022-07-26 17:25:19 +00:00
Ian Romanick 1b17f8fc5a intel/fs: Make logical URB read instructions more like other logical instructions
No shader-db changes on any Intel platform

Fossil-db results:

Tiger Lake
Instructions in all programs: 156926440 -> 156926470 (+0.0%)
Instructions hurt: 15

Cycles in all programs: 7513099349 -> 7513099402 (+0.0%)
Cycles hurt: 15

Ice Lake and Skylake had similar results. (Ice Lake shown)
Cycles in all programs: 9099036492 -> 9099036489 (-0.0%)
Cycles helped: 1

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17605>
2022-07-26 17:25:19 +00:00
Ian Romanick 349a040f68 intel/fs: Make logical URB write instructions more like other logical instructions
The changes to fs_visitor::validate() helped track down a place where I
initially forgot to convert a message to the new sources layout.  This
had caused a different validation failure in
dEQP-GLES31.functional.tessellation.tesscoord.triangles_equal_spacing,
but this were not detected until after SENDs were lowered.

Tiger Lake, Ice Lake, and Skylake had similar results. (Ice Lake shown)
total instructions in shared programs: 19951145 -> 19951133 (<.01%)
instructions in affected programs: 2429 -> 2417 (-0.49%)
helped: 8 / HURT: 0

total cycles in shared programs: 858904152 -> 858862331 (<.01%)
cycles in affected programs: 5702652 -> 5660831 (-0.73%)
helped: 2138 / HURT: 1255

Broadwell
total cycles in shared programs: 904869459 -> 904835501 (<.01%)
cycles in affected programs: 7686744 -> 7652786 (-0.44%)
helped: 2861 / HURT: 2050

Tiger Lake, Ice Lake, and Skylake had similar results. (Ice Lake shown)
Instructions in all programs: 141442369 -> 141442032 (-0.0%)
Instructions helped: 337

Cycles in all programs: 9099270231 -> 9099036492 (-0.0%)
Cycles helped: 40661
Cycles hurt: 28606

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17605>
2022-07-26 17:25:18 +00:00
Georg Lehmann 5dab077824 aco: Add a note about G16 without A16 to README-ISA.md.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16979>
2022-07-26 16:54:08 +00:00
Georg Lehmann 7fa9b25c2f radv: Fold 16bit tex sources.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16979>
2022-07-26 16:54:08 +00:00
Georg Lehmann f5f73db846 aco: Support 16bit sources for texture ops.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16979>
2022-07-26 16:54:08 +00:00
Georg Lehmann c1cf0688c9 aco: Add G16 opcodes.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16979>
2022-07-26 16:54:08 +00:00
Connor Abbott 19a2353446 tu: Fix resolving d32s8 into s8 on fast path
The code assumed that if the source was d32s8 then the destination would
also be d32s8, in particular that depth_base_addr/stencil_base_addr
would also be filled out. Move the destination and source handling into
two different ifs with different conditions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17684>
2022-07-26 15:00:01 +00:00
Connor Abbott d426ee6a99 tu: Support resolving D24S8 -> S8
This was missed when we added support for VK_KHR_depth_stencil_resolve.
There is a similar feature where the stencil aspect of a D24S8 can be
copied "tightly" in CopyImageToBuffer, but it used the texture swizzle
and so required the 3d path. To get it to work with the 2D path, which
is required for resolves, we have to instead use the A8_UNORM format,
which works for texture sampling even for tiled images. We also have to
reuse the pre-existing image views because subpass resolves work on
image views rather than images, whereas before the fixup was applied
while creating the image view. This means threading through the
corresponding "opposite" format through setup, src, and dst functions,
doing the fixup there (through some shared helpers), and then getting
every user to specify the right format. As a bonus, we no longer need to
force the 3d path for the CopyImageToBuffer and CopyBufferToImage
special cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17684>
2022-07-26 15:00:01 +00:00
Erik Faye-Lund e8b22afae9 llvmpipe: remove unused function
Fixes: a1846e3926 ("llvmpipe: merge all rasterizer-bind functions")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17735>
2022-07-26 08:12:17 +00:00
Chia-I Wu ba461f897b ir3: fix tess param allocation
primitive_param takes up 2 vec4's.  Remove an align that I don't
understand.

The align upset

  Test case 'dEQP-VK.subgroups.ballot_broadcast.graphics.subgroupbroadcast_vec4'..
  deqp-vk: ../src/freedreno/ir3/ir3_nir.c:1039:
  void ir3_setup_const_state(nir_shader *, struct ir3_shader_variant *, struct ir3_const_state *):
  Assertion `constoff <= ir3_max_const(v)' failed.

with an older version (android11-tests-dev branch) of deqp-vk.  This is
because ir3_nir_opt_preamble uses the function for the worst case but
the function fails to replace the align by the worst case.

No regression with dEQP-VK.*tess*.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17570>
2022-07-26 01:04:56 +00:00
Chia-I Wu e3ba8a2f07 ir3: increment constoff right after it is assigned
Minor improvement to readability.  No real change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17570>
2022-07-26 01:04:56 +00:00