Commit Graph

36032 Commits

Author SHA1 Message Date
Mike Blumenkrantz e386a57769 zink: explicitly init glsl
need this to be able to use other frontends

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13864>
2021-11-19 13:14:46 +00:00
Emma Anholt e277b13182 freedreno: Stop exposing MSAA image load/store on desktop GL.
GLES doesn't support it, and blob VK doesn't support it.  We could
theoretically lower it, but don't bother since it's not required.  Fixes
various piglit image load/store tests.

Suggested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13852>
2021-11-18 23:47:58 +00:00
Alyssa Rosenzweig 81d22da6de asahi: Fix BIND_PIPELINE sizing and alignment
Fix a bug in BIND_PIPELINE XML reported by Dougall, which cleans up
a bit of both decoder and driver.

Instead of...

   * 17 bytes BIND_PIPELINE  (17)
   * An unused 8 byte record (25)
   * A set of N 8 byte records (25 + 8 * N)
   * Oops, 1 byte too many! One just disappeared (24 + 8 * N)

It seems to instead be

   * 24 bytes BIND_PIPELINE (24)
   * A set of N 8 byte records (24 + 8 * N)

without the sentinel record. These means the 8 byte records themselves
are shuffled, with the high byte of the pointers split from the low
word, but that's less gross than an off-by-one.

It's still not clear what the last 8 bytes of the BIND_VERTEX_PIPELINE
structure mean, or the last 4 byte of the BIND_FRAGMENT_PIPELINE
structure which seems to be a bit shorter.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig a28775046c asahi: Remove silly magic numbers
These are unnecessary now that the structure of agx_map_* is better
understood.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig d55a1a77bd asahi: Fix agx_map_* structures
Dougall Johnson observed these structures make more sense with indices[]
first in the entries and indices[] absent from the header. Then the
sentinel entry disappears, nr_entries makes more sense, and a few magic
numbers pop out. Many thanks to Dougall's astute eyes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig 6637fbb211 asahi: Allocate special scratch buffers
Seem to be used for preemption.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Mike Blumenkrantz 04cc1b93b1 zink: enable PIPE_TEXTURE_TRANSFER_COMPUTE on non-cpu drivers
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13859>
2021-11-18 22:12:58 +00:00
Mike Blumenkrantz ea761a40d5 zink: use pb_slab_alloc_reclaimed(reclaim_all) for BAR heap sometimes
this forces a full slab reclaim any time the device is known to have a
too-small BAR in order to keep memory usage at a minimum when it might otherwise
balloon out and crash us

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13850>
2021-11-18 21:22:30 +00:00
Roland Scheidegger b7e2214b3c llvmpipe: adjust rounding for viewport scissoring
Some apps may try to use a viewport adjusted by 0.5 pixels (among other
things) to emulate d3d9 pixel center, and in this case we would end up
with incorrect "fake scissor" box (shifted by 1 pixel), hence pixels
being incorrectly scissored away when permit_linear_rasterizer is set
(this happens even if the linear rasterizer is not used in the end).

So adjust the offset so that the half-way points get rounded down instead
of up.
(This is all a bit iffy I think since we don't use fractional
boxes (with 8 subpixel bits) anywhere yet, but at least without msaa
it should work out.)

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13794>
2021-11-18 19:23:13 +00:00
Tomeu Vizoso 81f25d8f27 virgl/ci: Run each dEQP instance in its own VM
Currently we run deqp-runner inside a single VM, which makes very poor
use of the available CPUs because Virgl has a bottleneck in the VMM that
serializes everything.

With this change, we can run several Crosvm instances in a runner and
make full use of the CPUs. Getting the same coverage with 3 runners
instead of 6.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12828>
2021-11-18 13:36:24 +00:00
Tomeu Vizoso d542e978e9 virgl/ci: Set GALLIVM_PERF=nopt,no_quad_lod
nopt will disable some shader optimizations that slow down test runs for
no gain.

no_quad_lod will disable some speed hacks that can cause inaccurate
results.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12828>
2021-11-18 13:36:24 +00:00
Mike Blumenkrantz c9a47c85da gallium: rename PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
this is now a bitfield enum for more functionality

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11984>
2021-11-18 07:58:29 -05:00
Pierre-Eric Pelloux-Prayer df8aeb4598 radeonsi/sqtt: increase the default buffer size to 32MB
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13838>
2021-11-18 10:53:37 +01:00
Pierre-Eric Pelloux-Prayer 56382ec071 radeonsi: unreference framebuffer state after use
util_copy_framebuffer_state increases refcounts, so we have
to decrement them afterwards.

Fixes: b1b491cdbb ("radeonsi: add a faster clear path for glClearTexImage")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5631
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13838>
2021-11-18 10:53:34 +01:00
Mike Blumenkrantz 35ffadb9e7 zink: clamp to 500 max batch states on nvidia
I've been advised that leaving this unclamped will use up all the fds
allotted to a process

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13844>
2021-11-18 00:00:16 +00:00
Mike Blumenkrantz a3be30665f zink: fail context creation more gracefully
handle some cases where context creation fails earlier than expected

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13844>
2021-11-18 00:00:16 +00:00
Mike Blumenkrantz 72a88c77de zink: fix memory availability reporting
this shouldn't report the budgeted available memory, it should return
the total memory, as that's what this api expects

Fixes: ff4ba3d4a7 ("zink: support PIPE_CAP_QUERY_MEMORY_INFO")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13849>
2021-11-17 22:59:43 +00:00
Mike Blumenkrantz 5f140a723d zink: use IMMUTABLE for dummy xfb buffer
this is never getting read back or anything so don't waste BAR allocation

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13849>
2021-11-17 22:59:43 +00:00
Mike Blumenkrantz 1eb2f0d41e zink: demote BAR allocations to device-local on oom
ideally this shouldn't happen, but it's better than crashing even if
it may crash later from attempting to map

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13849>
2021-11-17 22:59:43 +00:00
Mike Blumenkrantz 8f97af050e zink: set zink_resource_object::host_visible based on actual bo placement
the properties determined before allocation may not be the same as what gets
allocated

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13849>
2021-11-17 22:59:43 +00:00
Mike Blumenkrantz 74d2e89201 zink: always use slab allocation placement for domains
this allows the actual bo to have its memory type changed if necessary

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13849>
2021-11-17 22:59:43 +00:00
Mike Blumenkrantz 4fc216b4ba zink: add error for bo allocation failure
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13849>
2021-11-17 22:59:43 +00:00
Mike Blumenkrantz b1a32d1432 zink: implement multiplanar modifier handling
it turns out this is trivial as long as dri gives usable resource templates

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13799>
2021-11-17 19:22:02 +00:00
Mike Blumenkrantz 943f6a038d zink: always set matching resource export type for dmabuf creation
both of these need to be set if one is

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13799>
2021-11-17 19:22:02 +00:00
Mike Blumenkrantz 11c79a8bd7 zink: stop using VK_IMAGE_LAYOUT_PREINITIALIZED for dmabuf
this is illegal

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13799>
2021-11-17 19:22:02 +00:00
Omar Akkila 58a0d8d0de llvmpipe: page-align memory allocations
Allows memory allocated by llvmpipe_allocate_memory_fd to be
mappable to guests in virtualized environments like KVM which
requires page-aligned memory.

llvmpipe_allocate_memory is updated similarly for consistency.

Signed-off-by: Omar Akkila <omar.akkila@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13793>
2021-11-17 09:25:37 -05:00
Connor Abbott 508f917d8c util/dag: Make edge data a uintptr_t
Nobody was actually using it as a pointer, and I'm going to introduce a
shared function which relies on it not being a pointer so let's fix this
once and for all.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13722>
2021-11-17 13:41:47 +00:00
Erico Nunes ee2e14b352 ci: temporarily disable lima CI
The lima board farm will be unavailable for a few days, so disable it
to avoid CI failures.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13595>
2021-11-17 11:40:19 +00:00
Kenneth Graunke 3b78f17532 iris: Tidy code in iris_use_pinned_bo a bit
Now that we aren't short-circuiting most of the code, we should probably
reorganize it a little bit.  Tagged with fixes just so we pull all the
refactors together as one group.

Fixes: b21e916a62 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
2021-11-17 02:43:30 -08:00
Kenneth Graunke 6e90984934 iris: Check for cross-batch flushing whenever a buffer is newly written.
We need to perform cross-batch flushing if any batch writes to a BO
while others refer to it.  We checked this case when recording a new
BO in the list which we'd never seen before.  However, we neglected to
handle the case when we already read from a BO, but then began writing
to it.  That new write may provoke a conflict between existing reads
in other batches, so we need to re-check the cross-batch flushing.

Caught by Piglit's copyteximage when forcing blits and copies to use
a new IRIS_BATCH_BLITTER that isn't upstream yet.  But this bug could
be provoked by render/compute work today...we just hadn't noticed it.

Fixes: b21e916a62 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
2021-11-17 02:43:30 -08:00
Kenneth Graunke 76030964a6 iris: Make a helper function for cross-batch dependency flushing
This should have no functional change, but it's tagged with Fixes
anyway because it's needed for the bug fix in the next patch.

Fixes: b21e916a62 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
2021-11-17 02:43:30 -08:00
Alejandro Piñeiro cbf0d83eac v3d,v3dv: move TFU register definition to a common header
We are using the same definitions for both OpenGL and Vulkan, so let's
move it to common.

As we are here we are also adding versioning on the TFU register
definition. Those are basically register bit places, so really likely
to change between versions.

Adding 33 as it is the first version they got defined.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13832>
2021-11-17 11:04:31 +01:00
Pavel Asyutchenko 8ee7309e57 llvmpipe: enable PIPE_CAP_FBFETCH_COHERENT
llvmpipe's fragment shaders are always run sequentially and
in API order for a single tile, so it's impossible to have
out of order render target writes requiring fetch barriers.

Issues fixed in previous commits were actually breaking most
piglit/deqp tests for coherent extension variant.

Signed-off-by: Pavel Asyutchenko <sventeam@yandex.ru>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13252>
2021-11-17 04:08:54 +00:00
Pavel Asyutchenko e403c1c23e llvmpipe: remove dead args from load_unswizzled_block
They were only used in fs_fb_fetch.

Signed-off-by: Pavel Asyutchenko <sventeam@yandex.ru>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13252>
2021-11-17 04:08:54 +00:00
Pavel Asyutchenko ea6eeb70e6 llvmpipe: fix FB fetch with non 32-bit render target formats
Use lp_build_fetch_rgba_soa instead of lp_build_unpack_rgba_soa.
This one was failing most of deqp *framebuffer_fetch* tests.

Signed-off-by: Pavel Asyutchenko <sventeam@yandex.ru>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13252>
2021-11-17 04:08:54 +00:00
Pavel Asyutchenko 2b3a020928 llvmpipe: protect from doing FB fetch of missing buffers
Signed-off-by: Pavel Asyutchenko <sventeam@yandex.ru>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13252>
2021-11-17 04:08:54 +00:00
Pavel Asyutchenko 3ebd6498c4 llvmpipe: fix gl_FragColor and gl_LastFragData[0] combination
Signed-off-by: Pavel Asyutchenko <sventeam@yandex.ru>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13252>
2021-11-17 04:08:54 +00:00
Pavel Asyutchenko b1de61dd38 llvmpipe: fix wrong assumption on FB fetch shader opacity
In certain cases variant->opaque could be set to true, which
reset command list for tiles fully covered by a triangle
with this shader. This is obviously wrong in presence of
framebuffer fetch.

Signed-off-by: Pavel Asyutchenko <sventeam@yandex.ru>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13252>
2021-11-17 04:08:54 +00:00
Mike Blumenkrantz 86eb1549ef zink: implement pipe_context::draw_vertex_state
rough implementation, but it should be a decent start

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13692>
2021-11-17 03:16:13 +00:00
Vasily Khoruzhick 02e5f4fb10 lima: add more wrap modes
Using 1 bit per wrap mode looked very suspicious and after some
experiments it turns out it's 3-bit enum.

Border color is also here, it sits right after depth field. For
some reason it uses 16 bit per channel just like for clear color in RSW

GL_CLAMP mode is broken for nearest filter just as on Midgard, so add
the same workaround - use GL_CLAMP_TO_EDGE for nearest filter.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13213>
2021-11-16 22:58:12 +00:00
Vasily Khoruzhick cbed4d784e lima: handle 1D samplers
It's just a matter of changing number of dimensions in texture
descriptor.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13213>
2021-11-16 22:58:12 +00:00
Vasily Khoruzhick fa86a2a94d lima: add support for 3D textures
It looks like MBS format used by blob doesn't distinguish sampler2D from
sampler3D, so load texture instruction is the same for 2D and 3D
textures.

So all we need to RE is texture descriptor for 3D textures, but blob
doesn't implement it, so we need to do some guesswork:

- unknown_3_1 looks like a depth since it sits after height/width and
  always set to 1
- unknown_2_2 is exactly 3 bits and it follows wrap_t, so it must be
  wrap_r
- missing part is texture type for 3D textures. By trial and error it
  seems to be 4. First bit is only set for cubemap, so it's likely a
  separate flag, and rest 2 bits look like number of tex dimensions akin
  to midgard and later (thanks, panfrost!) with 0 for 1D, 1 for 2D
  and 2 for 3D.

Put it all together and we have working 3D textures on lima!

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13213>
2021-11-16 22:58:12 +00:00
Mike Blumenkrantz 97b92c9c32 zink: set suballocator bo size to aligned allocation size
this is the actual memory size

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13824>
2021-11-16 22:29:20 +00:00
Mike Blumenkrantz eb6f1d5348 zink: block suballocator caching for swapchain/dmabuf images
these have pNext pointers which makes their memory uncacheable

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13824>
2021-11-16 22:29:20 +00:00
Marek Olšák ba6d389fa7 radeonsi: don't use GS SGPR6 for the small prim cull info
use a user SGPR instead. This will be needed in the future.

Also don't upload small_prim_precision because it's passed via
VS_STATE_BITS.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13811>
2021-11-16 19:41:07 +00:00
Marek Olšák 0690a44e69 radeonsi: inline declare_vs_specific_input_sgprs
I think it was getting a little hard to follow.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13811>
2021-11-16 19:41:07 +00:00
Marek Olšák 513bd6acca radeonsi: cull against clip planes, clipvertex, clip/cull distances in shader
The downside is that this duplicates shader code for clip/cull distances
in both the position and parameter portions of the shader.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13811>
2021-11-16 19:41:07 +00:00
Marek Olšák 881c459191 radeonsi: unify how ngg_cull_flags are set
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13811>
2021-11-16 19:41:07 +00:00
Jesse Natalie a818f7b686 d3d12: Fix incorrect hash table usage
I'd assumed that since insert didn't take a deleter, it was
find-or-insert, not insert-or-replace. This caused a bo reference
leak if the same bo was used more than once in a batch.

Fixes: fde36d7992 ("d3d12: Don't wait for GPU reads to do CPU reads")
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13819>
2021-11-16 19:27:16 +00:00
Vasily Khoruzhick 764760314d lima: add native txp support
Currently lima uses generic TXP lowering that results in downgrading
coords precision to FP16 since we have to do some calculations with
coords instead of loading them directly from varying.

Mali4x0 has native TXP support, however coords and projector have to
come from a single source.

Add NIR lowering pass that combines coords and projector into a single
backend-specific source and use it instead of generic lowering.

Unfortunately this change regresses one test, but it also fails in blob and
disassembly is now identical.

shader-db diff:

total instructions in shared programs: 15623 -> 15603 (-0.13%)
instructions in affected programs: 877 -> 857 (-2.28%)
helped: 7
HURT: 0
helped stats (abs) min: 2 max: 8 x̄: 2.86 x̃: 2
helped stats (rel) min: 0.87% max: 10.53% x̄: 4.93% x̃: 1.85%
95% mean confidence interval for instructions value: -4.95 -0.76
95% mean confidence interval for instructions %-change: -9.31% -0.55%
Instructions are helped.

total loops in shared programs: 3 -> 3 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 136 -> 137 (0.74%)
spills in affected programs: 0 -> 1
helped: 0
HURT: 1

total fills in shared programs: 598 -> 602 (0.67%)
fills in affected programs: 0 -> 4
helped: 0
HURT: 1

Tested-by: Denis Pauk <pauk.denis@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13111>
2021-11-16 19:13:42 +00:00
Kenneth Graunke ebc0099d89 intel/genxml: Collapse leading underscores on prefixed value defines
We prefix names with an underscore to make them "safe" C identifiers
when necessary.  For example, a value of "32x32" would become "_32x32".

However, when specifying something like

   <field ... prefix="BLOCK_SIZE">
     <value name="32x32" value="0"/>
   </field>

we already have a prefix that makes the field name safe.  We'd rather
generate a name with a single underscore, i.e.

    #define BLOCK_SIZE_32x32 0

rather than

    #define BLOCK_SIZE__32x32 0

This also fixes up affected defines in crocus.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13809>
2021-11-16 11:38:30 +00:00
Kenneth Graunke f4004fde26 iris: Fix parameters to iris_copy_region in reallocate_resource_inplace
We had accidentally passed <x, y, z, l> instead of <l, x, y, z>.

Fixes: b8ef3271c8 ("iris: Move suballocated resources to a dedicated allocation on export")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13815>
2021-11-16 11:22:04 +00:00
Ilia Mirkin bf14a63e1d freedreno/a4xx: hook up sample mask/id, used to determine helper invocs
This fixes the various gl_HelperInvocation-based tests. There's a
lowering pass which converts it to (1 << sampleid) & samplemask.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13806>
2021-11-16 05:08:26 +00:00
Ilia Mirkin 45606b51cc freedreno/a4xx: indicate whether outputs are uint/sint
Unclear whether this fixes anything, but the blob does seem to set
these. (Discovered while trying to determine if value clamping was
missing for non-32-bit integer formats, which fail in some tests.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13806>
2021-11-16 05:08:26 +00:00
Ilia Mirkin 14087cb9ea freedreno/a4xx: fix stencil-textured border colors
These are implemented with unusual sampler formats, so the usual approach
of looking at the format descriptors fails.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13806>
2021-11-16 05:08:26 +00:00
Ilia Mirkin 8c041f4bf3 freedreno/a5xx: re-express buffer textures more logically
Instead of treating it as 2 bits to enable, make BUFFER a type (and
extend the bitfield width), and then add a separate BUFFER bit
(ostensibly to perform the width/height concatenation but who knows).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13805>
2021-11-16 04:44:23 +00:00
Ilia Mirkin 6566eae933 freedreno/a4xx: add proper buffer texture support
Rather than faking it as a 1d texture, add the buffer texture type, and
allow a full range of sizes.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13805>
2021-11-16 04:44:23 +00:00
Marek Olšák 42dbfd7206 radeonsi: make si_llvm_emit_clipvertex non-static
it will be used in culling code

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:46 +00:00
Marek Olšák d3d5777536 radeonsi: remove an incorrect comment at lds_byte0_accept_flag
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:46 +00:00
Marek Olšák 20e83abf06 radeonsi: improve memory instruction tracking
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:46 +00:00
Marek Olšák 901697654a radeonsi: add dcc_msaa option to enable DCC for MSAA
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:46 +00:00
Marek Olšák 5a5263d65d radeonsi: unify GFX9_VSGS_NUM_USER_SGPR and GFX9_TESGS_NUM_USER_SGPR
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:46 +00:00
Marek Olšák 9151ac3531 ac,radeonsi: cull small lines in the shader using the diamond exit rule
It also splits clip_half_line_width into X and Y components for tighter
view culling.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:46 +00:00
Marek Olšák 701a0b5165 radeonsi: add si_state_rasterizer::ngg_cull_flags_lines and rename the others
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:46 +00:00
Marek Olšák 3166d4428d radeonsi: set EXTRA_DX_DY_PRECISION for lines where it's supported
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:46 +00:00
Marek Olšák 4571778008 radeonsi: set PERPENDICULAR_ENDCAP_ENA for wide AA lines
This is more correct.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:45 +00:00
Marek Olšák 3338956268 radeonsi: make si_get_small_prim_cull_info static
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:45 +00:00
Marek Olšák 963b7475a9 radeonsi: use ac_build_load_to_sgpr in gfx10_emit_ngg_culling_epilogue
This is more correct because we are loading constants into an SGPR even
though there is no effect on behavior in this case.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:45 +00:00
Marek Olšák f8a0aa6852 radeonsi: fix view culling for wide lines
We need to cull wide lines as quads, but only for view culling.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:45 +00:00
Marek Olšák 8f687bb5dc radeonsi: fix shader culling with integer pixel centers
Only Nine was using them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13700>
2021-11-16 02:11:45 +00:00
Paulo Zanoni a9c1cc63c6 iris: call brw_process_intel_debug_variable() earlier
We're currently only calling it after creating the screen and the
bufmgr. There are a few cases where Iris checks for the DEBUG_BUFMGR
bit before we call brw_process_intel_debug_variable(), which means
intel_debug is 0 and so we don't run the debug code. Today, these are
all related to the creation of the workaround bo and its mmap.

I found this in a custom branch after I converted to INTEL_DEBUG an
environment variable that I had.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13780>
2021-11-15 23:33:18 +00:00
Vasily Khoruzhick 15013958d0 lima: enable PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS
Mali4x0 PP doesn't have a swizzle for load_input, so use POT-aligned
varyings to avoid unnecessary movs for vec3 and precision downgrade
in case if this vec3 is coordinates for a sampler

shader-db:

total instructions in shared programs: 15707 -> 15623 (-0.53%)
instructions in affected programs: 3906 -> 3822 (-2.15%)
helped: 47
HURT: 18
helped stats (abs) min: 1 max: 9 x̄: 3.09 x̃: 2
helped stats (rel) min: 1.49% max: 23.53% x̄: 8.20% x̃: 6.45%
HURT stats (abs)   min: 1 max: 7 x̄: 3.39 x̃: 3
HURT stats (rel)   min: 0.78% max: 20.59% x̄: 10.45% x̃: 10.97%
95% mean confidence interval for instructions value: -2.18 -0.41
95% mean confidence interval for instructions %-change: -5.70% -0.38%
Instructions are helped.

total spills in shared programs: 146 -> 136 (-6.85%)
spills in affected programs: 39 -> 29 (-25.64%)
helped: 6
HURT: 0

total fills in shared programs: 617 -> 598 (-3.08%)
fills in affected programs: 125 -> 106 (-15.20%)
helped: 6
HURT: 0

HURT shaders are vertex shaders where we may need more instructions
for non-packed vec3s. It's acceptable trade-off since we don't get
precision downgrade if this varying is coordinates for a sampler.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13151>
2021-11-15 22:52:55 +00:00
Mike Blumenkrantz 43c457a6ec zink: always add VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT for 3D images
there's no way to know what an image will be used for, so this bit needs
to always be added

fixes KHR-GL46.packed_pixels.varied_rectangle.compressed_rgb

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13798>
2021-11-15 21:24:05 +00:00
Mike Blumenkrantz 93a55537f2 zink: stop running discard_if in generated tcs
just embarrassing smh

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13798>
2021-11-15 21:24:05 +00:00
Samuel Pitoiset df526aae1b zink: skip one GLES31 subset to avoid GPU hangs on Navi10
Weird bug... I will figure out later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13796>
2021-11-15 20:33:22 +00:00
Rob Clark f53e1823c2 freedreno: caps for clover
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12500>
2021-11-15 18:06:39 +00:00
Rob Clark 9e7f5b75ec freedreno: Add PIPE_SHADER_IR_NIR_SERIALIZED support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12500>
2021-11-15 18:06:39 +00:00
Ilia Mirkin 31d6cd224a a5xx: remove astc srgb workaround logic
This was copied from a4xx, which only needs it on one chip model (A420).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13782>
2021-11-15 17:31:53 +00:00
Samuel Pitoiset cb56b83572 zink: update the CI lists for RADV
Lot of GPU hangs fixed lately.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13792>
2021-11-15 16:19:29 +00:00
Iago Toral Quiroga f384c763fc v3d,v3dv: move tile size calculation to a common helper
We had this code replicated in 3 places across both drivers.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13790>
2021-11-15 11:40:39 +00:00
Dave Airlie 27903abbb6 llvmpipe: fix compressed image sizes.
VK CTS just added some new tests to write to a compressed image
from a compute shader, which was overrunning memory.

The image width/height need to be sized according to the block
sizes to avoid overwriting memory.

dEQP-VK.image.sample_texture.*bit_compressed*

Cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13618>
2021-11-15 07:15:36 +10:00
Dave Airlie 53a8faafc1 llvmpipe: disable 64-bit integer textures.
This fixes some crashes in VK-GL-CTS where it doesn't deal with these.

Cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13617>
2021-11-14 20:47:15 +00:00
Emma Anholt 32b51d5e60 freedreno/a6xx: Do sparse setup of the TFB program.
We don't need to init the whole program RAM, just the locations we are
actually writing from.  Syncs this code up with tu a bit more.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13747>
2021-11-12 20:26:22 +00:00
Ilia Mirkin 170e1aa647 freedreno/a[345]xx: add R8/RG8 SRGB formats
These enable the GL_EXT_texture_sRGB_R8 / GL_EXT_texture_sRGB_RG8
extensions.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13765>
2021-11-12 17:22:02 +00:00
Ilia Mirkin 8db29109be freedreno: prefer float immediates when float values are involved
Using double immediates can cause a natively-float value to have to get
upgraded to a double unnecessarily. Use float immediates where possible.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13764>
2021-11-12 16:48:49 +00:00
Ilia Mirkin 269b4dec9e nv50,nvc0: expose R8/RG8_SRGB formats for texturing
This enables the GL_EXT_texture_sRGB_R8/RG8 extensions.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13769>
2021-11-12 15:34:45 +00:00
Iago Toral Quiroga 0cb58f80d2 v3d: use V3D_MAX_DRAW_BUFFERS instead of hardcoded constant
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13775>
2021-11-12 11:04:07 +00:00
Qiang Yu 3900551894 radeonsi: add radeonsi_force_use_fma32 driconf option
fma32 only round once so has 0.5UP accuracy. mad32 round twice so
has 1UP accuracy. This accuracy difference sometimes make the result
different at the last bit.

Applications like META need more accuracy for display right result.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13686>
2021-11-12 09:01:58 +00:00
Ilia Mirkin d903eb156a freedreno/a4xx: fix min/max/bias lod sampler settings
This makes a4xx look more like a3xx for these settings. Most importantly
it adds the workaround for allowing the hw to decide between min and mag
filtering. This fixes a number of dEQP texture filtering tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13763>
2021-11-12 01:12:35 +00:00
Ilia Mirkin 4ffcef821c freedreno/ir3: fix setting the max tf vertex when there are no outputs
Fixes dEQP-GLES3.functional.transform_feedback.* on a4xx.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13760>
2021-11-11 23:49:19 +00:00
Ilia Mirkin c0de7ea0ab freedreno: check batch size after the fallback blitter clear
When force-flushing after every draw, this would otherwise hit a NULL
batch in fd_blitter_clear.

Tested on a4xx.

Suggested-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13761>
2021-11-11 23:26:00 +00:00
Alejandro Piñeiro 3f3820a3a5 v3d: remove static v3d_start_binning
v3dx(start_binning) is just a call to that method, so let's just use
it directly.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13754>
2021-11-11 14:04:22 +01:00
Alejandro Piñeiro 2a65db2458 v3d: remove unused include
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13754>
2021-11-11 14:04:16 +01:00
Andreas Baierl ee41e1bbd2 lima: Fix drawing wide lines
GLES2.0 spec allows parts of wide lines and points to be drawn even if
their center is outside the viewport.
Therefore 0x2000 in PLBU_CMD_PRIMITIVE_SETUP has to be set for points.
This is already our default setting as it seems to have no negative
effect when this bit is always set. Points work as expected but lines
don't. It's hard to RE it, because the affected deqp tests also fail
with the blob.

To respect this behaviour for lines and solve another 2 tests, we need
to do a workaround and temporarily extend the viewport by half of the
line width. The scissor rectangle is still equal with the initial
viewport.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12971>
2021-11-11 11:25:58 +00:00
Samuel Pitoiset 3e7bac80ce ac/rgp: add support for dumping SPM data
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13704>
2021-11-11 10:05:49 +00:00
Neil Roberts bdaf185889 v3d: Update prim_counts when prims generated query in flight without TF
In order to implement GL_PRIMITIVES_GENERATED, v3d allocates a small
resource and adds a command to the job to store the prim counts to it.
However it was only doing this when TF was enabled which meant that if
the query was used with a geometry shader but no TF then the query would
always be zero. This patch makes the driver keep track of how many
PRIMITIVES_GENERATED queries are in flight and then enable writing the
prim count if its more than zero.

Fix dEQP-GLES31.functional.geometry_shading.query.primitives_generated_*

v2: Update CI expectations and references to fixed tests in commit log.
v3: - Add comment that GL_PRIMITIVES_GENERATED query is included because
      OES_geometry_shader, but it is not part of OpenGL ES 3.1. (Iago)
    - Update Fixes to commit introducing geometry shaders. (Iago)

Fixes: a1b7c084 ("v3d: fix primitive queries for geometry shaders")
Signed-off-by: Neil Roberts <nroberts@igalia.com>
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13712>
2021-11-11 08:02:04 +00:00
Emma Anholt 07aaef5721 freedreno/a6xx: Inline remaining fd6_tex_const_0() call.
Less indirection and fixups for figuring out what's going on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
2021-11-11 00:10:57 +00:00
Emma Anholt 7230058e8a freedreno/a6xx: Drop an unused tile_mode arg.
I added this in ebaeddcbb3 ("freedreno/a6xx: Rewrite the format table
format/swap helpers.")  but it had already become unused through some
bugfixing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
2021-11-11 00:10:57 +00:00
Emma Anholt a9057d45a4 freedreno/a6xx: Clean up sysmem fb read patching using fd6_view.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
2021-11-11 00:10:57 +00:00
Emma Anholt c90220e449 freedreno/a6xx: Use fd6_view for non-buffer image descriptors, too.
This deletes a whole lot of code, but there's a modest drawoverhead perf
loss:

drawoverhead 1-image change -6.48856% +/- 4.28269% (n=50)
drawoverhead 8-image change -5.29195% +/- 2.62549% (n=90)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
2021-11-11 00:10:57 +00:00
Emma Anholt 533e486923 freedreno/a6xx: Switch to relying on fd6_view for our texture descriptors.
Having checked the deltas between fdl6_view and what we did before, switch
over to fdl6_view now.

No statistically significant difference on no-hw drawoverhead 8-texture
change (n=50) with the texture cache disabled from this and the previous
commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
2021-11-11 00:10:57 +00:00
Emma Anholt 84377785a4 freedreno/a6xx: Create a fd6_view at sampler view update time.
The goal is to share the same code as turnip for descriptor setup. This
just calls it and cross-checks.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
2021-11-11 00:10:57 +00:00
Emma Anholt 5b3a6ff9f7 freedreno: Set layer_first on (2D) resource imports.
Prevents getting a weird layer stride if you ask for it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13443>
2021-11-11 00:10:57 +00:00
Iago Toral Quiroga 3a95e25e84 v3dv,v3d: don't store swizzle pointer in shader/pipeline keys
We had been storing pointers to a driver owned swizzle table
rather than storing the actual swizzle value in various shader
and pipeline keys on both GL and Vulkan drivers.

This doesn't look very robust, particularly since we also
compute sha1 hashes from these values and we may store these
hashes to disk (for the disk cache).

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13738>
2021-11-10 11:24:26 +00:00
Mike Blumenkrantz 4dfb5818ed zink: update gfx pipeline shader module pointer even if the program is unchanged
this is used for pipeline comparisons, so it has to always be accurate

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13727>
2021-11-10 01:15:39 +00:00
Mike Blumenkrantz bfa81c1e8c zink: be more consistent about applying module hash for gfx pipeline
this was a little spaghetti-ish: the module hash was sometimes being applied
during module update, sometimes in draw during program create, and then also
it was removed when a shader unbind would cause the program to no longer be reachable

now things are more consistent:
* keep removing module hash when program becomes unreachable
* only apply module hash in draw during updates there

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13727>
2021-11-10 01:15:39 +00:00
Mike Blumenkrantz 937a841b57 zink: ci updates
these don't spend forever in llvmpipe optimization passes anymore

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13727>
2021-11-10 01:15:39 +00:00
Mike Blumenkrantz 2ac23b4d58 zink: always inline uniforms when running on a cpu driver
the overhead from creating new inlined shader variants is likely to be less than
the time required to fully optimize and run those variants, so just
inline 100% of the time to cut down shader runs

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13727>
2021-11-10 01:15:39 +00:00
Mike Blumenkrantz a8d90c8ed5 zink: implement cs uniform inlining
this implements shader variants for compute

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13727>
2021-11-10 01:15:39 +00:00
Mike Blumenkrantz 06f2054cb5 zink: radv ci updates for 1dshadow stuff
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13583>
2021-11-09 23:59:04 +00:00
Mike Blumenkrantz 64e0ca15d6 zink: add 1DShadow sampler handling for drivers (radv) that don't support it
some drivers won't create zs textures in any shape but 2D. this can be
handled instead by using 2D textures and then performing shader rewrites to
convert shadow samplers for 1D and 1DArray types to 2D/array

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13583>
2021-11-09 23:59:04 +00:00
Mike Blumenkrantz 62983f276b zink: add another compiler pass to convert 64bit vertex attribs
gallium always provides uint types, so rewrite the shader to load a 64bit
attrib and then cast back to whatever it was before

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13566>
2021-11-09 21:51:06 +00:00
Mike Blumenkrantz 39bdb00d77 zink: simplify 64bit vertex attrib lowering
this was a cool myfirstcompilerpass.exe but there's easier ways to do
things like this

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13566>
2021-11-09 21:51:06 +00:00
Mike Blumenkrantz 854fd242fa zink: declare int/float size caps inline with type usage
this is much more accurate than trying to use shader info

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13566>
2021-11-09 21:51:05 +00:00
Jesse Natalie fde36d7992 d3d12: Don't wait for GPU reads to do CPU reads
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13669>
2021-11-09 18:31:19 +00:00
Jesse Natalie 8ea1e58f0e d3d12: Don't wait for *all* batches when synchronizing a resource
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13669>
2021-11-09 18:31:19 +00:00
Samuel Pitoiset 5bb72ff750 zink: update the CI lists for RADV
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13726>
2021-11-09 16:41:13 +00:00
Jesse Natalie 1ab906d17f d3d12: Handle non-infinite wait timeouts > 49.7 days as infinite
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12268>
2021-11-09 04:05:55 +00:00
Jesse Natalie accd8326c5 d3d12: Fix Linux fence wait return value
zero is for success, nonzero is failure.

Fixes: 0b60d6a2 ("d3d12: Support Linux eventfds for fences")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12268>
2021-11-09 04:05:55 +00:00
Jesse Natalie e7502c5404 d3d12: Fully init primconvert config
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>
2021-11-09 00:44:52 +00:00
Jesse Natalie c151e9d087 d3d12: Hook up threaded context
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>
2021-11-09 00:44:52 +00:00
Jesse Natalie 2c90fa19a8 d3d12: Pass explicit context to pre/post draw surface blits
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>
2021-11-09 00:44:52 +00:00
Jesse Natalie cd41ed53b2 d3d12: Use thread safe slab allocators in transfer_map handling
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>
2021-11-09 00:44:52 +00:00
Jesse Natalie 17a46e2cf9 d3d12: Inherit from threaded_transfer
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>
2021-11-09 00:44:52 +00:00
Jesse Natalie e9a1e1c21e d3d12: Resources inherit from threaded_resource
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>
2021-11-09 00:44:52 +00:00
Jesse Natalie a463aa0099 d3d12: Inherit from threaded_query
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>
2021-11-09 00:44:52 +00:00
Jordan Justen 7eb13fc2f2 anv,blorp,iris: Set MOCS for COMPUTE_WALKER post-sync operation
We don't current enable post sync operations, but it is probably
better to set them to "internal" MOCS than to remove the non-zero
checking for this genxml field.

Reworks:
 * Fix COMPUTE_WALKER in cmd_buffer_trace_rays (s-b Jason)

Fixes: 7b78b2fcac ("intel/genxml: Assert that all MOCS fields are non-zero on Gfx7+")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13624>
2021-11-08 23:29:51 +00:00
Jason Ekstrand 419b02c90c anv,iris: Advertise a max 3D workgroup size of 1024^3
On GFX version 12.5+ with COMPUTE_WALKER, this is the limit based on the
size of the HW packet.  On older HW, we can technically go a bit bigger
but there's not much point.  Technically, some hardware can support a
scalar workgroup size up to 2048 but most apps don't go any bigger than
1024.

As discussed on the merge request page, the current limit assumes
SIMD32, but it is unclear if we want to encourage applications to use
SIMD32 if it may lead to additional register spilling in shader
programs. Many applications have likely tuned for a limit of 1024
based on the OpenGL minimum limit, so it might not gain much by
advertising more than 1024.

Reworks:
 * Jordan: Use MIN2 and limit total invocations as well.
 * Jordan: Add second paragraph to commit message based on merge
   request discussion.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13538>
2021-11-08 23:07:42 +00:00
Mike Blumenkrantz 8626949f07 zink: flatten out draw templates a bit
having this be super granular was a neat idea, but really I don't care
even a little bit about a driver that's weirdly implementing *only*
dynamic vertex input or *only* dynamic state2

this massively cuts down the combinatorics and provides a more accurate
gauge of driver feature levels, since this is the general level of support
that they're likely to have

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13715>
2021-11-08 21:49:40 +00:00
Marek Olšák 3d80d6b696 radeonsi: enable nir_group_loads for better performance
The best case I have is one viewperf subtest getting +9% performance.

56979 shaders in 34726 tests
Totals:
SGPRS: 2667522 -> 2669178 (0.06 %)
VGPRS: 1543608 -> 1553472 (0.64 %)
Spilled SGPRs: 4090 -> 4100 (0.24 %)
Spilled VGPRs: 1600 -> 1791 (11.94 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 1872 -> 2076 (10.90 %) dwords per thread
Code Size: 59443980 -> 59479804 (0.06 %) bytes
Max Waves: 867280 -> 865634 (-0.19 %)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>

v2: No change in pixels but the hash changed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13604>
2021-11-08 21:20:11 +00:00
Mike Blumenkrantz acddf83c95 zink: update radv ci passes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13716>
2021-11-08 20:02:26 +00:00
Gert Wollny 63c4c559cb virgl: obtain supported number of shader sampler views from host
Modern games may use more than 16 sampler views, so get what the host
actually supports, and default to 16 on old hosts that don't pass the
value.

Since the possible maximal value of PIPE_MAX_SHADER_SAMPLER_VIEWS doesn't
fit into an uint32_t remove the binding flags, they were only used for
releasing the sampler views, and this can be achieved differently.

v2: Fix compilation error

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: John Bates <jbates@chromium.org> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13646>
2021-11-08 19:34:30 +00:00
Pierre-Eric Pelloux-Prayer e26dd92957 radeonsi/sqtt: fix FINISH_DONE / BUSY usage
They're using more than a single bit so use the proper mask.

Based on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13694

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13696>
2021-11-08 17:16:11 +00:00
Pierre-Eric Pelloux-Prayer 3de072aaec radeonsi/sqtt: fix shader stage values
shader_stages_mask and others expect MESA_SHADER_* based values,
not PIPE_SHADER_*...

Without this the fragment shader wouldn't appear in the "Pipelines"
pane of RGP.

Fixes: c276bde34a ("radeonsi/sqtt: export shader code to RGP")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13696>
2021-11-08 17:16:11 +00:00
Lionel Landwerlin 361b3fee3c intel: move away from booleans to identify platforms
v2: Drop changes around GFX_VERx10 == 75 (Luis)

v3: Replace
   (GFX_VERx10 < 75 && devinfo->platform != INTEL_PLATFORM_BYT)
   by
   (devinfo->platform == INTEL_PLATFORM_IVB)
   Replace
   (devinfo->ver >= 5 || devinfo->platform == INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 >= 45)
   Replace
   (devinfo->platform != INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 != 45)

v4: Fix crocus typo

v5: Rebase

v6: Add GFX3, ILK & I965 platforms (Jordan)
    Move ifdef to code expressions (Jordan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>
2021-11-08 16:48:06 +00:00
Mike Blumenkrantz fbd61d2b02 zink: set new point/line caps
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Marek Olšák 78337728d1 radeonsi: set correct point and line limits
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Marek Olšák cf9afc7b0c gallium: add missing point and line CAPs
The returned values are the same as the GL frontend.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Marek Olšák b80dca86c3 gallium: rename PIPE_CAPF_MAX_POINT_WIDTH -> MAX_POINT_SIZE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
2021-11-08 14:37:49 +00:00
Lionel Landwerlin a543a94404 intel/dev: fix subslice/eu total computations with some fused configurations
When a device has its first slice/subslice fused off, we can't use the
number of slices/subslices to iterate the mask array.

v2: Fix spelling (Marcin)
    Use size_t for iterator (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Matt Roper <matthew.d.roper@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5601
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
2021-11-05 10:22:18 +00:00
orbea 0a6f079afe build: add sha1_h for lp_texture.c
../mesa-9999/src/gallium/drivers/llvmpipe/lp_texture.c:55:10: fatal error: git_sha1.h: No such file or directory

Fixes: 1608a815e3 ("llvmpipe: add support for EXT_memory_object(_fd)")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: orbea <orbea@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13665>
2021-11-05 05:54:20 +00:00
Jordan Justen 6ffdcc335e iris: Use mi_builder in iris_load_indirect_location()
For example, this allows us to take advantage of command-streamer
based register offsets in mi_builder.

Ref: 06cf838cbd ("intel/mi_builder: Support gen11 command-streamer based register offsets")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13652>
2021-11-04 21:23:21 -07:00
Mike Blumenkrantz 833c0394e0 Revert "gallium/u_blitter: work around broken sample shading in llvmpipe and zink"
This reverts commit 8b287c3f92.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13679>
2021-11-05 02:36:32 +00:00
Mike Blumenkrantz 8c37cd8860 zink: rework cached fbfetch descriptor fallback
this ended up being a little trickier than I thought; lazy
descriptors don't use dynamic ubo types for the push set,
which means drivers that (correctly) assert dynamic offset existence
explode because the descriptor template will never work with the
push set

the better, though slightly more annoying, option here is to use the
lazy manager's faster descriptor allocation and lesser complexity to
quickly grab a push set, then tweak the existing cached codepath slightly
in order to update a raw vkdescriptorset

Fixes: 417477f60e ("zink: always use lazy (non-push) updating for fbfetch descriptors")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13677>
2021-11-05 02:21:01 +00:00
Jesse Natalie 2d1f5e3dcb d3d12: Don't accumulate timestamp queries
If an app re-issues a timestamp query a lot, but doesn't ever ask
for the results, we could end up running off the end of our query
heap. But we don't actually need to advance/accumulate, so just
use a single entry in the heap.

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12920>
2021-11-05 00:44:15 +00:00
Emma Anholt b0f2b0e980 freedreno/a5xx: Clean up a little bit of blitter array pitch setup.
We have a nice helper function for determining an array pitch.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Emma Anholt b26e0cdf44 freedreno/a5xx: Try to fix drawing to z/s miplevel/layer offsets.
Terrifyingly, no testcases are fixed by this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Emma Anholt 99f5b7ba1e freedreno/a5xx: Remove bogus assertion about BO size.
The slice->size0 temp is being used as both the array stride (incorrectly)
and as the size of the slice (for this assert).  This assert doesn't seem
to be in the right place to me, if you want to check that offset+slice
size is < bo size, you could just do that at the end of layout setup.

This caused troubles when fixing the temp to be the actual array stride
for filling out the HW state, since then rendering to nonzero levels would
think that the rendering overflowed the BO when it doesn't.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Emma Anholt 03d8677bca freedreno/a6xx: Try to fix drawing to z/s miplevel/layer offsets.
Terrifyingly, no testcases are fixed by this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>
2021-11-04 22:49:29 +00:00
Caio Oliveira 8fc6a11f0e intel/blorp: Add option to emit packets that disable Mesh
If a driver doesn't support Mesh, don't emit anything.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13660>
2021-11-04 14:41:06 -07:00
Emma Anholt 1e869e3fb4 freedreno/a5xx+: Fix missing LA formats.
GL_ARB_texture_buffer_object uses these formats, and we expose it.  Since
we didn't have the formats in the table, we we were using bad HW
texture/color formats for them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13666>
2021-11-04 19:07:54 +00:00
Emma Anholt 0e4fcda7e0 freedreno/a6xx: Don't try to generate mipmaps for SNORM with our blitter.
Since we're casting to unorm, the linear filtering will give bad results.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13666>
2021-11-04 19:07:54 +00:00
Jason Ekstrand 953a4ca6fe intel: Add has_bit6_swizzle to devinfo
There's no good reason to have this rather complex check in three
drivers.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13636>
2021-11-04 18:51:04 +00:00
Marek Olšák 74adf22a0a radeonsi: fix a typo preventing a fast depth-stencil clear
Fixes: 9defe8aca9 - radeonsi: implement fast Z/S clears using clear_buffer on HTILE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
2021-11-04 17:36:26 +00:00
Marek Olšák c0f723ce2b radeonsi: allow and finish TC-compatible MSAA HTILE
This improves perf for Catia by 4%.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
2021-11-04 17:36:26 +00:00
Marek Olšák 3baeaac64b radeonsi: rename stencil_cleared_level_mask -> stencil_cleared_level_mask_once
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
2021-11-04 17:36:26 +00:00
Marek Olšák b1b491cdbb radeonsi: add a faster clear path for glClearTexImage
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
2021-11-04 17:36:26 +00:00
Marek Olšák 5d3aea49b8 radeonsi: fix 2 issues with depth_cleared_level_mask
- Unset depth_cleared_level_mask for non-clear blits. Set the flag after
  the clear, so that we don't have to check blitter_running.
- Set depth_cleared_level_mask only when we set depth_clear_value.

Fixes: ff8a930cf7 - radeonsi: add _once suffix to depth_cleared_level_mask

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>
2021-11-04 17:36:26 +00:00
Mike Blumenkrantz 92215d8da8 zink: add khr46 to ci
this blocks out all the very long tests and marks failures as needed
to improve the coverage of ci

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13656>
2021-11-04 16:42:04 +00:00
Mike Blumenkrantz f5f2426ffd zink: remove lazy ci job
the push descriptor coverage for lavapipe should be okay in ci now, and
that was the point of adding this job

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13656>
2021-11-04 16:42:04 +00:00
Joshua Ashton 7d64f0dd16 nvc0: Fix uninitialized width/height/depth warning.
This can happen if view->resource is false.

Fixes a warning in GCC 9+ that's been bugging me for a very long time when building Mesa.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12955>
2021-11-04 15:31:09 +00:00
Marek Olšák 8b287c3f92 gallium/u_blitter: work around broken sample shading in llvmpipe and zink
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13602>
2021-11-04 15:06:09 +00:00
Marek Olšák 6d483fed85 gallium/u_blitter: disable sample shading for all blits
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13602>
2021-11-04 15:06:09 +00:00
Marek Olšák 7ce3f8e639 gallium/util: fix util_can_blit_via_copy_region with unbound render condition
It returned false when a render condition was not bound, but it should
have returned true.

The bool stuff is random and incomplete, but that's life.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13602>
2021-11-04 15:06:09 +00:00
Mike Blumenkrantz 5d1b81d8ac zink: clamp PIPE_SHADER_CAP_MAX_INPUTS for xfb
vertex shader stages that can produce xfb must have
their input size clamped to the compiler define MAX_VARYING
to successfully be able to export an xfb output for each input

fixes KHR-GL46.geometry_shader.limits.max_input_components

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13632>
2021-11-04 14:51:10 +00:00
Mike Blumenkrantz 46e167028d zink: do a better job conserving locations for packed xfb outputs
if an entire vec4 is exported to xfb, mark it as an explicit xfb buffer
whenever possible to avoid blowing out the location limit

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13632>
2021-11-04 14:51:10 +00:00
Pierre-Eric Pelloux-Prayer bc6d22b920 radeonsi: fix ps_uses_fbfetch value
si_update_ps_colorbuf0_slot used blitter_running as a way to detect
recursive calls.
Unfortunately this catch too many cases; for instance a backtrace
like:
  #0 si_update_ps_colorbuf0_slot
  #1 si_set_framebuffer_state
  #2 do_blits
  [...]
  #5 si_blit
  #6 si_copy_region_with_blit

Would end-up not updating ps_uses_fbfetch; so if the new fb_state is
something like:
  cbufs = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, zsbuf = 0x55b8987545e0}

We can have ps_uses_fbfetch=true but cbufs[0] = NULL, which causes a
crash later in si_ps_key_update_framebuffer.

This commit fixes intermittent crashes in KHR-GL46.stencil_texturing.functional.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13550>
2021-11-04 09:38:42 +01:00
Pierre-Eric Pelloux-Prayer d86d602ed0 radeonsi/sdma: fix bogus assert
src can use dcc even for non sdma v5 variants because si_decompress_dcc
is called in si_sdma_copy_image.

Fixes: 46c95047bd ("radeonsi: implement si_sdma_copy_image for gfx7+")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13550>
2021-11-04 09:38:41 +01:00
Pierre-Eric Pelloux-Prayer dc56301f78 radeonsi: treat nir_intrinsic_load_constant as a VMEM operation
This is used by variable indexing of constant arrays, to build
code like this:

   s_add_u32 s6, s6, const_data@rel32@lo+4
   s_addc_u32 s7, s7, const_data@rel32@hi+12
   [...]
   global_load_dword v4, v4, s[6:7

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5118
Fixes: 8288882965 ("radeonsi: set MEM_ORDERED optimally")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13550>
2021-11-04 09:38:20 +01:00
Emma Anholt d1801d43f8 freedreno/a5xx: Use the defined names for 2D_BLIT_CNTL regs.
We have definitions for them above, no need to be UNKNOWN about it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13659>
2021-11-04 03:47:54 +00:00
Emma Anholt f0f5b8d47c freedreno/a6xx: Fix partial z/s clears with sysmem.
We have to set 8c01 to say "leave these channels alone" when
clearing/storing just Z or S of z24s8.  Fixes the bypass path for
KHR-GLES3.packed_depth_stencil.verify_read_pixels.depth24_stencil8.

Cc: mesa-stable
Fixes: #5592
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13659>
2021-11-04 03:47:54 +00:00
Mike Blumenkrantz 417477f60e zink: always use lazy (non-push) updating for fbfetch descriptors
fbfetch descriptors are uncacheable due to having mixed descriptor types
in the same set, so this needs to always use lazy updating to avoid
exploding the cache and crashing

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13654>
2021-11-04 02:41:09 +00:00
Mike Blumenkrantz 2c54ad8f3d zink: set fbfetch state on lazy batch data when enabling it
this avoids creating new descriptor pools on every update

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13654>
2021-11-04 02:41:09 +00:00
Marek Olšák 81d35c8d48 util: add a util_bitcount variant that selects POPCNT through C++ template arg
Moved from radeonsi. st/mesa will use it.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13512>
2021-11-03 23:22:31 +00:00
Filip Gawin e1c640c3a4 r300: stub derivatives on r300 and r400 hardware
There are three approaches for problem:
- use dummy shader (current solution)
- use software rendering
- stub

First option always gonna give bad results, second one
gonna be slideshow (r300/r400 at best are running with
old 2 cores cpu), third one can sometimes give graphical
gliches.

IMHO third one is least annoying option.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13642>
2021-11-03 21:56:19 +00:00
Emma Anholt 14fca01b32 freedreno: Fix layered rendering to just Z/S and not color.
We would try to take the gmem path which can't do layered rendering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13653>
2021-11-03 21:13:45 +00:00
Mike Blumenkrantz 7c8fee6049 build: add sha1_h to llvmpipe build
cc: mesa-stable

fixes #5588

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13658>
2021-11-03 20:50:24 +00:00
Mike Blumenkrantz 3137ff4709 zink: add queue locking
sparse binds have to be processed synchronously with cmdbuf recording to
avoid resource object desync in the vk driver, which means they have to be
done in the driver thread instead of the flush thread. this necessitates
adding locking for the queue since there is now a case when submissions occur
in a different thread

fixes illegal multithread usage in KHR-GL46.CommonBugs.CommonBug_SparseBuffersWithCopyOps

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13597>
2021-11-03 20:34:25 +00:00
Mike Blumenkrantz 786167b88c zink: set PIPE_CAP_VERTEX_ATTRIB_ELEMENT_ALIGNED_ONLY
fixes #5557

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13556>
2021-11-03 20:03:55 +00:00
Emma Anholt c356f3cfce freedreno/a6xx: Use the fdl buffer view setup for img/ssbo descriptors.
The single-plane descriptor emit helper doesn't strictly need the UBWC
reloc, since imageBuffer can't be UBWC, but it means the function is ready
to be used for non-buffer image descriptors later.

no-hw drawoverhead 1-imageBuffer change throughput 1.95457% +/- 1.44325%
(n=127).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13635>
2021-11-03 19:38:48 +00:00
Emma Anholt 7b578c1249 freedreno/a6xx: Emit a null descriptor for unoccupied IBO slots.
Fixes a crash in some desktop GL testcases in piglit.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13635>
2021-11-03 19:38:48 +00:00
Emma Anholt 29093bc42d freedreno: Fix gmem invalidating the depth or stencil of packed d/s.
The gmem store stores both depth and stencil for z24s8.  So, if we're
doing a write (clear or draw) to one or the other of the channels, we need
the other one restored as well.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13649>
2021-11-03 18:56:23 +00:00
Mike Blumenkrantz 675519f1d0 zink: reject all storage multisampling if the feature is unsupported
this also enables removing a stupid conditional

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13631>
2021-11-03 14:14:44 +00:00
Mike Blumenkrantz aacdc6eb44 zink: add SpvCapabilityStorageImageMultisample for multisampled storage images
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13631>
2021-11-03 14:14:44 +00:00
Mike Blumenkrantz ac2af149f1 zink: stop double printing validation messages
VVL already prints its messages using configurable settings. there's no
reason for zink to unconditionally repeat them immediately after

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13633>
2021-11-03 01:22:56 +00:00
Emma Anholt 4e28962800 ci: Uprev VK-GL-CTS to 1.2.7.2, and pull in piglit while I'm here.
The VK-GL-CTS fixes some issues for freedreno, and almost all of LVP's
xfails.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13622>
2021-11-02 20:29:31 +00:00
Jesse Natalie 8d3a3e7a00 microsoft/compiler: Use textures for SRVs
After running the (renamed) dxil_nir_split_typed_samplers pass, the
shader will have either:
* Textures, which map to D3D SRVs
* Bare samplers, which map to D3D bare samplers
* Images, which map to D3D UAVs

There shouldn't be any remaining samplers with type information

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13390>
2021-11-02 11:02:22 -07:00
Gert Wollny 634e2353a0 virgl: Add driconf tweak to force-enable reading back R8_SRGB textures
In the menu of CS:GO R8_SRGB textures are uploaded and read back, and
since R8_SRGB can't be read back on GLES, because it is not a rendertarget
format and glGetTexImage and siblings don't exists, we can't default to
enabling reading back this format. This leads to an emulation of the
glGetTexImage calls issued by CS:GO, and this slows down the menus a lot
(below 1 fps on Intel XE hosts).

So add this driconf tweak and enable it for CS:GO to work around the issue.
It can be done safely, because in this case we actually can use the data
that is stored on the host in the backing IOV.

This tweak lets the CS:GO menu run at around 60 FPS when run with virgl
on a Intel XE host when it would run with less than 1 FPS without the tweak.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: John Bates <jbates@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13572>
2021-11-02 10:22:52 +00:00
Paulo Zanoni 1311eddd52 iris: fix off-by-one error when clearing stale syncobjs
This shouldn't fix any real world bugs, except it will now clear more
stale syncobjs than it was previously doing, and actually do what the
comment says it does.

I could not find a real workload where this change would be relevant,
although I didn't try too much. I wrote my own little egl program to
test this.

I spotted this while reading the code when investigating a Piglit
failure [0]. It turns out this part the code was not relvant for the
failure.

[0]: ext_external_objects-vk-image-display-overwrite

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13536>
2021-11-02 08:31:54 +00:00
Guilherme Gallo 38c62646d0 iris/ci: Fix traces for amly and deqp list for whl
These are manual jobs, so the expected results got out of date.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13089>
2021-11-02 07:06:07 +01:00
Vinson Lee 308bd1f00c zink: Remove duplicate variable unsized.
Fix defect reported by Coverity Scan.

Evaluation order violation (EVALUATION_ORDER)
write_write_typo: In unsized = unsized =
glsl_array_type(glsl_uintN_t_type(bit_size), 0U, bit_size / 8U),
unsized is written twice with the same value.

Fixes: f79a25653b ("zink: move all shader bo/sharedmem access to compiler passes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13607>
2021-11-01 18:59:45 -07:00
Emma Anholt 085e838959 i915g: Improve the explanation for the 1D Y swizzle.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13133>
2021-11-01 20:56:22 +00:00
Emma Anholt fa4fd67f78 i915g: Make sure we consider negates/swizzles on bias/shadow coords.
Caught by imirkin while debugging #4986.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13133>
2021-11-01 20:56:22 +00:00
Emma Anholt ebe5626de6 i915g: Check for negate/swizzle on TGSI_OPCODE_KILL_IF's src.yzw.
Caught by imirkin while debugging #4986.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13133>
2021-11-01 20:56:22 +00:00
Emma Anholt ba48b27a11 etnaviv: Switch to the NIR compiler by default.
This was the conclusion for the next action in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12889, and I
wanted to get moving on it as part of !8044.  I made the change as
mechanical as possible to ease review.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13535>
2021-11-01 20:47:58 +00:00
Mike Blumenkrantz 73af67883d zink: force float dest types on some alu results
these aren't exact matches in spirv, so set the expected result type
to float where necessary

cc: mesa-stable

fixes #5567

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13562>
2021-11-01 01:15:20 +00:00
Mike Blumenkrantz c73f5a0082 zink: add more int/float types to cast switching in ntv
these come from opcode results, which are not always 32bit

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13562>
2021-11-01 01:15:20 +00:00
Mike Blumenkrantz 69501ff458 zink: explicitly enable VK_EXT_shader_subgroup_ballot
this is needed when not creating 1.2 contexts

cc: mesa-stable

ref #5567

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13562>
2021-11-01 01:15:20 +00:00
Mike Blumenkrantz ccfe36fffa zink: clamp max buffer sizes to smallest buffer heap size
the max driver limit for these is irrelevant if there isn't enough memory
to allocate a buffer of that size

KHR-GL46.texture_buffer.texture_buffer_max_size

cc: mesa-stable

fixes #5568

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13584>
2021-11-01 01:01:33 +00:00
Mike Blumenkrantz fd2b47281f zink: error when trying to allocate a bo larger than heap size
this is illegal and would fail anyway

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13584>
2021-11-01 01:01:33 +00:00
Mike Blumenkrantz aa5e544644 zink: don't clamp 2D_ARRAY surfaces to 2D
another thing that used to be needed but now isn't

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13586>
2021-11-01 00:49:24 +00:00
Mike Blumenkrantz 8d2280f533 zink: don't clamp cube array surfacess to cubes
this was probably necessary for some other reason that has since been fixed,
and instead now just creates validation spam

cc: mesa-stable

fixes #5566

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13586>
2021-11-01 00:49:24 +00:00
Mike Blumenkrantz 6ab915960c zink: be more spec-compliant for unnormalizedCoordinates samplers
the spec prohibits using most stuff with these, but also they probably
are just texelfetch anyway so it doesn't matter

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13587>
2021-11-01 00:33:19 +00:00
Rob Clark 7e998783db freedreno/ir3: xfb fix for duplicate outputs
We can't rely on regid to be unique, shaders can have multiple varyings
with the same output value.  Normally shader linking deduplicates these,
but we still need to handle the case for xfb.  So use slot instead as
the unique identifier.

Fixes KHR-GLES31.core.gpu_shader5.fma_precision_*

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13605>
2021-10-31 16:30:13 +00:00
Mike Blumenkrantz 6239adebbc zink: flag renderpass change when toggling fbfetch
ensure the input attachment gets updated

fixes running
KHR-GL46.blend_equation_advanced.blend_all.GL_MULTIPLY_KHR_all_qualifier
after
KHR-GL46.blend_equation_advanced.BlendEquationSeparate

cc: mesa-stable

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13598>
2021-10-31 14:56:51 +00:00
Jordan Justen 2d041d5f1e Revert "iris: Disable I915_FORMAT_MOD_Y_TILED_GEN12* on adl-p/display 13"
Round and round we go :)

In the "drm/i915/adlp/fb: Remove CCS FB stride restrictions" series,
https://lists.freedesktop.org/archives/intel-gfx/2021-October/281768.html,
it now appears that kernel can allow these modifiers to work with
adl-p.

This reverts commit d4174f5f05.

Fixes: d4174f5f05 ("iris: Disable I915_FORMAT_MOD_Y_TILED_GEN12* on adl-p/display 13")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13565>
2021-10-31 01:24:43 -07:00
Mike Blumenkrantz e8f18385e0 zink: inject LOD for sampler version of OpImageQuerySize
this is required by spec

cc: mesa-stable

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13585>
2021-10-29 19:05:07 +00:00
Mike Blumenkrantz 87fbb0eab0 zink: be more permissive for injecting LOD into texture() instructions
there's other variants of implicit lod sampling, and none of them are valid
outside fragment stage

Fixes: 3ad06b6949 ("zink: always use explicit lod for texture() when legal in non-fragment stages")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13585>
2021-10-29 19:05:07 +00:00
Marek Olšák 8bfa146b80 radeonsi: print the border color error message only once
Cc: 21.2 21.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13590>
2021-10-29 12:33:55 +00:00
Samuel Pitoiset 1776d741c5 zink: add CI lists and deqp-suite configuration for RADV
This is used by our local CI (ie. vk-cts-image) which is a separate
project outside of Mesa. We use it for testing RADV since a while.

The CI lists have been created against Navi2x (Sienna Cichlid).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13573>
2021-10-29 08:28:02 +00:00
Marek Olšák c494cfb1dd radeonsi: don't invoke si_decompress_depth if textures are not dirty at binding
This eliminates the overhead of invoking si_decompress_depth.

The complication here is that we need to update needs_depth_decompress_mask
every time we update dirty_level_mask.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13492>
2021-10-29 07:14:33 +00:00
Marek Olšák 107bc76882 winsys/amdgpu: remove an amdgpu_cs dereference from amdgpu_cs_add_buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák 61bd8ec043 gallium/radeon: merge BO read/write usage flags with priority flags
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák 90ff5ef5c0 gallium/radeon: remove unused RADEON_DEPENDENCY_START_FENCE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák b5cf0d118c gallium/radeon: remove/merge some BO priorities and remove holes
The upper bits will be used by RADEON_USAGE_*

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák f815009036 gallium/radeon: change the BO priority definitions to bits
This is for the next microoptimization.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák a0f05a5b20 radeonsi: remove unused parameters in si_emit_draw_packets
This is a leftover from GS fast launch and compute-based culling.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13539>
2021-10-29 06:33:29 +00:00
Marek Olšák 98f696c972 radeonsi: enable shader culling for indirect draws
It was mistakenly disabled, decreasing performance a lot.

Only valid for Mesa 21.3.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: 21.3 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13539>
2021-10-29 06:33:29 +00:00
Boyuan Zhang ed5d7987dc radeon/vcn: combine session init func
Combine the session init function for h.264 and hevc to reduce redundancy.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:15 +00:00
Boyuan Zhang ced5a54c13 radeon/vcn: combine encode params func
Combine the encode params function for h.264 and hevc to reduce redundancy.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:15 +00:00
Boyuan Zhang 49fff27d46 radeon/vcn: remove redundancy for vcn2 enc
Remove redundancy functions for vcn2 encode. Re-using the vcn1 quality params
function as a result.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:15 +00:00
Boyuan Zhang 4abc6d64e7 radeon/vcn: update vcn2 enc interface
Add missing parameters according to vcn 2 encode interface.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:14 +00:00
Boyuan Zhang 299097d17b radeon/vcn: update vcn1 enc interface
Update vcn 1 encode interface, upgrade interface minor version from 2 to 9,
and add necessary parameters accordingly.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:14 +00:00
Emma Anholt 8fb850651c ci: Enable testing radeonsi's libva using libva-util unit tests.
We've noticed issues with these tests when uprevving Mesa in Chrome OS.
This CI catches some existing failures, and some debug-build assertion
failures as well.

To do this, uprev deqp-runner for its new gtest-runner command.  This
runner is not as efficient as I would hope, due to some expensive code in
gtest.  I've reported the issue to gtest and it should be easily fixable,
but for now it at least means we get to use the same baseline/skip/flake
handling we have from deqp and piglit runners.

I also fixed build-libdrm for our rootfses to not throw away libdrm's
share directory, which was causing a bunch of test-time spam from radeon's
libdrm when trying to look up its marketing name tables (not that big of a
deal for deqp-runner, but really noisy for piglit and libva-utils which
make gallium screens approximatly per-test).

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13419>
2021-10-28 23:17:19 +00:00
Connor Abbott e6ae0e9b95 freedreno/a6xx: Emit GRAS_LRZ_MRT_BUF_INFO_0
Analogous to the previous commit, this fixes the case where turnip sets
this reg to a media (yuv) format and then a gallium job is run next.

Fixes: 9c895e13 ("tu: Emit GRAS_LRZ_MRT_BUF_INFO_0")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13578>
2021-10-28 22:19:09 +00:00
Kenneth Graunke d9decdb2c4 crocus: Fix MOCS for buffer copies.
We were passing a MOCS of 0, which is uncached.  Yikes.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke dc29e9dbb3 crocus: Set MOCS for 3DSTATE_SO_BUFFERS on Gfx7.x too
For some reason we were only setting this on Gfx8+.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 72ffcd1965 crocus: Set MOCS for push constant buffers where possible
We apparently were not setting MOCS for 3DSTATE_CONSTANT_XS at all.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 798cc4be1b crocus: Set default MOCS for NULL depth/stencil/HiZ buffers
isl now uses info->mocs regardless of whether there's any actual
depth/stencil/HiZ buffers involved, so pass it a legitimate one,
rather than zero.  When we have entirely NULL surfaces, we just
default to the MOCS value for an internal buffer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 737b3fae73 crocus: Set MOCS on NULL stream output buffers
We'd like to add safeguards against accidental use of MOCS 0 (uncached),
which can have large performance implications.  One case where we use
MOCS of 0 is disabled stream output targets,  MOCS shouldn't matter, as
there's no actual buffer to be cached.

That said, it should be harmless to set MOCS for these null stream
output buffers; we can just assume a MOCS for generic internal buffers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke de99b5502b crocus: Set MOCS for index buffers on Gen6+
For some reason we were only setting them on Gen8+.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke be0d22a9ce crocus: Tidy the ifdefs for emitting STATE_BASE_ADDRESS
This reorganizes the code so that we set fields in a tidy order:

   1. Set the base addresses

   2. Set either buffer sizes (Gfx8) or upper bound values (Gfx4-7)
      (These are logically the same thing, but expressed differently.)

   3. Set MOCS (Gfx6+)

I find this easier to follow.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 51f843ad60 crocus: Set MOCS for most state base addresses on pre-Gen8
We were only setting MOCS for dynamic state, surface state, instruction,
and indirect base addresses on Gen8+.  We should set them on Gen6+.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke d8cb76211c iris: Fix MOCS for buffer copies
We were passing a MOCS of 0, which is uncached.  Yikes.

Fixes: c5b22441f1 ("iris: Fix buffer -> buffer copy_region")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 256d48eb8c iris: Set MOCS on NULL stream output buffers
We'd like to add safeguards against accidental use of MOCS 0 (uncached),
which can have large performance implications.  One case where we use
MOCS of 0 is disabled stream output targets,  MOCS shouldn't matter, as
there's no actual buffer to be cached.

That said, it should be harmless to set MOCS for these null stream
output buffers; we can just assume a MOCS for generic internal buffers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke d8e1d0fecc iris: Set MOCS on NULL vertex buffers
We'd like to add safeguards against accidental use of MOCS 0 (uncached),
which can have large performance implications.  One case where we use
MOCS of 0 is 3DSTATE_VERTEX_BUFFERS where we set NullVertexBuffer.
It shouldn't matter here, as there's no actual buffer to be cached.

That said, it should be harmless to set MOCS for null vertex buffers.
We can assume an internal buffer and request isl's vertex buffer MOCS.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 369cd9ae28 iris: Set MOCS on 3DSTATE_CONSTANT_ALL packets that disable all buffers
We'd like to add safeguards against accidental use of MOCS 0 (uncached),
which can have large performance implications.  One case where we missed
setting a non-zero MOCS was in 3DSTATE_CONSTANT_ALL packets which fully
disable all constant buffers.  (If any constant buffer was present, we
would set an actual MOCS value.)

MOCS really shouldn't matter here, as there are no actual constant
buffers to be cached.  That said, it should be harmless to do so, and
we can just assume a generic MOCS for internal buffers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 0544afd2df iris: Set MOCS on 3DSTATE_CONSTANT_XS on Gfx9+
We were leaving this blank due to a Broadwell restriction, causing our
constant buffers to be uncached.  We later fixed this for Gfx12+, but
left Gfx9-11 without a fix.  We should specify one.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 8336054024 iris: Set default MOCS for NULL depth/stencil/HiZ buffers
isl now uses info->mocs regardless of whether there's any actual
depth/stencil/HiZ buffers involved, so pass it a legitimate one,
rather than zero.  When we have entirely NULL surfaces, we just
default to isl's MOCS value for an internal depth buffer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke 0a5e225779 iris: Set Bindless Sampler State MOCS
We don't use bindless sampler states today, but when we do, we'll want
them to have proper MOCS values.  This also avoids asserts in upcoming
patches which enforce that MOCS isn't zero.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke a6690dc1ee iris: Drop unnecessary parenthesis
Trivial.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Filip Gawin 021ec93273 r300: improve precission of linear interpolation
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13554>
2021-10-28 15:23:47 +00:00
shanshengwang 4f4164d62a radeon/vce: Limiting max supported refernce frames to 1 for h264 encoding
VCE currently restricted  max_supported reference frames to 1

Signed-off-by: shanshengwang <shansheng.wang@amd.com>
Suggested-by: Suresh Guttula <suresh.guttula@amd.com>
Acked-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13543>
2021-10-28 13:56:24 +00:00
Mike Blumenkrantz 3ad06b6949 zink: always use explicit lod for texture() when legal in non-fragment stages
implicit lod is something else entirely

fixes #5566

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13563>
2021-10-28 02:32:23 +00:00
Mike Blumenkrantz 4d9fc17ae8 zink: set aspectMask for renderpass2 VkAttachmentReference2 structs
this is otherwise just garbage

fixes #5569

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13561>
2021-10-28 02:16:15 +00:00
Mike Blumenkrantz c4a513d978 zink: use align64 for allocation sizes
avoid 32bit sint overflows

fixes #5568

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13560>
2021-10-28 02:01:43 +00:00
Mike Blumenkrantz 2e9e113b7f zink: cache bo SpvId array types
this cuts down on a truckload of useless new validation spam

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13559>
2021-10-28 01:48:17 +00:00
Mike Blumenkrantz 2de6beaa12 zink: add better handling for CUBE_COMPATIBLE bit
this check was illegal because the usage bits weren't yet populated,
so add another check after usage bits are determined to figure out if
CUBE_COMPATIBLE can be applied

additionally, checking sample counts was never needed since the spec
prohibits CUBE_COMPATIBLE use with multisampling

zink DEBUG: ERR: 'Validation Error: [ VUID-vkGetPhysicalDeviceImageFormatProperties-usage-requiredbitmask ] Object 0: VK_NULL_HANDLE, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x991b3105 | vkGetPhysicalDeviceImageFormatProperties: value of usage must not be 0. The Vulkan spec states: usage must not be 0 (https://www.khronos.org/registry/vulkan/specs/1.2-extensions/html/vkspec.html#VUID-vkGetPhysicalDeviceImageFormatProperties-usage-requiredbitmask)'

Fixes: 71494c4874 ("zink: only mark resources as cube-compatible if supported")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12580>
2021-10-28 00:11:24 +00:00
Emma Anholt bfbc41a9fa ci/piglit-runner: Merge piglit-driver-*.txt files into driver-*.txt.
The test names are definitely unique (deqp has specific prefixes, piglit
uses '@' as a separator instead of '.'), so we can just have a single file
regardless of test type.  Merges the two groups of xfails together so you
can't mix up which file to edit (I certainly have), and so that we don't
need to introduce yet another set of files when we add gtest for libva.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13517>
2021-10-27 20:54:11 +00:00
Emma Anholt 38dff02bfb ci/deqp-runner: Rename the deqp-drivername-*.txt files to drivername-*.txt
We have two testsuites with the same format for fails/flakes/skips files,
and test names that are definitely unique.  As I'm about to add a third
testsuite (gtest for libva-utils), so let's have just one file each for
fails/flakes/skips instead of one per type of testsuite.  This starts the
move with just the bulk rename of deqp.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13517>
2021-10-27 20:54:11 +00:00