Commit Graph

124132 Commits

Author SHA1 Message Date
Erik Faye-Lund 0d2ec80dea zink: hammer in an explicit wait when retrieving buffer contents for reading
this ensures that the buffer returned is synchronized as expected, though
it incurs a significant performance hit and will hopefully be improved in future
patches

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz af2d993535 zink: reset query on-demand when beginning a new query from resume
the current query pool implementation expects queries to be reset at
the time they're initiated, which means queries started at this point
need to also be explicitly reset

the zink_begin_query() function can't be reused here or else the
query will be double-added to the active list, triggering an infinite loop

ref mesa/mesa#3000

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz 3933747d87 zink: fix vkCmdResetQueryPool usage
the final parameter here is the number of queries to reset, not the
index of the last query, meaning that the value passed needs to be
(curr_query + 1) in order to reset the query corresponding to
curr_query

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz ae32a1ed20 zink: flush active queries on destroy and free query object
queries with a valid active_list pointer are likely to still be active,
and vk spec requires them to have completed prior to being destroyed

this isn't completely accurate, as it's currently possible for queries
to remain in the active list while not actually being active, but it
resolves driver crashes that can occur from destroying a stilll-running
query pool object

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz 4592c1d45d zink: add SpvId returns to a couple ntv functions
this is helpful for debugging

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Mike Blumenkrantz 21a7fdf97c zink: explicitly zero some arrays in ntv
just to be safe

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5120>
2020-05-22 13:24:10 +00:00
Pierre-Eric Pelloux-Prayer e75effc629 radeonsi/sdma: remove useless compare
clang warning:
   result of comparison of constant 65536 with expression of type 'uint16_t'
   (aka 'unsigned short') is always true

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
2020-05-22 09:12:18 +02:00
Pierre-Eric Pelloux-Prayer 004ac58509 amdgpu: fix unitialized variable
clang warning:
    variable 'va_handle' is used uninitialized whenever 'if' condition is false

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
2020-05-22 09:12:14 +02:00
Pierre-Eric Pelloux-Prayer d92ab0e763 radeonsi: fix inversed arguments in si_test_gds_memory_management
clang warning:
   implicit conversion from enumeration type 'enum radeon_bo_usage'
   to different enumeration type 'enum radeon_bo_domain'

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
2020-05-22 09:12:06 +02:00
Pierre-Eric Pelloux-Prayer dddd91eef3 amd/addrlib: fix forgotten char -> enum conversions
clang warning:
  result of comparison of constant 115 with expression of type
  'const enum Dim' is always false

Fixes: e3e704c7e7 ("amd/addrlib: Use enum instead of sparse chars to identify dimensions")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
2020-05-22 09:11:47 +02:00
Ian Romanick 685e79a64b glsl: Remove integer matrix support from ir_dereference_array::constant_expression_value
It looks like this code has existed since day 1, but I have no idea why.
There have never been integer matrices in GLSL.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5135>
2020-05-21 17:47:08 -07:00
Eric Anholt 22979f90d9 freedreno/a5xx: Define the 2D blit UBWC pitch fields
Syncing up with my changes to envytools for decoding texturator output.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Eric Anholt 6a154aea0d freedreno/a5xx: Set MIN_LAYERSZ on 3D textures like we do on a6xx.
These fields (TILE_ALL and MIN_LAYERSZ) seem to be the same on a5xx as
a6xx, having looked at some UBWC vs non-UBWC texturator cases.  Setting
MIN_LAYERSZ does fix the 3D fail we see in the CTS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Eric Anholt 9f62566ef6 freedreno/a5xx: Add the outline of a unit test for a5xx layout.
Includes a few 3D cases from CTS layouts (since I was looking at CTS
failures) which do justify that a5xx's 3D layout workaround is actually
different from a6xx's.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Eric Anholt e7003df717 freedreno/fdl: Separate the list of a6xx testcases from the the test code.
I'll be reusing the test code for a5xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Eric Anholt a1a739995b freedreno/a5xx: Move resource layout to fdl.
I'm working on fixing the 3D layouts in CI so we can stabilize it, but I
wanted unit tests using the texturator scripts to make sure I don't break
things.  This also makes a5xx and a6xx layout easily comparable again.

This is a straightforward move of the code with prsc references replaced
by arguments in the style of fdl6.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5127>
2020-05-21 17:09:42 -07:00
Alyssa Rosenzweig e85b6c4ab1 pan/mdg: Eliminate remaining divisions from compiler
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig 2b9f6d30f8 pan/mdg: Avoid division in printing helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig 4f5b3802dc pan/mdg: Eliminate 64-bit swizzle packing division
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig 28a750c5f2 pan/mdg: Eliminate expand_writemask division
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig c6c906ecdf pan/mdg: Cleanup comments that look like division
Don't use a /.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5154>
2020-05-21 18:29:53 -04:00
Alyssa Rosenzweig 55da8bcede panfrost: Fix transform feedback types
Don't assume float for everything.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5152>
2020-05-21 20:17:52 +00:00
Alyssa Rosenzweig ef57325fba panfrost: Don't set CAN_DISCARD for MFBD
It's likely harmless but let's match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:50:18 -04:00
Alyssa Rosenzweig 1085f74239 panfrost: Avoid redundant shader executions with mask=0x0
Only works for a few Midgard GPUs, but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:49:47 -04:00
Alyssa Rosenzweig 3e4e849e6a panfrost: Disable tib read/write when colourmask = 0x0
There might still be Z/S updates so we can't drop the whole shader but
we can shortcircuit the colour pipeline.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:48:53 -04:00
Alyssa Rosenzweig f69b6e9116 panfrost: Remove dated comment about leaks
It's been fixed for a while.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:48:53 -04:00
Alyssa Rosenzweig 6dd11a6dc3 panfrost: Limit blend shader work count
To 8, but later we should go much lower.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 15:48:03 -04:00
Alyssa Rosenzweig b8bd356dff panfrost: Allow tiling on RECT textures
Except for the norm coords bit, they're identical to 2D.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig c41cf03589 panfrost: Allow bpp24 tiling
It's dumb that we have to but it does help RGB8 nontrivially. Alas.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig 48cc608859 panfrost: Don't zero staging buffer for tiling
It's a little less safe but the memset does take time during
initialization. v3d doesn't either, so I think  it's ok.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig 9f2997dad0 panfrost: Don't set PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY
I'm not aware of any reason this might be necessary, let's avoid the
translate.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig 5a4eeb21bf panfrost: Fill in SCALED formats to format table
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig 98fc955c6e panfrost: Remove deadcode
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:32 -04:00
Alyssa Rosenzweig 794c239a99 panfrost: Keep cached BOs mmap'd
It doesn't make sense to munmap/mmap repeatedly; they're mapped GPU-side
anyway. So just munmap on free, which will happen in low-mem regardless.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5124>
2020-05-21 14:43:31 -04:00
Alyssa Rosenzweig 485ec76108 panfrost: Guard experimental fp16 behind debug flag
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig e6293425bf pan/mdg: Pack 8-bit swizzles in 16-bit ops
Let's inch closer to 8-bit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig ca48143ec4 pan/mdg: Implement condense_writemask for 8-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig f768cb04ed pan/mdg: Implement vector constant printing for 8-bit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig 28201af080 pan/mdg: Use shifts instead of division for RA sizes
We're only dealing with powers-of-two, so this eliminates potential
issues with divisions-by-zero that are otherwise hacked around. Probably
faster too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig 3d435b334b pan/mdg: Pack barriers correctly
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig fde1f2b7cb pan/mdg: Fix type checking issues with compute
SSBO and barriers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig 4e4c9f5f5a pan/mdg: Separately pack constants to the upper half
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig d475d19f09 pan/mdg: Only combine 16-bit constants to lower half
We can't swizzle both halves simultaneously.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig 8b4e278628 pan/mdg: Factor out mir_adjust_constant
Each source is semi-independent, we don't need the extra indentation
when the logic is already so complex.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig b833702cc1 pan/mdg: Print constant vectors less wrong
For !32-bit types, we need to pay attention to rep_low/high/half to
determine the effective swizzle.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig cd26bd9425 pan/mdg: Round up bytemasks when spilling
So we can pack the spills for <32-bit types.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig 68d2a889b7 pan/mdg: Print mask when dest=0
Forgot this convention differs from Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig 553c2cf16b pan/mdg: Set RA bounds for fp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig b91d71597e pan/mdg: Eliminate load_64
It can always be inferred from the types.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00
Alyssa Rosenzweig 1ff2cabe87 pan/mdg: Use type size to determine alignment
Generally, f16 needs to be aligned to 16-bit, f32 to 32-bit, ...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
2020-05-21 17:49:14 +00:00