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pan/mdg: Eliminate load_64 

It can always be inferred from the types.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
This commit is contained in:
Alyssa Rosenzweig 2020-05-11 15:06:53 -04:00 committed by Marge Bot
parent 1ff2cabe87
commit b91d71597e
4 changed files with 3 additions and 11 deletions
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3
src/panfrost/midgard/compiler.h
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@ -164,9 +164,6 @@ typedef struct midgard_instruction {
unsigned nr_dependencies;
BITSET_WORD *dependents;
/* For load/store ops.. force 64-bit destination */
bool load_64;
union {
midgard_load_store_word load_store;
midgard_vector_alu alu;

4
src/panfrost/midgard/midgard_compile.c
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@ -1135,9 +1135,7 @@ mir_set_intr_mask(nir_instr *instr, midgard_instruction *ins, bool is_read)
/* Once we have the NIR mask, we need to normalize to work in 32-bit space */
unsigned bytemask = pan_to_bytemask(dsize, nir_mask);
mir_set_bytemask(ins, bytemask);
if (dsize == 64)
ins->load_64 = true;
ins->dest_type = nir_type_uint | dsize;
}
/* Uniforms and UBOs use a shared code path, as uniforms are just (slightly

3
src/panfrost/midgard/midgard_ra.c
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@ -525,9 +525,6 @@ allocate_registers(compiler_context *ctx, bool *spilled)
(size == 64) ? 3 : /* (1 << 3) = 8-byte */
3; /* 8-bit todo */
if (ins->type == TAG_LOAD_STORE_4 && ins->load_64)
min_alignment[dest] = 3;
/* We don't have a swizzle for the conditional and we don't
* want to muck with the conditional itself, so just force
* alignment for now */

4
src/panfrost/midgard/mir_promote_uniforms.c
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@ -192,12 +192,12 @@ midgard_promote_uniforms(compiler_context *ctx)
needs_move |= BITSET_TEST(special, ins->dest);
if (needs_move) {
unsigned type_size = nir_alu_type_get_type_size(ins->dest_type);
midgard_instruction mov = v_mov(promoted, ins->dest);
if (ins->load_64)
if (type_size == 64)
mov.alu.reg_mode = midgard_reg_mode_64;
unsigned type_size = nir_alu_type_get_type_size(ins->dest_type);
uint16_t rounded = mir_round_bytemask_up(mir_bytemask(ins), type_size);
mir_set_bytemask(&mov, rounded);
mir_insert_instruction_before(ctx, ins, mov);