0907d3ab9c
radeon/vce: add firmware support for ver 53 and up
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All vce firmwares with major version greater than or equal to 53 are supported
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-05-11 14:59:00 -04:00
a7c81a7f67
etnaviv: remove pipe_fence_handle::ctx
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A fence can outlive the ctx it was created from (see glmark2).. etnaviv
doesn't actually need fence->ctx so lets remove it before someone makes
the mistake of assuming it is a valid pointer.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-05-11 18:42:13 +02:00
4e52cb51b5
swr/rast: Thread locked tiles improvement
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- Change tilemgr TILE_ID encoding to use Morton-order (Z-order).
- Change locked tiles set to bitset. Makes clear, set, get much faster.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2018-05-11 11:26:35 -05:00
8238c791dc
swr/rast: Add Builder::GetVectorType()
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Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2018-05-11 11:25:47 -05:00
8cb55dae2e
swr/rast: Prepend the console output with a newline
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It can get jumbled with output from other threads.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2018-05-11 11:25:24 -05:00
db25fcfcde
swr/rast: Add ConcatLists()
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for concatenating lists
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2018-05-11 11:22:57 -05:00
dcaca3c7b3
swr/rast: Add constant initializer for uint64_t
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Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2018-05-11 11:22:17 -05:00
70f0a28b83
swr/rast: Use binner topology to assemble backend attributes
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Previously was using the draw topology, which may change if GS or Tess
are active. Only affected attributes marked with constant interpolation,
which limited the impact.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2018-05-11 11:21:52 -05:00
b3b0f0e0ec
swr/rast: Change formatting
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Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2018-05-11 11:21:22 -05:00
659910eda0
meson: Fix build for egl platform_x11 with dri3
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platform_x11 with dri3 needs inc_loader.
In file included from ../src/egl/drivers/dri2/platform_x11_dri3.c:35:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory
In file included from ../src/egl/drivers/dri2/platform_x11.c:46:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory
In file included from ../src/egl/drivers/dri2/egl_dri2.c:61:0:
../src/egl/drivers/dri2/egl_dri2.h:41:32: fatal error: loader_dri3_helper.h: No such file or directory
Cc: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2018-05-11 17:41:57 +03:00
efc10949cc
radv: move ac_build_if_state on top of radv_nir_to_llvm.c
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These helpers will be needed for future work.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-05-11 12:35:07 +02:00
3a410f0afc
radv: minor cleanups in radv_fill_shader_variant()
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-05-11 12:35:05 +02:00
58272c1ad7
winsys/amdgpu: Destroy dev_hash table when the last winsys is removed.
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Fixes memory leak on module unload.
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-05-10 23:23:50 -04:00
a2e9d9b4c1
ac/gpu_info: add has_read_registers_query
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:40:11 -04:00
9b1fdfc541
ac/gpu_info: add has_2d_tiling
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:40:10 -04:00
d26696283d
ac/gpu_info: add has_sparse_vm_mappings
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:40:08 -04:00
125adc92ad
ac/gpu_info: add has_unaligned_shader_loads
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:40:07 -04:00
8b9694da4b
radeonsi: expose ARB_query_buffer_object on ancient kernels too
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It doesn't use indirect dispatches.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:40:04 -04:00
e9c08bc658
ac/gpu_info: add has_indirect_compute_dispatch
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:40:03 -04:00
64265ac8d5
ac/gpu_info: add kernel_flushes_tc_l2_after_ib
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:40:01 -04:00
14c5a93bfa
ac/gpu_info: add has_format_bc1_through_bc7
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:40:00 -04:00
2bd2c173e8
ac/gpu_info: add has_eqaa_surface_allocator
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:39:58 -04:00
e720cb6135
radeonsi: clean up the reset status query implementation
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:39:57 -04:00
3060f62340
ac/gpu_info: add has_bo_metadata
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:39:56 -04:00
09f1bab483
ac/gpu_info: add si_TA_CS_BC_BASE_ADDR_allowed
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:39:54 -04:00
8b58a14ef7
ac/gpu_info: add htile_cmask_support_1d_tiling
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:39:53 -04:00
b81149e258
ac/gpu_info: add kernel_flushes_hdp_before_ib
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:39:47 -04:00
a969f184cf
radeonsi: add an environment variable that forces EQAA for MSAA allocations
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This is for testing and experiments.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:34:37 -04:00
2309cedf44
radeonsi: set up EQAA image descriptors properly
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:34:36 -04:00
7ac4ef097d
radeonsi: add EQAA SC,DB,CB register programming
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:34:34 -04:00
9d00580e75
radeonsi: support creating EQAA color textures
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:34:32 -04:00
912b0163dc
ac/surface: add EQAA support
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:34:31 -04:00
ee31762ef5
radeonsi: use better sample locations for 8x EQAA
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Verified with the piglit MSAA accuracy test.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:32:57 -04:00
4b6df225f7
radeonsi: improve quality of 16 sample locations
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This results in better 16x and 8x quality when using these locations.
Verified with the piglit MSAA accuracy test.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:29:02 -04:00
01fd543c82
radeonsi: use better sample locations for 4x MSAA
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Discovered by luck. Verified with the piglit MSAA accuracy test.
It also shows that the worst case EQAA 16s4f results in very good 4x MSAA
in the worst case.
Nine might not like these positions, but they are prettier to the eye and
GL doesn't care.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:28:12 -04:00
8d8b71ccfa
radeonsi: reorder sample locations as required by EQAA
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:27:46 -04:00
5769a5ec01
radeonsi: simplify si_get_sample_position
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:33 -04:00
9f456b3a3c
radeonsi: simplify arrays of sample locations
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:33 -04:00
3d70b5beae
radeonsi: set DB_EQAA the same as Vulkan
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These never change, but they only affect EQAA, which isn't implemented.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:33 -04:00
b5ed039325
radeonsi: remove CM_ prefixes
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:33 -04:00
656fd607be
radeonsi: don't update clear color registers if they don't change
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:33 -04:00
835095973d
radeonsi: remove r600_fmask_info
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radeon_surf contains almost everything.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:33 -04:00
bdc3e410f7
ac/surface: unify common legacy and gfx9 fmask fields
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:33 -04:00
9bf3570fed
ac/surface/gfx6: compute FMASK together with the color surface
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instead of invoking FMASK computation separately.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:33 -04:00
276acda835
ac/surface/gfx9: fix a typo in CMASK RB/pipe alignment
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No change in behavior because it's always aligned.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:32 -04:00
6841845b00
ac: set correct LLVM processor names for Raven & Vega12
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:32 -04:00
6f7f10d285
ac: sort raster configs
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:32 -04:00
e7b82a9978
ac: remove 1 RB raster config for Iceland
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Iceland always reports 2 RBs.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:32 -04:00
cb0f5cddcc
ac: move the Fiji kernel workaround for raster config out of the switch
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:32 -04:00
ce954ac6f3
ac: enable both RBs on Kaveri
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This can result in 2x increase in performance on non-harvested Kaveris.
v2: don't do it on radeon
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-05-10 18:26:32 -04:00
Boyuan Zhang
Rob Clark
George Kyriazis
Ville Syrjälä
Samuel Pitoiset
Jan Vesely
Marek Olšák