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radeonsi: reorder sample locations as required by EQAA 

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2018-04-27 21:35:33 -04:00
parent 5769a5ec01
commit 8d8b71ccfa
2 changed files with 98 additions and 59 deletions
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3
src/gallium/drivers/radeonsi/si_state.c
View File

@ -4695,9 +4695,6 @@ static void si_init_config(struct si_context *sctx)
si_pm4_set_reg(pm4, R_008A14_PA_CL_ENHANCE, S_008A14_NUM_CLIP_SEQ(3) |
S_008A14_CLIP_VTX_REORDER_ENA(1));
si_pm4_set_reg(pm4, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 0x76543210);
si_pm4_set_reg(pm4, R_028BD8_PA_SC_CENTROID_PRIORITY_1, 0xfedcba98);
if (!has_clear_state)
si_pm4_set_reg(pm4, R_02882C_PA_SU_PRIM_FILTER_CNTL, 0);

154
src/gallium/drivers/radeonsi/si_state_msaa.c
View File

@ -37,31 +37,83 @@
#define GET_SX(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2)
#define GET_SY(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2 + 1)
/* The following sample ordering is required by EQAA.
*
* Sample 0 is approx. in the top-left quadrant.
* Sample 1 is approx. in the bottom-right quadrant.
*
* Sample 2 is approx. in the bottom-left quadrant.
* Sample 3 is approx. in the top-right quadrant.
* (sample I={2,3} adds more detail to the vicinity of sample I-2)
*
* Sample 4 is approx. in the same quadrant as sample 0. (top-left)
* Sample 5 is approx. in the same quadrant as sample 1. (bottom-right)
* Sample 6 is approx. in the same quadrant as sample 2. (bottom-left)
* Sample 7 is approx. in the same quadrant as sample 3. (top-right)
* (sample I={4,5,6,7} adds more detail to the vicinity of sample I-4)
*
* The next 8 samples add more detail to the vicinity of the previous samples.
* (sample I (I >= 8) adds more detail to the vicinity of sample I-8)
*
* The ordering is specified such that:
* If we take the first 2 samples, we should get good 2x MSAA.
* If we add 2 more samples, we should get good 4x MSAA with the same sample locations.
* If we add 4 more samples, we should get good 8x MSAA with the same sample locations.
* If we add 8 more samples, we should get perfect 16x MSAA with the same sample locations.
*
* The ordering also allows finding samples in the same vicinity.
*
* Group N of 2 samples in the same vicinity in 16x MSAA: {N,N+8}
* Group N of 2 samples in the same vicinity in 8x MSAA: {N,N+4}
* Group N of 2 samples in the same vicinity in 4x MSAA: {N,N+2}
*
* Groups of 4 samples in the same vicinity in 16x MSAA:
* Top left: {0,4,8,12}
* Bottom right: {1,5,9,13}
* Bottom left: {2,6,10,14}
* Top right: {3,7,11,15}
*
* Groups of 4 samples in the same vicinity in 8x MSAA:
* Left half: {0,2,4,6}
* Right half: {1,3,5,7}
*
* Groups of 8 samples in the same vicinity in 16x MSAA:
* Left half: {0,2,4,6,8,10,12,14}
* Right half: {1,3,5,7,9,11,13,15}
*/
/* 1x MSAA */
static const uint32_t sample_locs_1x =
FILL_SREG( 0, 0, 0, 0, 0, 0, 0, 0); /* S1, S2, S3 fields are not used by 1x */
static const uint64_t centroid_priority_1x = 0x0000000000000000ull;
/* 2x MSAA */
static const uint32_t sample_locs_2x =
FILL_SREG(4, 4, -4, -4, 0, 0, 0, 0); /* S2 & S3 fields are not used by 2x MSAA */
FILL_SREG(-4,-4, 4, 4, 0, 0, 0, 0); /* S2 & S3 fields are not used by 2x MSAA */
static const uint64_t centroid_priority_2x = 0x1010101010101010ull;
/* 4xMSAA
* There are 4 locations: (-2, -6), (6, -2), (-6, 2), (2, 6). */
/* 4x MSAA */
static const uint32_t sample_locs_4x =
FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6);
FILL_SREG(-2,-6, 2, 6, -6, 2, 6,-2);
static const uint64_t centroid_priority_4x = 0x3210321032103210ull;
/* Cayman 8xMSAA */
/* 8x MSAA */
static const uint32_t sample_locs_8x[] = {
FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
FILL_SREG(-3,-5, 5, 1, -5, 5, 7,-7),
FILL_SREG(-7,-1, 3, 7, -1, 3, 1,-3),
FILL_SREG( 0, 0, 0, 0, 0, 0, 0, 0), /* S8, S9 etc. are not used by 8x */
FILL_SREG( 0, 0, 0, 0, 0, 0, 0, 0),
};
/* Cayman 16xMSAA */
static const uint64_t centroid_priority_8x = 0x3542017635420176ull;
/* 16x MSAA */
static const uint32_t sample_locs_16x[] = {
FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1),
FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5),
FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4),
FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8),
FILL_SREG(-5,-2, 5, 3, -2, 6, 3,-5),
FILL_SREG(-7,-8, 1, 1, -6, 4, 7,-4),
FILL_SREG(-1,-3, 6, 7, -3, 2, 0,-7),
FILL_SREG(-4,-6, 2, 5, -8, 0, 4,-1),
};
static const uint64_t centroid_priority_16x = 0x497ec6b231d0fa85ull;
static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
unsigned sample_index, float *out_value)
@ -91,63 +143,53 @@ static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_cou
out_value[1] = (GET_SY(sample_locs, sample_index) + 8) / 16.0f;
}
static void si_emit_max_4_sample_locs(struct radeon_winsys_cs *cs,
uint64_t centroid_priority,
uint32_t sample_locs)
{
radeon_set_context_reg_seq(cs, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2);
radeon_emit(cs, centroid_priority);
radeon_emit(cs, centroid_priority >> 32);
radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs);
radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs);
radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs);
radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs);
}
static void si_emit_max_16_sample_locs(struct radeon_winsys_cs *cs,
uint64_t centroid_priority,
const uint32_t *sample_locs,
unsigned num_samples)
{
radeon_set_context_reg_seq(cs, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2);
radeon_emit(cs, centroid_priority);
radeon_emit(cs, centroid_priority >> 32);
radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0,
num_samples == 8 ? 14 : 16);
radeon_emit_array(cs, sample_locs, 4);
radeon_emit_array(cs, sample_locs, 4);
radeon_emit_array(cs, sample_locs, 4);
radeon_emit_array(cs, sample_locs, num_samples == 8 ? 2 : 4);
}
void si_emit_sample_locations(struct radeon_winsys_cs *cs, int nr_samples)
{
switch (nr_samples) {
default:
case 1:
radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0);
radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0);
radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0);
radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0);
si_emit_max_4_sample_locs(cs, centroid_priority_1x, sample_locs_1x);
break;
case 2:
radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x);
radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x);
radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x);
radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x);
si_emit_max_4_sample_locs(cs, centroid_priority_2x, sample_locs_2x);
break;
case 4:
radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x);
radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x);
radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x);
radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x);
si_emit_max_4_sample_locs(cs, centroid_priority_4x, sample_locs_4x);
break;
case 8:
radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);
radeon_emit(cs, sample_locs_8x[0]);
radeon_emit(cs, sample_locs_8x[1]);
radeon_emit(cs, 0);
radeon_emit(cs, 0);
radeon_emit(cs, sample_locs_8x[0]);
radeon_emit(cs, sample_locs_8x[1]);
radeon_emit(cs, 0);
radeon_emit(cs, 0);
radeon_emit(cs, sample_locs_8x[0]);
radeon_emit(cs, sample_locs_8x[1]);
radeon_emit(cs, 0);
radeon_emit(cs, 0);
radeon_emit(cs, sample_locs_8x[0]);
radeon_emit(cs, sample_locs_8x[1]);
si_emit_max_16_sample_locs(cs, centroid_priority_8x, sample_locs_8x, 8);
break;
case 16:
radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16);
radeon_emit(cs, sample_locs_16x[0]);
radeon_emit(cs, sample_locs_16x[1]);
radeon_emit(cs, sample_locs_16x[2]);
radeon_emit(cs, sample_locs_16x[3]);
radeon_emit(cs, sample_locs_16x[0]);
radeon_emit(cs, sample_locs_16x[1]);
radeon_emit(cs, sample_locs_16x[2]);
radeon_emit(cs, sample_locs_16x[3]);
radeon_emit(cs, sample_locs_16x[0]);
radeon_emit(cs, sample_locs_16x[1]);
radeon_emit(cs, sample_locs_16x[2]);
radeon_emit(cs, sample_locs_16x[3]);
radeon_emit(cs, sample_locs_16x[0]);
radeon_emit(cs, sample_locs_16x[1]);
radeon_emit(cs, sample_locs_16x[2]);
radeon_emit(cs, sample_locs_16x[3]);
si_emit_max_16_sample_locs(cs, centroid_priority_16x, sample_locs_16x, 16);
break;
}
}