Commit Graph

1880 Commits

Author SHA1 Message Date
Dave Airlie 0e38db0146 gallium: add a rasterizer state bit for unrestricted depth values.
This tells the drivers to expect depth values outside the 0..1 range.

This is used for support VK_EXT_depth_range_unrestricted, but could
also be used for GL_NV_depth_buffer_float in GL.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17612>
2022-07-28 10:35:04 +10:00
Marek Olšák b2455e1ccb gallium/radeon: require radeon DRM 2.45.0 from April 2016
This removes most non-radeonsi workarounds.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411>
2022-07-27 05:01:38 +00:00
Boyuan Zhang ea9e8e776a vl: add cabac init idc for h264 encode
Add interface to store cabac init idc value.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16113>
2022-07-25 13:17:18 +00:00
Marek Olšák 3e94d498b3 gallium: add pipe_blit_info::dst_sample, update u_blitter to write that sample
A new radeonsi blit test will use it to upload different sample values
into MSAA textures.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17694>
2022-07-23 18:21:31 +00:00
Sil Vilerino d09cf4333c gallium/video: Add video post processing interface
Add process_frame to pipe_video codec
Add new structures/caps for video post-processing with rotation,
flip, alpha blending, crop, and scaling, via the video engine.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>
2022-07-21 22:40:30 +00:00
Sil Vilerino f5ab2ffd4e pipe/video: Add PIPE_VIDEO_ENTRYPOINT_PROCESSING
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>
2022-07-21 22:40:30 +00:00
Jesse Natalie acba2bbb0e gallium, mesa: Support setting timeline semaphore values
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17446>
2022-07-14 03:45:17 +00:00
Jesse Natalie 8cd391a63e gallium: Add a new fence type with a pipe cap to indicate it can be imported
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17446>
2022-07-14 03:45:16 +00:00
Jesse Natalie 7c4fa79bfa gallium: Add 'name' field to Win32 semaphore import
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17446>
2022-07-14 03:45:16 +00:00
Jesse Natalie 91b14d4a77 gallium: Add a 'name' field to winsys_handle
Win32 memory objects can be imported by name (const void *
that will be interpreted as const wchar_t *)

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17446>
2022-07-14 03:45:16 +00:00
Mike Blumenkrantz c4e18cd4dd mesa/st: add PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_FREEDRENO
this is for drivers (like freedreno) which need the format in the sampler
state in order to accurately handle border colors

when set, drivers MAY receive a format in the sampler state if the frontend
supports it (e.g., nine does not), and the cso sampler cache will include
the format member of the struct

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17189>
2022-07-07 20:39:30 +00:00
Timothy Arceri 5f686bfc85 util: add dri config option to disable GL_MAP_UNSYNCHRONIZED_BIT
GL_MAP_UNSYNCHRONIZED_BIT depends on the app having its threading
handled correctly. This allows us to force disable the bit when
they get it wrong.

CC: 22.1 22.0 <mesa-stable>

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17199>
2022-06-24 00:29:24 +00:00
Jason Volk e1488d9374 radeon: Support shared memory user pointers.
The RADEON_GEM_USERPTR_ANONONLY flag is hardcoded here which excludes
shared memory pages. DRM is actually capable of supporting shared file-
backed memory, but only if it's read-only. This mutability intent has to
be conveyed through the stack, so a flags argument is added to the winsys
regime to pass RADEON_FLAG_READ_ONLY.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16115>
2022-06-22 12:23:02 +00:00
Pavel Asyutchenko 41f22a1823 gallium: add PIPE_CAP_FBFETCH_ZS and expose extension
st/mesa will expose GL_ARM_shader_framebuffer_fetch_depth_stencil
if this new capability is supported by the driver.

Signed-off-by: Pavel Asyutchenko <sventeam@yandex.ru>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13979>
2022-06-22 04:32:44 +00:00
Mike Blumenkrantz 371660b877 mesa/st: add PIPE_CAP_DITHERING
this is for drivers like zink that may or may not
handle dithering and so getting blend state changes
when this state changes isn't useful

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17043>
2022-06-18 17:56:28 +00:00
Andres Calderon Jaramillo cd04679a08 mesa/st: Account for YUV color space and range.
This patch plumbs the YUV color space and range provided through
EGL_EXT_image_dma_buf_import all the way to nir_lower_tex().

NIR already accounts for the YUV color space courtesy of commit
d8fdb8da. However, the color space was wired only for i965/i915 (see
6c11a799) and not for Gallium.

Tested-by: Andres Calderon Jaramillo <andrescj@chromium.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16651>
2022-06-17 17:25:44 +00:00
Pierre-Eric Pelloux-Prayer aa58ff191f Revert "winsys/amdgpu: use AMDGPU_IB_FLAG_PREAMBLE for the CS preamble on gfx10+"
This reverts commit 8edafaa25c.

This fixes hangs on Navi21.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17032>
2022-06-15 10:38:04 +00:00
Qiang Yu fd27d5157f gallium: disable hardware select for crocus
piglit select tests fail, so add a gallium cap to disable
for crocus explicitly.

crocus may choose to enable hardware select only for GPU
SKU which tested to be OK again.

Fixes: 6489af145c ("mesa: enable HardwareAcceleratedSelect")
Closes: #6644

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16955>
2022-06-15 03:01:58 +00:00
Erik Faye-Lund 8fbad5e42f gallium: clean up PIPE_ALIGN_STACK-definition
There's really just one case where this is supported; on GCC for x86.
All other cases do nothing, so let's remove the complexity that is no
longer needed.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16908>
2022-06-14 15:08:38 +00:00
Erik Faye-Lund d1349eb500 gallium: remove unused macros
These aren't used, so let's remove them.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16908>
2022-06-14 15:08:38 +00:00
Erik Faye-Lund ea7ba77be9 gallium: remove repeated check
This is already inside an "#if defined(__GNUC__)" conditional, there's no
need to repeat the __GNUC__-check.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16908>
2022-06-14 15:08:38 +00:00
Erik Faye-Lund 3c82e23f9a gallium: reorganize includes
There's no reason to have standard includes in two different sections of
the header, let's merge them. While we're at it, let's sort the includes
as well.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16908>
2022-06-14 15:08:38 +00:00
Erik Faye-Lund d791184b46 gallium: remove stale comment
This hasn't been true for a long time, let's remove the comment.

Fixes: 0d4898ae80 ("include,gallium: Remove pre-MSVC 2013 compatibility.")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16908>
2022-06-14 15:08:37 +00:00
Marek Olšák 8edafaa25c winsys/amdgpu: use AMDGPU_IB_FLAG_PREAMBLE for the CS preamble on gfx10+
This skips the preamble for following IBs if the queue receives IBs from
the same context back-to-back. This eliminates VGT_FLUSH (for tess and
legacy GS) and PS_PARTIAL_FLUSH (for gfx11) in those cases if the preamble
contains them.

v2: only use this on gfx10+ due to stability issues on Stoney and limited
    testing

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Emma Anholt c761f9bde5 gallium: Rename PIPE_CAP_TGSI_LEGACY_MATH_RULES to drop "TGSI"
Now NIR drivers can implement it as well.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16176>
2022-06-10 03:26:33 +00:00
Emma Anholt 76b203eb39 gallium: Rename MUL_ZERO_WINS to LEGACY_MATH_RULES.
This is a clearer name for what it does than MUL_ZERO_WINS, and matches up
to the new name in shader_info.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16176>
2022-06-10 03:26:32 +00:00
Alyssa Rosenzweig e749f67f89 mesa,gallium: Make point coord origin a CAP
When lower_wpos_pntc is used, the state tracker inserts code to
transform gl_PointCoord.y according to a uniform, to account for
API-requested point coordinate origin and framebuffer orientation. With
the transformation, driver-supplied point coordinates are expected to
have an upper left origin.

If the hardware point coordinate supports (only) a lower left origin,
the backend has to use lower_wpos_pntc and then lower *again* to flip
back. This ends up transforming twice, which is wasteful:

   a = load point coord Y with lower left origin
   a' = 1.0 - a
   a'' = uniform_transform(a')

However, lower_wpos_pntc is quite capable of transforming for a lower
left origin too, it just needs to flip the transformation. Add a CAP
specifying the point coordinate origin convention, rather than assuming
upper-left. This simplifies the Asahi code greatly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16829>
2022-06-08 14:10:50 +00:00
Pierre-Eric Pelloux-Prayer 8c07d7cbdd gallium: add size attribute to winsys_handle
This is needed at least for the VA-API frontend where the exporter
needs to know the total size of the object.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16813>
2022-06-08 09:42:42 +02:00
Pierre-Eric Pelloux-Prayer baf0e66dae gallium: update winsys_handle documentation
The function names are resource_***_handle, not textures_***_handles.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16813>
2022-06-08 09:42:26 +02:00
Marek Olšák ad8f9d5d58 gallium: rename PIPE_CAP_MAX_SHADER_BUFFER_SIZE -> *_UINT
to imply the maximum of 4GB - 1.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881>
2022-06-07 00:17:58 -04:00
Marek Olšák fd6b8999d7 gallium: rename PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE->MAX_TEXEL_BUFFER_ELEMENTS_UINT
to allow exposing 4G - 1. The "SIZE" was also a misnomer because it meant
elements. This no longer clamps the size to INT_MAX in st/mesa.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881>
2022-06-07 00:17:58 -04:00
Marek Olšák dc4a3a18e9 gallium: add PIPE_CAP_MAX_CONSTANT_BUFFER_SIZE_UINT for UBOs
We plan to report UINT32_MAX for UBOs.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881>
2022-06-07 00:17:57 -04:00
Marek Olšák 406cf871b2 gallium: rename PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE to *_BUFFER0_*
UBOs will use a larger limit.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881>
2022-06-07 00:17:57 -04:00
Emma Anholt 8c4b88ee48 gallium+glsl: Remove EmitNoSat/PIPE_CAP_VERTEX_SHADER_SATURATE
The drivers not setting it were:

- nv30, which gets lowering using NIR's lower_fsat flag.
- r300, which gets lowering using NIR's lower_fsat flag.
- a2xx, which has was getting it optimized back to fsat anyway.

This drops the check for the cap from gallium nine.  While nine does have
a non-nir path, I think it's safe to assume that if you have SM3
texturing, you can do fsat.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823>
2022-06-07 02:38:42 +00:00
Timothy Arceri 26ff49038c gallium: remove PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT CAP
This is used for the old, buggy and slow GLSL IR loop unrolling
code. All drivers have now switched to the NIR unrolling code so
here we remove the CAP.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16366>
2022-06-04 16:11:49 +00:00
Erik Faye-Lund beaa26bd75 gallium: remove needless c99_compat.h includes
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16812>
2022-06-02 13:09:16 +00:00
Vlad Zahorodnii f4de4453cf winsys/amdgpu-radeon: Allow specifying context priority
This is needed to implement EGL_IMG_context_priority in radeonsi.

Signed-off-by: Vlad Zahorodnii <vlad.zahorodnii@kde.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16594>
2022-05-25 14:15:30 +00:00
Italo Nicola b634030542 tgsi: Add SEPARABLE_PROGRAM property
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16308>
2022-05-24 11:41:03 +00:00
Sil Vilerino b566938644 gallium: Add MinLumaBiPredSize8x8 to pipe_h264_sps, pic_init_qs_minus26 to pipe_h264_pps
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16286>
2022-05-17 21:02:25 +00:00
Sil Vilerino d2871e40e0 gallium radeon/r600/omx/va: Adds support for multiple reference encoding
gallium: pipe_h264_enc_picture_desc: ref_idx_lx to ref_idx_lx_list[32], add num_ref_idx_lx_active_minus1
gallium radeon/r600: Change usage of ref_idx_lx to ref_idx_lx_list
gallium omx: Fill out ref_idx_lx_list, num_ref_idx_lx_active_minus1
gallium va: Add support for multiple references encoding

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16286>
2022-05-17 21:02:25 +00:00
Sil Vilerino 504b02f3fa gallium: Add multiple slice support to pipe_h264_enc_picture_desc
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16286>
2022-05-17 21:02:25 +00:00
Sil Vilerino e1f2db7527 gallium: Add values to pipe_video_cap for multi-slice and multi-reference encode
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16286>
2022-05-17 21:02:25 +00:00
Sil Vilerino 15540abf22 gallium/va/radeonsi: Using private as a parameter name conflicts with C++ keywords
Reviewed-by: Leo Liu <leo.liu@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16286>
2022-05-17 21:02:25 +00:00
Marek Olšák 1fdc3b0fde radeonsi: move CS preamble emission into the winsys
The preamble will be skipped by the kernel if there is no context switch.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16509>
2022-05-17 10:27:04 +00:00
Marek Olšák 0755d02456 radeonsi: use AMDGPU_VM_PAGE_NOALLOC to disable MALL (infinity cache)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>
2022-05-16 07:03:39 -04:00
Marek Olšák e9e9086b66 radeonsi: use the new flag AMDGPU_GEM_CREATE_DISCARDABLE
It forces the best placement (usually VRAM) and evictions discard the contents
instead of copying.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>
2022-05-16 07:03:39 -04:00
Marek Olšák d21be64b3a winsys/amdgpu: handle RADEON_FLAG_ENCRYPTED as a heap modifier
so that we don't need custom code for encrypted allocations

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>
2022-05-16 07:03:37 -04:00
Marek Olšák 593f72aa21 winsys/amdgpu-radeon: rework how we describe heaps
It was getting difficult to add more heaps.

This adds more heaps because more flag combinations are legal now.
Invalid flag combinations are also handled better.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>
2022-05-16 07:03:37 -04:00
Marek Olšák ceddd7d49a radeonsi: rename RADEON_FLAG_UNCACHED -> RADEON_FLAG_GL2_BYPASS
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>
2022-05-16 07:03:36 -04:00
Sidney Just f98d47e011 gallium: support for implementing EXT_external_objects_win32
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15504>
2022-05-15 19:56:49 +00:00