Commit Graph

157427 Commits

Author SHA1 Message Date
Yonggang Luo df242a2c06 auxiliary: Remove pipe_tsd
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:12 +00:00
Yonggang Luo af1fe5c2c8 glx: Remove usage of pipe_tsd_set and pipe_tsd_get
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:12 +00:00
Yonggang Luo 6af5cadef9 meson: Remove pre_args += '-DUSE_ELF_TLS'
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:12 +00:00
Yonggang Luo 365253605a util: Remove usage of USE_ELF_TLS in u_thread.h
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:12 +00:00
Yonggang Luo aa0b857544 glx: Remove usage of USE_ELF_TLS
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:12 +00:00
Yonggang Luo a055f285f5 loader: Remove usage of USE_ELF_TLS in loader.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:12 +00:00
Yonggang Luo 62a68481fa mapi: Remove usage of USE_ELF_TLS
After commit c47fd3dc00 ("windows: Use TLS context/dispatch with shared-glapi")
USE_ELF_TLS are always defined by
pre_args += '-DUSE_ELF_TLS'
So we can remove it safety

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:11 +00:00
Yonggang Luo bf2cd50019 egl: Remove usage of USE_ELF_TLS macro
After commit c47fd3dc00 ("windows: Use TLS context/dispatch with shared-glapi")
USE_ELF_TLS are always defined by
pre_args += '-DUSE_ELF_TLS'
So we can remove it safety

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:11 +00:00
Yonggang Luo c8d296ae4b meson: Remove usage of use_elf_tls
After c47fd3dc00 ("windows: Use TLS context/dispatch with shared-glapi")

use_elf_tls are always setting to true, so we can remove it safety

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:11 +00:00
Yonggang Luo 6bde428c0a mapi: Trim trailing spaces in stub.c and u_current.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17213>
2022-07-29 23:59:11 +00:00
Yiwei Zhang 71a0ae2796 anv: enable VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM for modifier support
This is a missed format to properly support media interop for Android.
Currently only used when layering GL atop Vulkan on Android, but will
be used directly with Vulkan when the platform default renderer has
switched to skiavk in modern Android.

Test: CtsMediaTestCases and CtsVideoTestCases with angle on venus on anv

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17808>
2022-07-29 23:24:15 +00:00
Iván Briano a05fcc94c2 anv: assert inheritance_info is not NULL
Makes some static analysis tools happier.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17809>
2022-07-29 22:50:21 +00:00
Yonggang Luo 1bb92a3178 util: Disable tests/sparse_array_test.cpp on MacOS as it's too slow
[----------] 1 test from SparseArrayTest
[ RUN      ] SparseArrayTest.Multithread
[       OK ] SparseArrayTest.Multithread (105624 ms)
[----------] 1 test from SparseArrayTest (105624 ms total)

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17802>
2022-07-29 21:38:01 +00:00
Mark Janes dc8df485e9 intel/compiler: reorder shader cache keys to minimize padding
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17749>
2022-07-29 20:45:25 +00:00
Mark Janes a4a4aefa03 intel/compiler: pad all data structures used by shader cache keys
When the compiler pads a data structure, the padded bytes will not be
initialized.  Shader keys are compared with memcmp and unitialized
bytes within the structure breaks this mechanism.

Explicitly pad the structures with members, so the compiler is forced
to initialize them.  Add a warning to indicate if a change to
alignment in any of the data structures requires additional padding.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17749>
2022-07-29 20:45:25 +00:00
Mark Janes 3269a9b6a3 iris: reorder to minimize padding
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17749>
2022-07-29 20:45:25 +00:00
Mark Janes e6f6142c9b iris: pad all structures used in a shader key
When the compiler pads a data structure, the padded bytes will not be
initialized.  Shader keys are compared with memcmp and unitialized
bytes within the structure breaks this mechanism.

Explicitly pad the structures with members, so the compiler is forced
to initialize them.  Add a warning to indicate if a change to
alignment in any of the data structures requires additional padding.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17749>
2022-07-29 20:45:25 +00:00
Mark Janes b15d0a11a4 util: define helpful macros for compiler diagnostic features
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17749>
2022-07-29 20:45:25 +00:00
Mike Blumenkrantz e5c50ed2d4 nine: set view_mask=0
nine doesn't use viewids, and this breaks drivers that support it

cc: mesa-stable

Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17792>
2022-07-29 19:42:45 +00:00
Mike Blumenkrantz 079857720b d3dadapter: fix sw pipe loading
this needs to check the env var in order to work correctly

cc: mesa-stable

Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17792>
2022-07-29 19:42:45 +00:00
Mike Blumenkrantz f153ae75db virgl: more ci flakes
I guess nobody is watching these?

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17806>
2022-07-29 19:31:03 +00:00
Alejandro Piñeiro 106b33405e vc4/v3d: stop adding NORAST when SHADERDB debug option is used
Right now if we use the option SHADERDB, NORAST is added
automatically. There's no comment justifying it, neither a lot of info
on the commits that added that. But I guess that the purpose is that
SHADERDB option is assumed to be used only to gather shader-db stats,
so setting setting NORAST would allow to get those dumps faster.

But adding debug options automatically can be confusing, as we could
get a behaviour that we were not expecting. At least I needed to check
why using SHADERDB was getting a black screen. And if we want to get
this behaviour, we can easily add manually the NORAST.

Finally, v3dv doesn't support NORAST right now (and we don't have
immediate plans to implement it), so it is somewhat inconsistent to
get different behaviour from the same debug option from the two
drivers.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17788>
2022-07-29 18:29:34 +00:00
Chia-I Wu 6929ccedff turnip: shared_consts and push_consts are mutually exclusive
Skip gather_push_constants when shared consts are enabled.  This makes
sure push_consts is only zero-initialized, and reserved_user_consts is
0.  This saves some space in the const file.

This change also adds a few asserts and a comment to
lower_load_push_constant.  Because shared consts share the same range
for all stages, we should not apply per-stage offsets in
lower_load_push_constant.  It worked because nir_lower_explicit_io
always sets base to 0 for nir_var_mem_push_const and
shader->push_consts.lo was always 0 for all stages.

Fixes: 0c787d57e6 ("tu: increase maxPushConstantsSize to 256.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17777>
2022-07-29 16:22:43 +00:00
Chia-I Wu 562e5ba286 turnip: remove shared_consts from tu_compiled_shaders
It is set but unused.  We also don't serialize/deserialize shared_consts
to/from the pipeline cache.

Fixes: e1f2cabc5e ("turnip: Change to use shared consts for PushConstants")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17777>
2022-07-29 16:22:43 +00:00
Yonggang Luo ae2947fbc5 ci: Building osmesa on OSX
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Yonggang Luo 6544cf4a2a dri: Trim trailing space in dri/dri_util.*
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Yonggang Luo 9caa6bb71a glx: Convert tab to space in applegl_glx.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Yonggang Luo 73c51b5c57 util: thread_local doesn't support to be exported on OSX
The linkage error is:
Undefined symbols for architecture x86_64:
  "thread-local wrapper routine for _glapi_tls_Context", referenced from:
      __mesa_GetActiveUniform_impl in libmesa.a(main_uniform_query.cpp.o)

Fixes: a9e2c699aa ("util/c11: Update function u_thread_create to be c11 conformance")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6756

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Yonggang Luo 7d35d560ac glx: __glX_tls_Context should use __THREAD_INITIAL_EXEC
Error message on OSX:
../src/glx/tests/fake_glx_screen.cpp:101:20: error: thread-local declaration of '__glX_tls_Context' with dynamic initialization follows declaration with static initialization
thread_local void *__glX_tls_Context = &dummyContext;
                   ^
../src/glx/glxclient.h:655:36: note: previous declaration is here
extern __THREAD_INITIAL_EXEC void *__glX_tls_Context;

Fixes: be00a7c8ac ("glx: using C++11 keyword thread_local")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Yonggang Luo 14bbfee3bc gallium: Disable dri2 interface on OSX
Error message:
Undefined symbols for architecture x86_64:
  "_dri_kms_driver_extensions", referenced from:
      _swkmsCreateNewScreen in libdri.a(dri_util.c.o)
  "_galliumdrm_driver_extensions", referenced from:
      _dri2CreateNewScreen in libdri.a(dri_util.c.o)
ld: symbol(s) not found for architecture x86_64

Fixes: b6f7a4836a ("dri: Fill in the driver extensions for the legacy createNewScreen paths")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6519

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Yonggang Luo 48e72da0dd gallium: Rename macros HAVE_PIPE_LOADER*
Rename macro HAVE_PIPE_LOADER_DRI to HAVE_DRI
Rename macro HAVE_PIPE_LOADER_KMS to HAVE_DRISW_KMS

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Yonggang Luo 98fa0c3351 gallium: Do not call to pipe_loader_sw_probe_kms when not present
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Yonggang Luo 34572042c7 gallium: Move -DHAVE_PIPE_LOADER_DRI and -DHAVE_PIPE_LOADER_KMS to be pre_args
There is non pipe-loader source code depends on it.
After doing this, we found that shared library pipe_swrast depends on libswdri
The error message is:
src/gallium/targets/pipe-loader/pipe_swrast.so.p/pipe_swrast.c.o:pipe_swrast.c:swrast_driver_descriptor: error: undefined reference to 'dri_create_sw_winsys'
src/gallium/targets/pipe-loader/pipe_swrast.so.p/pipe_swrast.c.o:pipe_swrast.c:swrast_driver_descriptor: error: undefined reference to 'kms_dri_create_winsys'

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17784>
2022-07-29 12:57:26 +00:00
Eric Engestrom 155c8bc964 ci: add `--print-errorlogs` to `meson test`
In order to avoid having to dig through artifacts to see what failed.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17804>
2022-07-29 12:06:13 +00:00
Karmjit Mahil 661440717a pvr: Fix cdm shared reg usage reported to fw.
For context switching we need to keep track of the max shared regs
used and report that to the fw.

Reported-by: Rajnesh Kanwal rajnesh.kanwal@imgtec.com
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17683>
2022-07-29 11:37:06 +00:00
Karmjit Mahil e1a0432dd2 pvr: Add compute pipeline barrier handling.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17683>
2022-07-29 11:37:06 +00:00
Karmjit Mahil b92c40d40a pvr: Add IDF/WDF program for compute pipeline barrier.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17683>
2022-07-29 11:37:05 +00:00
Karmjit Mahil 6d672e0336 pvr: Add initial vkCmdPipelineBarrier skeleton.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17683>
2022-07-29 11:37:05 +00:00
Karmjit Mahil c70924b20e pvr: Add static consts to hard coding infra.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17681>
2022-07-29 11:21:08 +01:00
Karmjit Mahil a278f7d21e pvr: Add static consts support in descriptor pds program.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17681>
2022-07-29 11:21:04 +01:00
Karmjit Mahil a4830eec53 pvr: Rename uniform pds program to descriptor pds program.
The program will handle more than just DMAing uniforms so renaming
it. E.g. it will handle push constants and compile time static
constants.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17681>
2022-07-29 11:20:53 +01:00
Eric Engestrom 438d5baa36 turnip: expose support for VK_EXT_acquire_drm_display
Turnip supports VK_EXT_direct_mode_display and can use the common
implementation of AcquireDrmDisplayEXT() & GetDrmDisplayEXT() (which use
wsi->can_present_on_device() that turnip implements).

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17768>
2022-07-29 07:49:47 +00:00
Dylan Baker 42b89276e6 iris|anv: gfx version 12.5 data cache flush is not a workaround
This was not a workaround, it was simply missing from the documentation.
So remove the workaround language.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17797>
2022-07-28 22:08:46 +00:00
Dylan Baker 180af73101 anv: add gfx version 12.5 flushes to CCS path
This was already added to the MCS path in !17218, so this is just
adding it in the CCS path as well.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17797>
2022-07-28 22:08:46 +00:00
Kenneth Graunke fc02ce5713 intel/eu: Mark header present in URB memory fences on XeHP
Fixes the following EU validation error:

   ERROR: Header must be present for all URB messages.

The message header is ignored for URB fence messages, so I doubt that
this actually matters in practice.  But we should probably mark it as
present, because you have to send something, and according to the
documentation, there is a message header, it's just ignored.

Fixes: e6a9501aa2 ("intel/fs: Add the URB fence message")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17624>
2022-07-28 21:31:45 +00:00
Kenneth Graunke 986b49a56d intel/eu: Clarify spec citations for XeHP region restrictions
When this rule started causing issues, I looked it up in the
documentation, and found the rule for 64-bit destinations and
integer DWord multiplication, but there was no mention of floating
point destinations, as the text in brackets suggested.  The actual
restriction text had been updated, so this led to some confusion
where I thought the conditions had been changed in newer docs.

However, what's actually going on is that there are two separate
conditions, each listed in separate rows of the table.  One lists
64-bit destinations or integer DWord multiplication, and the other
mentions floating-point destinations.  In both cases, the actual
restrictions are identical, so we handle them together in the code.

Try to update the comment to avoid future confusion.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17624>
2022-07-28 21:31:45 +00:00
Kenneth Graunke 5c88488a64 intel/eu: Fix XeHP register region validation for hstride == 0
Recently, we started using <1;1,0> register regions for consecutive
channels, rather than the <8;8,1> we've traditionally used, as the
<1;1,0> encoding can be compacted on XeHP.  Since then, one of the
EU validator rules has been flagging tons of instructions as errors:

   mov(16)   g114<1>F   g112<1,1,0>UD   { align1 1H I@2 compacted };
   ERROR: Register Regioning patterns where register data bit locations are changed between source and destination are not supported except for broadcast of a scalar.

Our code for this restriction checked three things:

   #1: vstride != width * hstride ||
   #2: src_stride != dst_stride ||
   #3: subreg != dst_subreg

Destination regions are always linear (no replicated values, nor
any overlapping components), as they only have hstride.  Rule #1 is
requiring that the source region be linear as well.  Rules #2-3 are
straightforward: the subregister must match (for the first channel to
line up), and the source/destination strides must match (for any
subsequent channels to line up).

Unfortunately, rules #1-2 weren't working when horizontal stride was 0.
In that case, regions are linear if width == 1, and the stride between
consecutive channels is given by vertical stride instead.

So we adjust our src_stride calculation from

   src_stride = hstride * type_size;

to:

   src_stride = (hstride ? hstride : vstride) * type_size;

and adjust rule #1 to allow hstride == 0 as long as width == 1.

While here, we also update the text of the rule to match the latest
documentation, which apparently clarifies that it's the location of
the LSB of the channel which matters.

Fixes: 3f50dde8b3 ("intel/eu: Teach EU validator about FP/DP pipeline regioning restrictions.")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17624>
2022-07-28 21:31:45 +00:00
Jason Ekstrand 0772242feb intel/eu: Don't throw validation errors on float MOV_INDIRECT
Fixes: 3f50dde8b3 ("intel/eu: Teach EU validator about FP/DP pipeline regioning restrictions.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17624>
2022-07-28 21:31:45 +00:00
Kenneth Graunke 82ee30e558 intel/eu: Handle compaction when inserting validation errors
When the EU validator encountered an error, it would add an annotation
to the disassembly.  Unfortunately, the code to insert an error assumed
that the next instruction would start at (offset + sizeof(brw_inst)),
which is not true if the instruction with an error is compacted.

This could lead to cascading disassembly errors, where we started trying
to decode the next instruction at the wrong offset, and getting lots of
scary looking output:

   ERROR: Register Regioning patterns where [...]
   (-f0.1.any16h) illegal(*** invalid execution size value 6 )      { align1 $7.src atomic };
   (+f0.1.any16h) illegal.sat(*** invalid execution size value 6 )  { align1 $9.src AccWrEnable };
   illegal(*** invalid execution size value 6 )                     { align1 $11.src };
   (+f0.1) illegal.sat(*** invalid execution size value 6 )         { align1 F@2 AccWrEnable };
   (+f0.1) illegal.sat(*** invalid execution size value 6 )         { align1 F@2 AccWrEnable };
   (+f0.1) illegal.sat(*** invalid execution size value 6 )         { align1 $15.src AccWrEnable };
   illegal(*** invalid execution size value 6 )                     { align1 $15.src };
   (+f0.1) illegal.sat.g.f0.1(*** invalid execution size value 6 )  { align1 $13.src AccWrEnable };

Only the first instruction was actually wrong - the rest are just a
result of starting the disassembler at the wrong offset.  Trash ensues!

To fix this, just pass the instruction size in a few layers so we can
record the next offset properly.

Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17624>
2022-07-28 21:31:45 +00:00
Gert Wollny ce42fc4fa1 virgL: lower fneg and fabs
The host doesn't currently handle source mods on immediate values
correctly, so lower the ops that would create these source mods.

v2: update trace checksum

Fixes:  c5cc9ed29b
    virgl: Switch to nir-to-tgsi by default.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6929

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17765>
2022-07-28 21:20:20 +00:00