mesa/src/freedreno/registers
Connor Abbott cf0cfd572e freedreno/a6xx: VPC_SO_NCOMP is actually VPC_SO_BUFFER_STRIDE
This answers the question in a comment in turnip, and fixes some GL46
tests and piglit tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17494>
2022-07-12 17:57:07 +00:00
..
adreno freedreno/a6xx: VPC_SO_NCOMP is actually VPC_SO_BUFFER_STRIDE 2022-07-12 17:57:07 +00:00
dsi freedreno/registers: update dsi registers to support dsc 2022-04-01 21:56:40 +00:00
edp
hdmi
mdp
.gitignore
adreno.xml freedreno/registers: add a7xx registers for drm/msm kernel driver 2022-07-01 15:11:28 +00:00
freedreno_copyright.xml
gen_header.py freedreno/registers: Handle typed registers with fields 2021-03-11 20:58:39 +00:00
meson.build
msm.xml freedreno/regs: remove 5nm DSI PHY regs 2022-02-23 21:25:22 +00:00
rules-ng-ng.txt
rules-ng.xsd freedreno/rnn: normalize line endings in rules-ng.xsd 2022-01-19 15:17:17 +00:00
text-format.txt